From nobody Fri Dec 27 13:56:59 2024 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9A0A231CBE; Tue, 10 Dec 2024 09:21:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.19.9.99 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733822474; cv=none; b=JPgjJcUIjV+5V5cmOETFg5bF7JuAownIhzvSCNEX94t4ZhDOmwcN1niBc4geUL+lrj5Lru7faYg2H3GWQqjmAlXthTq6j57Y8PAMMvzQnLv2UcntTIwCXhLZ9s9Mz4CLrmB53wQoD2kHeVvUgUJV44eUDfnvzv87xIaJM4WKaSw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733822474; c=relaxed/simple; bh=fOev1Y8BKB0FulfbIogwUx6WfrGatBVUBVtvVDp+04s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=e5/SZKO5G8cTHmSUf9P5KoAayHG9rzmg78EptQ3a/xOKoMzbOiAhOS2G4Chusw8JVJR4kBtKRa35lnn6TPqvt3zU9I2a5y9k1t0cKEXxkviyWp6deQxwqIm1BC14rLtzEjxXceheqccfKfuJ+2vptyKV/lHQY3655a9UlL/xWQA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=norik.com; spf=pass smtp.mailfrom=norik.com; dkim=pass (2048-bit key) header.d=norik.com header.i=@norik.com header.b=pba+gmG0; arc=none smtp.client-ip=46.19.9.99 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=norik.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=norik.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=norik.com header.i=@norik.com header.b="pba+gmG0" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=norik.com; s=default; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=Lj/s8jikWSL6aISEsHq6B0p2FlUzsQ0RtdLirGZ/Elo=; b=pba+gmG0oSVE71SGtAPQVYGW+U tEtJfiI4ohYZuiPQLohtM+YwE+5m4msuBKYuJynxGMh0Z+CYe8eBT5+0RmEMbVxsjPMKGVvdc4tTt CGLxBpCww9qwjNEppj10LZzLVBQrI10asnCmtgBGaodPmRCVWbIZiP9u1O9iM4doebC75fVp/ato3 Jt38YXpUCx4QaMiP1nuvYexgb6tAQGMNWat1aCUJCAai5/UpB59sbSM10++aF92nGewJjM3/biqyV b7FrKXsmtmkyjsNjW8aRgctbrn/pFTiRDCopgyj/vvO5X2fPj/q340pUzwj0Imvc0kBP4Iq/HYI56 AtngMHnw==; Received: from [89.212.21.243] (port=59230 helo=and-HP-Z4..) by cpanel.siel.si with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1tKwQT-001jvW-29; Tue, 10 Dec 2024 10:21:05 +0100 From: Andrej Picej To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, upstream@lists.phytec.de Subject: [PATCH v5 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add properties for ti,lvds-vod-swing Date: Tue, 10 Dec 2024 10:18:59 +0100 Message-Id: <20241210091901.83028-2-andrej.picej@norik.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241210091901.83028-1-andrej.picej@norik.com> References: <20241210091901.83028-1-andrej.picej@norik.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel.siel.si X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - norik.com X-Get-Message-Sender-Via: cpanel.siel.si: authenticated_id: andrej.picej@norik.com X-Authenticated-Sender: cpanel.siel.si: andrej.picej@norik.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" Add properties which can be used to specify LVDS differential output voltage. Since this also depends on near-end signal termination also include property which sets this. LVDS differential output voltage is specified with an array (min, max), which should match the one from connected device. Signed-off-by: Andrej Picej Reviewed-by: Krzysztof Kozlowski --- Changes in v5: - added Krzysztof's reviewed-by tag Changes in v4: - removed "additionalProperties: true" from the patch as it is not needed Changes in v3: - no change Changes in v2: - move LVDS port schema to a $defs and reference it from there - properties are now defined in microvolts/ohms - use 1 property for data-lane and 1 for clock-lane LVDS voltage swing - add 1 property which sets LVDS near-end termination - since major change was done change the authorship to myself --- .../bindings/display/bridge/ti,sn65dsi83.yaml | 34 +++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.= yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml index 48a97bb3e2e0..bad6f5c81b06 100644 --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml @@ -80,12 +80,12 @@ properties: - const: 4 =20 port@2: - $ref: /schemas/graph.yaml#/properties/port description: Video port for LVDS Channel-A output (panel or bridge= ). + $ref: '#/$defs/lvds-port' =20 port@3: - $ref: /schemas/graph.yaml#/properties/port description: Video port for LVDS Channel-B output (panel or bridge= ). + $ref: '#/$defs/lvds-port' =20 required: - port@0 @@ -96,6 +96,36 @@ required: - reg - ports =20 +$defs: + lvds-port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + ti,lvds-termination-ohms: + description: The value of near end differential termination in= ohms. + enum: [100, 200] + default: 200 + + ti,lvds-vod-swing-clock-microvolt: + description: LVDS diferential output voltage for clo= ck + lanes in microvolts. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + + ti,lvds-vod-swing-data-microvolt: + description: LVDS diferential output voltage for data + lanes in microvolts. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + allOf: - if: properties: --=20 2.34.1 From nobody Fri Dec 27 13:56:59 2024 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A800D231CBC; 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Received: from [89.212.21.243] (port=59230 helo=and-HP-Z4..) by cpanel.siel.si with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1tKwQZ-001jvW-03; Tue, 10 Dec 2024 10:21:11 +0100 From: Andrej Picej To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, upstream@lists.phytec.de Subject: [PATCH v5 2/3] drm/bridge: ti-sn65dsi83: Add ti,lvds-vod-swing optional properties Date: Tue, 10 Dec 2024 10:19:00 +0100 Message-Id: <20241210091901.83028-3-andrej.picej@norik.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241210091901.83028-1-andrej.picej@norik.com> References: <20241210091901.83028-1-andrej.picej@norik.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel.siel.si X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - norik.com X-Get-Message-Sender-Via: cpanel.siel.si: authenticated_id: andrej.picej@norik.com X-Authenticated-Sender: cpanel.siel.si: andrej.picej@norik.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" Add a optional properties to change LVDS output voltage. This should not be static as this depends mainly on the connected display voltage requirement. We have three properties: - "ti,lvds-termination-ohms", which sets near end termination, - "ti,lvds-vod-swing-data-microvolt" and - "ti,lvds-vod-swing-clock-microvolt" which both set LVDS differential output voltage for data and clock lanes. They are defined as an array with min and max values. The appropriate bitfield will be set if selected constraints can be met. If "ti,lvds-termination-ohms" is not defined the default of 200 Ohm near end termination will be used. Selecting only one: "ti,lvds-vod-swing-data-microvolt" or "ti,lvds-vod-swing-clock-microvolt" can be done, but the output voltage constraint for only data/clock lanes will be met. Setting both is recommended. Signed-off-by: Andrej Picej --- Changes in v5: - specify default values in sn65dsi83_parse_lvds_endpoint, - move sn65dsi83_parse_lvds_endpoint for channel B up, outside if, Changes in v4: - fix typo in commit message bitfiled -> bitfield - use arrays (lvds_vod_swing_conf and lvds_term_conf) in private data, inst= ead of separate variables for channel A/B - add more checks on return value of "of_property_read_u32_array" Changes in v3: - use microvolts for default array values 1000 mV -> 1000000 uV. Changes in v2: - use datasheet tables to get the proper configuration - since major change was done change the authorship to myself --- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 142 +++++++++++++++++++++++++- 1 file changed, 139 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge= /ti-sn65dsi83.c index 57a7ed13f996..f9578b38da28 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c @@ -132,6 +132,16 @@ #define REG_IRQ_STAT_CHA_SOT_BIT_ERR BIT(2) #define REG_IRQ_STAT_CHA_PLL_UNLOCK BIT(0) =20 +enum sn65dsi83_channel { + CHANNEL_A, + CHANNEL_B +}; + +enum sn65dsi83_lvds_term { + OHM_100, + OHM_200 +}; + enum sn65dsi83_model { MODEL_SN65DSI83, MODEL_SN65DSI84, @@ -147,6 +157,8 @@ struct sn65dsi83 { struct regulator *vcc; bool lvds_dual_link; bool lvds_dual_link_even_odd_swap; + int lvds_vod_swing_conf[2]; + int lvds_term_conf[2]; }; =20 static const struct regmap_range sn65dsi83_readable_ranges[] =3D { @@ -237,6 +249,36 @@ static const struct regmap_config sn65dsi83_regmap_con= fig =3D { .max_register =3D REG_IRQ_STAT, }; =20 +static const int lvds_vod_swing_data_table[2][4][2] =3D { + { /* 100 Ohm */ + { 180000, 313000 }, + { 215000, 372000 }, + { 250000, 430000 }, + { 290000, 488000 }, + }, + { /* 200 Ohm */ + { 150000, 261000 }, + { 200000, 346000 }, + { 250000, 428000 }, + { 300000, 511000 }, + }, +}; + +static const int lvds_vod_swing_clock_table[2][4][2] =3D { + { /* 100 Ohm */ + { 140000, 244000 }, + { 168000, 290000 }, + { 195000, 335000 }, + { 226000, 381000 }, + }, + { /* 200 Ohm */ + { 117000, 204000 }, + { 156000, 270000 }, + { 195000, 334000 }, + { 234000, 399000 }, + }, +}; + static struct sn65dsi83 *bridge_to_sn65dsi83(struct drm_bridge *bridge) { return container_of(bridge, struct sn65dsi83, bridge); @@ -435,12 +477,16 @@ static void sn65dsi83_atomic_pre_enable(struct drm_br= idge *bridge, val |=3D REG_LVDS_FMT_LVDS_LINK_CFG; =20 regmap_write(ctx->regmap, REG_LVDS_FMT, val); - regmap_write(ctx->regmap, REG_LVDS_VCOM, 0x05); + regmap_write(ctx->regmap, REG_LVDS_VCOM, + REG_LVDS_VCOM_CHA_LVDS_VOD_SWING(ctx->lvds_vod_swing_conf[CHANNEL_A]) | + REG_LVDS_VCOM_CHB_LVDS_VOD_SWING(ctx->lvds_vod_swing_conf[CHANNEL_B])); regmap_write(ctx->regmap, REG_LVDS_LANE, (ctx->lvds_dual_link_even_odd_swap ? REG_LVDS_LANE_EVEN_ODD_SWAP : 0) | - REG_LVDS_LANE_CHA_LVDS_TERM | - REG_LVDS_LANE_CHB_LVDS_TERM); + (ctx->lvds_term_conf[CHANNEL_A] ? + REG_LVDS_LANE_CHA_LVDS_TERM : 0) | + (ctx->lvds_term_conf[CHANNEL_B] ? + REG_LVDS_LANE_CHB_LVDS_TERM : 0)); regmap_write(ctx->regmap, REG_LVDS_CM, 0x00); =20 le16val =3D cpu_to_le16(mode->hdisplay); @@ -576,10 +622,100 @@ static const struct drm_bridge_funcs sn65dsi83_funcs= =3D { .atomic_get_input_bus_fmts =3D sn65dsi83_atomic_get_input_bus_fmts, }; =20 +static int sn65dsi83_select_lvds_vod_swing(struct device *dev, + u32 lvds_vod_swing_data[2], u32 lvds_vod_swing_clk[2], u8 lvds_term) +{ + int i; + + for (i =3D 0; i <=3D 3; i++) { + if (lvds_vod_swing_data_table[lvds_term][i][0] >=3D lvds_vod_swing_data[= 0] && + lvds_vod_swing_data_table[lvds_term][i][1] <=3D lvds_vod_swing_data[1] && + lvds_vod_swing_clock_table[lvds_term][i][0] >=3D lvds_vod_swing_clk[0] && + lvds_vod_swing_clock_table[lvds_term][i][1] <=3D lvds_vod_swing_clk[1]) + return i; + } + + dev_err(dev, "failed to find appropriate LVDS_VOD_SWING configuration\n"); + return -EINVAL; +} + +static int sn65dsi83_parse_lvds_endpoint(struct sn65dsi83 *ctx, int channe= l) +{ + struct device *dev =3D ctx->dev; + struct device_node *endpoint; + int endpoint_reg; + /* Set so the property can be freely selected if not defined */ + u32 lvds_vod_swing_data[2] =3D { 0, 1000000 }; + u32 lvds_vod_swing_clk[2] =3D { 0, 1000000 }; + u32 lvds_term; + u8 lvds_term_conf =3D 0x1; + int lvds_vod_swing_conf =3D 0x1; + int ret =3D 0; + int ret_data; + int ret_clock; + + if (channel =3D=3D CHANNEL_A) + endpoint_reg =3D 2; + else + endpoint_reg =3D 3; + + endpoint =3D of_graph_get_endpoint_by_regs(dev->of_node, endpoint_reg, -1= ); + if (!of_property_read_u32(endpoint, "ti,lvds-termination-ohms", &lvds_ter= m)) { + if (lvds_term =3D=3D 100) + lvds_term_conf =3D OHM_100; + else + lvds_term_conf =3D OHM_200; + } + + ctx->lvds_term_conf[channel] =3D lvds_term_conf; + + ret_data =3D of_property_read_u32_array(endpoint, + "ti,lvds-vod-swing-data-microvolt", lvds_vod_swing_data, + ARRAY_SIZE(lvds_vod_swing_data)); + if (ret_data !=3D 0 && ret_data !=3D -EINVAL) { + ret =3D ret_data; + goto exit; + } + + ret_clock =3D of_property_read_u32_array(endpoint, + "ti,lvds-vod-swing-clock-microvolt", lvds_vod_swing_clk, + ARRAY_SIZE(lvds_vod_swing_clk)); + if (ret_clock !=3D 0 && ret_clock !=3D -EINVAL) { + ret =3D ret_clock; + goto exit; + } + + /* If any of the two properties is defined. */ + if (!ret_data || !ret_clock) { + lvds_vod_swing_conf =3D sn65dsi83_select_lvds_vod_swing(dev, + lvds_vod_swing_data, lvds_vod_swing_clk, + lvds_term_conf); + if (lvds_vod_swing_conf < 0) { + ret =3D lvds_vod_swing_conf; + goto exit; + } + } + + ctx->lvds_vod_swing_conf[channel] =3D lvds_vod_swing_conf; + ret =3D 0; +exit: + of_node_put(endpoint); + return ret; +} + static int sn65dsi83_parse_dt(struct sn65dsi83 *ctx, enum sn65dsi83_model = model) { struct drm_bridge *panel_bridge; struct device *dev =3D ctx->dev; + int ret; + + ret =3D sn65dsi83_parse_lvds_endpoint(ctx, CHANNEL_A); + if (ret < 0) + return ret; + + ret =3D sn65dsi83_parse_lvds_endpoint(ctx, CHANNEL_B); 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charset="utf-8" Set custom differential output voltage for LVDS, to fulfill requirements of the connected display. LVDS differential voltage for data-lanes and clock output has to be between 200 mV and 600 mV. Driver sets 200 Ohm near-end termination by default. Signed-off-by: Andrej Picej --- Changes in v5: - no change Changes in v4: - no change Changes in v3: - no change Changes in v2: - use new properties from previous patches --- .../boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.= dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso index a9de42cf14be..8bf9cc553bea 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso @@ -186,6 +186,8 @@ port@2 { reg =3D <2>; bridge_out: endpoint { remote-endpoint =3D <&panel_in>; + ti,lvds-vod-swing-clock-microvolt =3D <200000 600000>; + ti,lvds-vod-swing-data-microvolt =3D <200000 600000>; }; }; }; --=20 2.34.1