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Mon, 09 Dec 2024 23:32:23 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:89ce:2db9:f7d5:156d]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-215f8f09146sm83693295ad.199.2024.12.09.23.32.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2024 23:32:23 -0800 (PST) From: Chen-Yu Tsai To: Chaotian Jing , Ulf Hansson , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wenbin Mei Cc: Chen-Yu Tsai , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Frank Wunderlich , Andy-ld Lu Subject: [PATCH v2 2/2] mmc: mtk-sd: Limit getting top_base to SoCs that require it Date: Tue, 10 Dec 2024 15:32:11 +0800 Message-ID: <20241210073212.3917912-3-wenst@chromium.org> X-Mailer: git-send-email 2.47.0.338.g60cca15819-goog In-Reply-To: <20241210073212.3917912-1-wenst@chromium.org> References: <20241210073212.3917912-1-wenst@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently the mtk-sd driver tries to get and map the second register base, named top_base in the code, regardless of whether the SoC model actually has it or not. This produces confusing big error messages on the platforms that don't need it: mtk-msdc 11260000.mmc: error -EINVAL: invalid resource (null) Limit it to the platforms that actually require it, based on their device tree entries, and properly fail if it is missing. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/mmc/host/mtk-sd.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index e2c385853eef..1bb7044f4ca1 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -414,6 +414,7 @@ struct mtk_mmc_compatible { u8 clk_div_bits; bool recheck_sdio_irq; bool hs400_tune; /* only used for MT8173 */ + bool needs_top_base; u32 pad_tune_reg; bool async_fifo; bool data_tune; @@ -587,6 +588,7 @@ static const struct mtk_mmc_compatible mt7986_compat = =3D { .clk_div_bits =3D 12, .recheck_sdio_irq =3D true, .hs400_tune =3D false, + .needs_top_base =3D true, .pad_tune_reg =3D MSDC_PAD_TUNE0, .async_fifo =3D true, .data_tune =3D true, @@ -627,6 +629,7 @@ static const struct mtk_mmc_compatible mt8183_compat = =3D { .clk_div_bits =3D 12, .recheck_sdio_irq =3D false, .hs400_tune =3D false, + .needs_top_base =3D true, .pad_tune_reg =3D MSDC_PAD_TUNE0, .async_fifo =3D true, .data_tune =3D true, @@ -653,6 +656,7 @@ static const struct mtk_mmc_compatible mt8196_compat = =3D { .clk_div_bits =3D 12, .recheck_sdio_irq =3D false, .hs400_tune =3D false, + .needs_top_base =3D true, .pad_tune_reg =3D MSDC_PAD_TUNE0, .async_fifo =3D true, .data_tune =3D true, @@ -2887,9 +2891,13 @@ static int msdc_drv_probe(struct platform_device *pd= ev) if (IS_ERR(host->base)) return PTR_ERR(host->base); =20 - host->top_base =3D devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(host->top_base)) - host->top_base =3D NULL; + host->dev_comp =3D of_device_get_match_data(&pdev->dev); + + if (host->dev_comp->needs_top_base) { + host->top_base =3D devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(host->top_base)) + return PTR_ERR(host->top_base); + } =20 ret =3D mmc_regulator_get_supply(mmc); if (ret) @@ -2951,7 +2959,6 @@ static int msdc_drv_probe(struct platform_device *pde= v) msdc_of_property_parse(pdev, host); =20 host->dev =3D &pdev->dev; - host->dev_comp =3D of_device_get_match_data(&pdev->dev); host->src_clk_freq =3D clk_get_rate(host->src_clk); /* Set host parameters to mmc */ mmc->ops =3D &mt_msdc_ops; --=20 2.47.0.338.g60cca15819-goog