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[185.246.87.17]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434f2d08564sm94543645e9.12.2024.12.10.02.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2024 02:46:49 -0800 (PST) From: Guillaume Stols Date: Tue, 10 Dec 2024 10:46:47 +0000 Subject: [PATCH v2 7/9] iio: adc: ad7606: change r/w_register signature Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241210-ad7606_add_iio_backend_software_mode-v2-7-6619c3e50d81@baylibre.com> References: <20241210-ad7606_add_iio_backend_software_mode-v2-0-6619c3e50d81@baylibre.com> In-Reply-To: <20241210-ad7606_add_iio_backend_software_mode-v2-0-6619c3e50d81@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Nuno Sa , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , devicetree@vger.kernel.org, dlechner@baylibre.com, jstephan@baylibre.com, aardelean@baylibre.com, adureghello@baylibre.com, Guillaume Stols X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1733827603; l=6288; i=gstols@baylibre.com; s=20240417; h=from:subject:message-id; bh=PAZUr7a+ezpER6BWIGM0HmPI8Y0j/PqczoFzw8Wo+qI=; b=kGl0VZMMI642Noohf4u4Y7XOae6Zv5MSFH9dcnaX5h9+6gDm+tHjOm2bAAP8SwyXR0wa1nCt3 Q2U3oJSTfsaC9ovJtp2720O1kI/dkHNn13DHvyckc/HhRdO3Xj2Mr81 X-Developer-Key: i=gstols@baylibre.com; a=ed25519; pk=XvMm5WHuV67sGYOJZqIYzXndbaJOlNd8Q6li6vnb4Cs= The register read/write with IIO backend will require to claim the direct mode, and doing so requires passing the corresponding iio_dev structure. So we need to modify the function signature to pass the iio_dev structure. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.c | 25 +++++++++++-------------- drivers/iio/adc/ad7606.h | 8 ++++---- drivers/iio/adc/ad7606_spi.c | 10 +++++----- 3 files changed, 20 insertions(+), 23 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 2f13b9cd2ed2..bf1f84367c72 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -574,13 +574,13 @@ static int ad7606_reg_access(struct iio_dev *indio_de= v, guard(mutex)(&st->lock); =20 if (readval) { - ret =3D st->bops->reg_read(st, reg); + ret =3D st->bops->reg_read(indio_dev, reg); if (ret < 0) return ret; *readval =3D ret; return 0; } else { - return st->bops->reg_write(st, reg, writeval); + return st->bops->reg_write(indio_dev, reg, writeval); } } =20 @@ -1148,26 +1148,26 @@ static const struct iio_trigger_ops ad7606_trigger_= ops =3D { .validate_device =3D iio_trigger_validate_own_device, }; =20 -static int ad7606_write_mask(struct ad7606_state *st, +static int ad7606_write_mask(struct iio_dev *indio_dev, unsigned int addr, unsigned long mask, unsigned int val) { + struct ad7606_state *st =3D iio_priv(indio_dev); int readval; =20 - readval =3D st->bops->reg_read(st, addr); + readval =3D st->bops->reg_read(indio_dev, addr); if (readval < 0) return readval; =20 readval &=3D ~mask; readval |=3D val; =20 - return st->bops->reg_write(st, addr, readval); + return st->bops->reg_write(indio_dev, addr, readval); } =20 static int ad7616_write_scale_sw(struct iio_dev *indio_dev, int ch, int va= l) { - struct ad7606_state *st =3D iio_priv(indio_dev); unsigned int ch_addr, mode, ch_index; =20 /* @@ -1189,23 +1189,20 @@ static int ad7616_write_scale_sw(struct iio_dev *in= dio_dev, int ch, int val) /* 0b01 for 2.5v, 0b10 for 5v and 0b11 for 10v */ mode =3D AD7616_RANGE_CH_MODE(ch_index, ((val + 1) & 0b11)); =20 - return ad7606_write_mask(st, ch_addr, AD7616_RANGE_CH_MSK(ch_index), + return ad7606_write_mask(indio_dev, ch_addr, AD7616_RANGE_CH_MSK(ch_index= ), mode); } =20 static int ad7616_write_os_sw(struct iio_dev *indio_dev, int val) { - struct ad7606_state *st =3D iio_priv(indio_dev); =20 - return ad7606_write_mask(st, AD7616_CONFIGURATION_REGISTER, + return ad7606_write_mask(indio_dev, AD7616_CONFIGURATION_REGISTER, AD7616_OS_MASK, val << 2); } =20 static int ad7606_write_scale_sw(struct iio_dev *indio_dev, int ch, int va= l) { - struct ad7606_state *st =3D iio_priv(indio_dev); - - return ad7606_write_mask(st, + return ad7606_write_mask(indio_dev, AD7606_RANGE_CH_ADDR(ch), AD7606_RANGE_CH_MSK(ch), AD7606_RANGE_CH_MODE(ch, val)); @@ -1215,7 +1212,7 @@ static int ad7606_write_os_sw(struct iio_dev *indio_d= ev, int val) { struct ad7606_state *st =3D iio_priv(indio_dev); =20 - return st->bops->reg_write(st, AD7606_OS_MODE, val); + return st->bops->reg_write(indio_dev, AD7606_OS_MODE, val); } =20 static int ad7616_sw_mode_setup(struct iio_dev *indio_dev) @@ -1236,7 +1233,7 @@ static int ad7616_sw_mode_setup(struct iio_dev *indio= _dev) return ret; =20 /* Activate Burst mode and SEQEN MODE */ - return ad7606_write_mask(st, + return ad7606_write_mask(indio_dev, AD7616_CONFIGURATION_REGISTER, AD7616_BURST_MODE | AD7616_SEQEN_MODE, AD7616_BURST_MODE | AD7616_SEQEN_MODE); diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 7a044b499cfe..eca7ea99e24d 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -235,10 +235,10 @@ struct ad7606_bus_ops { int (*iio_backend_config)(struct device *dev, struct iio_dev *indio_dev); int (*read_block)(struct device *dev, int num, void *data); int (*sw_mode_config)(struct iio_dev *indio_dev); - int (*reg_read)(struct ad7606_state *st, unsigned int addr); - int (*reg_write)(struct ad7606_state *st, - unsigned int addr, - unsigned int val); + int (*reg_read)(struct iio_dev *indio_dev, unsigned int addr); + int (*reg_write)(struct iio_dev *indio_dev, + unsigned int addr, + unsigned int val); int (*update_scan_mode)(struct iio_dev *indio_dev, const unsigned long *s= can_mask); u16 (*rd_wr_cmd)(int addr, char isWriteOp); }; diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index e08563dd1108..15bfa7a427d9 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -124,8 +124,9 @@ static int ad7606_spi_read_block18to32(struct device *d= ev, return spi_sync_transfer(spi, &xfer, 1); } =20 -static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr) +static int ad7606_spi_reg_read(struct iio_dev *indio_dev, unsigned int add= r) { + struct ad7606_state *st =3D iio_priv(indio_dev); struct spi_device *spi =3D to_spi_device(st->dev); struct spi_transfer t[] =3D { { @@ -148,10 +149,11 @@ static int ad7606_spi_reg_read(struct ad7606_state *s= t, unsigned int addr) return be16_to_cpu(st->d16[1]); } =20 -static int ad7606_spi_reg_write(struct ad7606_state *st, +static int ad7606_spi_reg_write(struct iio_dev *indio_dev, unsigned int addr, unsigned int val) { + struct ad7606_state *st =3D iio_priv(indio_dev); struct spi_device *spi =3D to_spi_device(st->dev); =20 st->d16[0] =3D cpu_to_be16((st->bops->rd_wr_cmd(addr, 1) << 8) | @@ -162,8 +164,6 @@ static int ad7606_spi_reg_write(struct ad7606_state *st, =20 static int ad7616_sw_mode_config(struct iio_dev *indio_dev) { - struct ad7606_state *st =3D iio_priv(indio_dev); - /* * Scale can be configured individually for each channel * in software mode. @@ -178,7 +178,7 @@ static int ad7606B_sw_mode_config(struct iio_dev *indio= _dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 /* Configure device spi to output on a single channel */ - st->bops->reg_write(st, + st->bops->reg_write(indio_dev, AD7606_CONFIGURATION_REGISTER, AD7606_SINGLE_DOUT); =20 --=20 2.34.1