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Mon, 09 Dec 2024 09:45:27 -0800 (PST) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:5dfc:4b08:57c5:2948]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7fd53ff4900sm1397667a12.50.2024.12.09.09.45.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2024 09:45:26 -0800 (PST) From: Douglas Anderson To: Catalin Marinas , Will Deacon , Mark Rutland Cc: Julius Werner , Jeffrey Hugo , Roxana Bradescu , bjorn.andersson@oss.qualcomm.com, linux-arm-kernel@lists.infradead.org, Trilok Soni , linux-arm-msm@vger.kernel.org, Douglas Anderson , linux-kernel@vger.kernel.org Subject: [PATCH 1/6] arm64: errata: Add QCOM_KRYO_4XX_GOLD to the spectre_bhb_k24_list Date: Mon, 9 Dec 2024 09:43:11 -0800 Message-ID: <20241209094310.1.Ie4ef54abe02e7eb0eee50f830575719bf23bda48@changeid> X-Mailer: git-send-email 2.47.0.338.g60cca15819-goog In-Reply-To: <20241209174430.2904353-1-dianders@chromium.org> References: <20241209174430.2904353-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Qualcomm Kryo 400-series Gold cores appear to have a derivative of an ARM Cortex A76 in them. Since A76 needs Spectre mitigation then the Kyro 400-series Gold cores also should need Spectre mitigation. Signed-off-by: Douglas Anderson --- The "k" value here really should come from analysis by Qualcomm, but until we can get that analysis let's choose the same value as A76: 24. Ideally someone from Qualcomm can confirm that this mitigation is needed and confirm / provide the proper "k" value. arch/arm64/kernel/proton-pack.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pac= k.c index da53722f95d4..e149efadff20 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -866,6 +866,7 @@ u8 spectre_bhb_loop_affected(int scope) MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD), {}, }; static const struct midr_range spectre_bhb_k11_list[] =3D { --=20 2.47.0.338.g60cca15819-goog From nobody Fri Dec 27 11:36:16 2024 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 247B61B4222 for ; Mon, 9 Dec 2024 17:45:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Qualcomm Kryo 200-series Gold cores appear to have a derivative of an ARM Cortex A73 in them. Since A73 needs Spectre mitigation then the Kyro 200-series Gold cores also should need Spectre mitigation. Signed-off-by: Douglas Anderson --- I don't really have any good way to test this patch but it seems likely it's needed. If nothing else the claim is that that Qualcomm Kyro 280 CPU is vulnerable [1] but I don't see any mitigations in the kernel for it. NOTE: presumably this patch won't actually do much on its own because (I believe) it requires a firmware update to go with it. [1] https://spectreattack.com/spectre.pdf arch/arm64/kernel/proton-pack.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pac= k.c index e149efadff20..0437be7c83bc 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -925,6 +925,7 @@ static bool is_spectre_bhb_fw_affected(int scope) static const struct midr_range spectre_bhb_firmware_mitigated_list[] =3D { MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD), {}, }; bool cpu_in_list =3D is_midr_in_range_list(read_cpuid_id(), --=20 2.47.0.338.g60cca15819-goog From nobody Fri Dec 27 11:36:16 2024 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EFBD1534EC for ; Mon, 9 Dec 2024 17:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Add a definition for the Qualcomm Kryo 300-series Gold cores. Signed-off-by: Douglas Anderson Reviewed-by: Dmitry Baryshkov --- I have no idea if this is actually right and no way to test it, but it fits the pattern of the other definitions. Someone from Qualcomm ought to confirm this. arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cput= ype.h index 488f8e751349..c8058f91a5bd 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -119,6 +119,7 @@ #define QCOM_CPU_PART_KRYO 0x200 #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 +#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -195,6 +196,7 @@ #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_= PART_KRYO_2XX_GOLD) #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CP= U_PART_KRYO_2XX_SILVER) +#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_= PART_KRYO_3XX_GOLD) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CP= U_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_= PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CP= U_PART_KRYO_4XX_SILVER) --=20 2.47.0.338.g60cca15819-goog From nobody Fri Dec 27 11:36:16 2024 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89E711E9B07 for ; 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charset="utf-8" Qualcomm Kryo 300-series Gold cores appear to have a derivative of an ARM Cortex A75 in them. Since A75 needs Spectre mitigation then the Kyro 300-series Gold cores also should need Spectre mitigation. Signed-off-by: Douglas Anderson --- I have no idea if this is actually needed and this patch is purely speculative. Given that A75 needs some sort of Spectre mitigation it seem hard to believe that the Qualcomm Kryo 300-series Gold cores wouldn't need it. NOTE: presumably this patch won't actually do much on its own because (I believe) it requires a firmware update to go with it. arch/arm64/kernel/proton-pack.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pac= k.c index 0437be7c83bc..b1881964e304 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -926,6 +926,7 @@ static bool is_spectre_bhb_fw_affected(int scope) MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), MIDR_ALL_VERSIONS(MIDR_CORTEX_A75), MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_GOLD), {}, }; bool cpu_in_list =3D is_midr_in_range_list(read_cpuid_id(), --=20 2.47.0.338.g60cca15819-goog From nobody Fri Dec 27 11:36:16 2024 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACDFE1ACEA8 for ; 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charset="utf-8" Qualcomm Kryo 500-series Gold cores appear to have a derivative of an ARM Cortex A77 in them. Since A77 needs Spectre mitigation then the Kyro 500-series Gold cores also should need Spectre mitigation. Signed-off-by: Douglas Anderson --- Yes. I know. This patch DOESN'T COMPILE because MIDR_QCOM_KRYO_5XX_GOLD is not defined. That value needs to come from Qualcomm or from testing on hardware, which I don't have. Qualcomm needs to chime in to confirm that this Spectre mitigation is correct anyway, though. I'm including this patch so it's obvious that I think these cores also need the mitigation. arch/arm64/kernel/proton-pack.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pac= k.c index b1881964e304..212481726f04 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -867,6 +867,7 @@ u8 spectre_bhb_loop_affected(int scope) MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_5XX_GOLD), {}, }; static const struct midr_range spectre_bhb_k11_list[] =3D { --=20 2.47.0.338.g60cca15819-goog From nobody Fri Dec 27 11:36:16 2024 Received: from mail-pj1-f50.google.com (mail-pj1-f50.google.com [209.85.216.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8784F1F0E48 for ; Mon, 9 Dec 2024 17:45:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 09 Dec 2024 09:45:37 -0800 (PST) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:5dfc:4b08:57c5:2948]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7fd53ff4900sm1397667a12.50.2024.12.09.09.45.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2024 09:45:37 -0800 (PST) From: Douglas Anderson To: Catalin Marinas , Will Deacon , Mark Rutland Cc: Julius Werner , Jeffrey Hugo , Roxana Bradescu , bjorn.andersson@oss.qualcomm.com, linux-arm-kernel@lists.infradead.org, Trilok Soni , linux-arm-msm@vger.kernel.org, Douglas Anderson , linux-kernel@vger.kernel.org Subject: [PATCH 6/6] arm64: errata: Add QCOM_KRYO_6XX_GOLD/PRIME to the spectre_bhb_k32_list Date: Mon, 9 Dec 2024 09:43:16 -0800 Message-ID: <20241209094310.6.I722621804be859e4ae4b7479ce191c5e3367b37c@changeid> X-Mailer: git-send-email 2.47.0.338.g60cca15819-goog In-Reply-To: <20241209174430.2904353-1-dianders@chromium.org> References: <20241209174430.2904353-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Qualcomm Kryo 600-series Gold cores appear to have a derivative of an ARM Cortex A78 / ARM Cortex X1 in them. Since these need Spectre mitigation then the Kyro 600-series Gold/Prime cores also should need Spectre mitigation. Signed-off-by: Douglas Anderson --- Yes. I know. This patch DOESN'T COMPILE because MIDR_QCOM_KRYO_6XX_GOLD and MIDR_QCOM_KRYO_6XX_PRIME are not defined. Those value needs to come from Qualcomm or from testing on hardware, which I don't have. Qualcomm needs to chime in to confirm that this Spectre mitigation is correct anyway, though. I'm including this patch so it's obvious that I think these cores also need the mitigation. arch/arm64/kernel/proton-pack.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pac= k.c index 212481726f04..67aa54017dea 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -860,6 +860,8 @@ u8 spectre_bhb_loop_affected(int scope) MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_6XX_GOLD), + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_6XX_PRIME), {}, }; static const struct midr_range spectre_bhb_k24_list[] =3D { --=20 2.47.0.338.g60cca15819-goog