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bh=Rbu53Yh+kA1LS4h1xYEPR4/hP0SYV0lyQIuCr3buQy0=; b=HEq3srIg4R87Pb0ltXCDI1oriZDuoHUJ7jGHFpZFfz38MSX9suo1COIQqT7hma7c5kEz6HKu6BvoI3F99aTXReBcUKfH7cd1YWcLi5WIUqt0H7qfcdhTUXsU09uvzwXVT/FAsEUXuasVjbta9fU/jFOSkArnEFBXSlvXOStgVSI= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=os.amperecomputing.com; Received: from PH0PR01MB7975.prod.exchangelabs.com (2603:10b6:510:26d::15) by MN0PR01MB7876.prod.exchangelabs.com (2603:10b6:208:383::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8251.12; Mon, 9 Dec 2024 07:20:53 +0000 Received: from PH0PR01MB7975.prod.exchangelabs.com ([fe80::6926:a627:118e:8050]) by PH0PR01MB7975.prod.exchangelabs.com ([fe80::6926:a627:118e:8050%3]) with mapi id 15.20.8251.008; Mon, 9 Dec 2024 07:20:53 +0000 From: Huang Shijie To: catalin.marinas@arm.com, will@kernel.org, anshuman.khandual@arm.com, corbet@lwn.net Cc: patches@amperecomputing.com, cl@linux.com, akpm@linux-foundation.org, thuth@redhat.com, rostedt@goodmis.org, xiongwei.song@windriver.com, ardb@kernel.org, inux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Huang Shijie Subject: [PATCH v3 1/2] arm64: refactor the rodata=xxx Date: Mon, 9 Dec 2024 15:20:19 +0800 Message-Id: <20241209072020.4743-2-shijie@os.amperecomputing.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20241209072020.4743-1-shijie@os.amperecomputing.com> References: <20241209072020.4743-1-shijie@os.amperecomputing.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SI1PR02CA0005.apcprd02.prod.outlook.com (2603:1096:4:1f7::13) To PH0PR01MB7975.prod.exchangelabs.com (2603:10b6:510:26d::15) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR01MB7975:EE_|MN0PR01MB7876:EE_ X-MS-Office365-Filtering-Correlation-Id: a7ddd485-38ff-4960-2303-08dd18220448 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|7416014|376014|1800799024|366016|38350700014; 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charset="utf-8" From Documentation/admin-guide/kernel-parameters.txt: rodata=3D [KNL,EARLY] on Mark read-only kernel memory as read-only (default). So "rodata=3Don" is the default. But the current code does not follow the document, it makes "rodata=3Dfull" as the default. This patch refactors the "rodata=3Dxxx" : 1.) Make rodata=3Don behaviour be the original rodata=3Dfull. (Drop the original rodata=3Dfull.) 2.) Introduce "rodata=3Dnoalias" which is the original "rodata=3Don" 3.) Add more comment for arch_parse_debug_rodata(), update kernel-parameters.txt. After this patch, the rodata=3Don will be the default. Signed-off-by: Huang Shijie --- .../admin-guide/kernel-parameters.txt | 2 +- arch/arm64/include/asm/setup.h | 25 +++++++++++++++++-- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index a22b7e621007..51bce7b9d805 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5901,7 +5901,7 @@ rodata=3D [KNL,EARLY] on Mark read-only kernel memory as read-only (default). off Leave read-only kernel memory writable for debugging. - full Mark read-only kernel memory and aliases as read-only + noalias Use more block mappings,may have better performance. [arm64] =20 rockchip.usb_uart diff --git a/arch/arm64/include/asm/setup.h b/arch/arm64/include/asm/setup.h index ba269a7a3201..b3063326b79a 100644 --- a/arch/arm64/include/asm/setup.h +++ b/arch/arm64/include/asm/setup.h @@ -13,6 +13,27 @@ extern phys_addr_t __fdt_pointer __initdata; extern u64 __cacheline_aligned boot_args[4]; =20 +/* + * rodata=3Don (default): + * Apply read-only attributes of VM areas to the linear alias of + * the backing pages as well. This prevents code or read-only data + * from being modified (inadvertently or intentionally) via another + * mapping of the same memory page. + * + * This requires the linear region to be mapped down to pages, + * which may adversely affect performance in some cases. + * + * rodata=3Doff: + * It provides us more block mappings and contiguous hits + * to map the linear region which minimize the TLB footprint. + * Leave read-only kernel memory writable for debugging. + * + * rodata=3Dnoalias: + * It provides us more block mappings and contiguous hits + * to map the linear region which minimize the TLB footprint. + * And the linear aliases of pages belonging to read-only mappings + * in vmalloc region are also marked as read-only. + */ static inline bool arch_parse_debug_rodata(char *arg) { extern bool rodata_enabled; @@ -21,7 +42,7 @@ static inline bool arch_parse_debug_rodata(char *arg) if (!arg) return false; =20 - if (!strcmp(arg, "full")) { + if (!strcmp(arg, "on")) { rodata_enabled =3D rodata_full =3D true; return true; } @@ -31,7 +52,7 @@ static inline bool arch_parse_debug_rodata(char *arg) return true; } =20 - if (!strcmp(arg, "on")) { + if (!strcmp(arg, "noalias")) { rodata_enabled =3D true; rodata_full =3D false; return true; --=20 2.40.1