From nobody Fri Dec 19 07:03:38 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB1B2206281 for ; Fri, 6 Dec 2024 22:04:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733522642; cv=none; b=Wm08J0MOHY62a2N+hXU10iqFkH2X0QFTo502jKl1SKYLAJB+2hZq1V7xkbKaTn4Shk5ksnXxwyVzTsCRei2W35vfMrTC7cceAji/S14PCLJvrGC0+RTnqmQ79xujtc52roCYfpgEAG+xH02jmkVKLrhClVOwjq+7KlfSBVJ9ig0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733522642; c=relaxed/simple; bh=BtZlCg7zrnpqKFSnMbzeaKu5nXKTQv2xjkndYTOjR+U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uCZRfImsgbES0AzMTsBZwheZLUD2rMHHhhIKyrFnOTVHf8qjmQPXTr7PFHbH4TclR5tpstqjC83lvVE73t9uHuQx4XeRAdOiarHgb8rrP1XK1gzNzMEROQYnkM/hvYjbQHRPO3zqeT32C27rcXras6hEaOeEO8NhxIwSTvJdFdk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=mdyMa7vK; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="mdyMa7vK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1733522639; bh=BtZlCg7zrnpqKFSnMbzeaKu5nXKTQv2xjkndYTOjR+U=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=mdyMa7vKYn4H1ynchfOGmmeWUN0Qiylma9FHLI1kmvthIqklX9UqmkctFQYWvXkwg bgj9MYg9s+TBvmpedEL9FUXLZny7p1hOkdytDkOy0gbnkb02cPtX78nFO/DF8B0Vkf PdkzNFQaVrgnOAv7B7CC9/U+kHbuHutVs+8gxrJOsCMbVzAZlQkr98/x4OdtlcXpPP OfpD6CG7UboyXk/0WEQ7/3Dt3Wj2jpcPUsyX37SL0xrk0N4y27SMyj6cN2KyEKVUhJ zEfnAW36dpbb2ihKd3+mMkHTruTumi4CXC79ycBDV4GrrXyG8QJosvAtXcriN3jCQ1 Q8V3g9bB95aZw== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id DA7B817E380B; Fri, 6 Dec 2024 23:03:58 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 07 Dec 2024 00:03:43 +0200 Subject: [PATCH 3/4] phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241207-phy-sam-hdptx-bpc-v1-3-03c2e4d6d797@collabora.com> References: <20241207-phy-sam-hdptx-bpc-v1-0-03c2e4d6d797@collabora.com> In-Reply-To: <20241207-phy-sam-hdptx-bpc-v1-0-03c2e4d6d797@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The current workaround to setup the TMDS character rate relies on the unconventional usage of phy_set_bus_width(). Make use of the recently introduced HDMI PHY configuration API for this purpose. The workaround will be dropped as soon as the switch has been completed on both ends. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 42 ++++++++++++++++++-= ---- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index ceab9c71d3b53ae0b746a10c081fcfaa7d5c5ae7..eeadebdc476caa87aebbbd82f71= 02b62b22a0ea6 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -273,6 +273,7 @@ struct rk_hdptx_phy { struct clk_bulk_data *clks; int nr_clks; struct reset_control_bulk_data rsts[RST_MAX]; + unsigned long tmds_char_rate; =20 /* clk provider */ struct clk_hw hw; @@ -902,18 +903,20 @@ static int rk_hdptx_phy_consumer_put(struct rk_hdptx_= phy *hdptx, bool force) static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); - int bus_width =3D phy_get_bus_width(hdptx->phy); + unsigned int rate =3D hdptx->tmds_char_rate / 100; int ret; =20 - /* - * FIXME: Temporary workaround to pass pixel_clk_rate - * from the HDMI bridge driver until phy_configure_opts_hdmi - * becomes available in the PHY API. - */ - unsigned int rate =3D bus_width & 0xfffffff; + if (rate =3D=3D 0) { + /* + * FIXME: Temporary workaround to setup TMDS char rate + * from the RK HDMI bridge driver. + * Will be removed as soon the switch to the HDMI PHY + * configuration API has been completed on both ends. + */ + rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; + } =20 - dev_dbg(hdptx->dev, "%s bus_width=3D%x rate=3D%u\n", - __func__, bus_width, rate); + dev_dbg(hdptx->dev, "%s rate=3D%u\n", __func__, rate); =20 ret =3D rk_hdptx_phy_consumer_get(hdptx, rate); if (ret) @@ -933,9 +936,20 @@ static int rk_hdptx_phy_power_off(struct phy *phy) return rk_hdptx_phy_consumer_put(hdptx, false); } =20 +static int rk_hdptx_phy_configure(struct phy *phy, + union phy_configure_opts *opts) +{ + struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); + + hdptx->tmds_char_rate =3D opts->hdmi.tmds_char_rate; + + return 0; +} + static const struct phy_ops rk_hdptx_phy_ops =3D { .power_on =3D rk_hdptx_phy_power_on, .power_off =3D rk_hdptx_phy_power_off, + .configure =3D rk_hdptx_phy_configure, .owner =3D THIS_MODULE, }; =20 @@ -991,6 +1005,16 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *h= w, unsigned long rate, { struct rk_hdptx_phy *hdptx =3D to_rk_hdptx_phy(hw); =20 + /* + * The TMDS char rate set via phy_configure(), if any, has + * precedence over the rate provided via clk_set_rate(). + */ + if (hdptx->tmds_char_rate && hdptx->tmds_char_rate !=3D rate) { + dev_dbg(hdptx->dev, "Replaced clk_set_rate=3D%lu with tmds_char_rate=3D%= lu\n", + rate, hdptx->tmds_char_rate); + rate =3D hdptx->tmds_char_rate; + } + return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); } =20 --=20 2.47.0