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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Dege , Christian Mardmoeller , Dennis Ostermann , Nikita Yushchenko Subject: [PATCH net v2 2/4] net: renesas: rswitch: fix race window between tx start and complete Date: Sat, 7 Dec 2024 00:16:40 +0500 Message-Id: <20241206191640.1416-1-nikita.yoush@cogentembedded.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241206190015.4194153-1-nikita.yoush@cogentembedded.com> References: <20241206190015.4194153-1-nikita.yoush@cogentembedded.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If hardware is already transmitting, it can start handling the descriptor being written to immediately after it observes updated DT field, before the queue is kicked by a write to GWTRC. If the start_xmit() execution is preempted at unfortunate moment, this transmission can complete, and interrupt handled, before gq->cur gets updated. With the current implementation of completion, this will cause the last entry not completed. Fix that by changing completion loop to check DT values directly, instead of depending on gq->cur. Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Swi= tch"") Signed-off-by: Nikita Yushchenko --- drivers/net/ethernet/renesas/rswitch.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/renesas/rswitch.c b/drivers/net/ethernet/= renesas/rswitch.c index 32b32aa7e01f..c251becef6f8 100644 --- a/drivers/net/ethernet/renesas/rswitch.c +++ b/drivers/net/ethernet/renesas/rswitch.c @@ -862,13 +862,10 @@ static void rswitch_tx_free(struct net_device *ndev) struct rswitch_ext_desc *desc; struct sk_buff *skb; =20 - for (; rswitch_get_num_cur_queues(gq) > 0; - gq->dirty =3D rswitch_next_queue_index(gq, false, 1)) { - desc =3D &gq->tx_ring[gq->dirty]; - if ((desc->desc.die_dt & DT_MASK) !=3D DT_FEMPTY) - break; - + desc =3D &gq->tx_ring[gq->dirty]; + while ((desc->desc.die_dt & DT_MASK) =3D=3D DT_FEMPTY) { dma_rmb(); + skb =3D gq->skbs[gq->dirty]; if (skb) { rdev->ndev->stats.tx_packets++; @@ -879,7 +876,10 @@ static void rswitch_tx_free(struct net_device *ndev) dev_kfree_skb_any(gq->skbs[gq->dirty]); gq->skbs[gq->dirty] =3D NULL; } + desc->desc.die_dt =3D DT_EEMPTY; + gq->dirty =3D rswitch_next_queue_index(gq, false, 1); + desc =3D &gq->tx_ring[gq->dirty]; } } =20 @@ -1685,6 +1685,8 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff = *skb, struct net_device *nd gq->skbs[(gq->cur + nr_desc - 1) % gq->ring_size] =3D skb; gq->unmap_addrs[(gq->cur + nr_desc - 1) % gq->ring_size] =3D dma_addr_ori= g; =20 + dma_wmb(); + /* DT_FSTART should be set at last. So, this is reverse order. */ for (i =3D nr_desc; i-- > 0; ) { desc =3D &gq->tx_ring[rswitch_next_queue_index(gq, true, i)]; @@ -1695,8 +1697,6 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff = *skb, struct net_device *nd goto err_unmap; } =20 - wmb(); /* gq->cur must be incremented after die_dt was set */ - gq->cur =3D rswitch_next_queue_index(gq, true, nr_desc); rswitch_modify(rdev->addr, GWTRC(gq->index), 0, BIT(gq->index % 32)); =20 --=20 2.39.5