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charset="utf-8" Add documentation for the updated ACPI specs for EINJv2(1)(2) (1)https://bugzilla.tianocore.org/show_bug.cgi?id=3D4615 (2)https://bugzilla.tianocore.org/attachment.cgi?id=3D1446 Signed-off-by: Zaid Alali --- .../firmware-guide/acpi/apei/einj.rst | 41 ++++++++++++++++++- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/Documentation/firmware-guide/acpi/apei/einj.rst b/Documentatio= n/firmware-guide/acpi/apei/einj.rst index c52b9da08fa9..b1c0464f6002 100644 --- a/Documentation/firmware-guide/acpi/apei/einj.rst +++ b/Documentation/firmware-guide/acpi/apei/einj.rst @@ -59,6 +59,9 @@ The following files belong to it: 0x00000200 Platform Correctable 0x00000400 Platform Uncorrectable non-fatal 0x00000800 Platform Uncorrectable fatal + V2_0x00000001 EINJV2 Processor Error + V2_0x00000002 EINJV2 Memory Error + V2_0x00000004 EINJV2 PCI Express Error =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D =20 The format of the file contents are as above, except present are only @@ -85,9 +88,11 @@ The following files belong to it: Bit 0 Processor APIC field valid (see param3 below). Bit 1 - Memory address and mask valid (param1 and param2). + Memory address and range valid (param1 and param2). Bit 2 PCIe (seg,bus,dev,fn) valid (see param4 below). + Bit 3 + EINJv2 extension structure is valid =20 If set to zero, legacy behavior is mimicked where the type of injection specifies just one bit set, and param1 is multiplexed. @@ -110,6 +115,7 @@ The following files belong to it: Used when the 0x1 bit is set in "flags" to specify the APIC id =20 - param4 + Used when the 0x4 bit is set in "flags" to specify target PCIe device =20 - notrigger @@ -122,6 +128,18 @@ The following files belong to it: this actually works depends on what operations the BIOS actually includes in the trigger phase. =20 +- einjv2_component_count + + The value from this file is used to set the "Component Array Count" + field of EINJv2 Extension Structure. + +- einjv2_component_array + + The contents of this file are used to set the "Component Array" field + of the EINJv2 Extension Structure. The expected format is hex values + for component id and syndrome separated by space, and multiple + components are separated by new line. + CXL error types are supported from ACPI 6.5 onwards (given a CXL port is present). The EINJ user interface for CXL error types is at /cxl. The following files belong to it: @@ -139,7 +157,6 @@ is present). The EINJ user interface for CXL error type= s is at under /apei/einj, while CXL 1.1/1.0 port injections must use this file. =20 - BIOS versions based on the ACPI 4.0 specification have limited options in controlling where the errors are injected. Your BIOS may support an extension (enabled with the param_extension=3D1 module parameter, or boot @@ -194,6 +211,26 @@ An error injection example:: # echo 0x8 > error_type # Choose correctable memory error # echo 1 > error_inject # Inject now =20 +An EINJv2 error injection example:: + + # cd /sys/kernel/debug/apei/einj + # cat available_error_type # See which errors can be injected + 0x00000002 Processor Uncorrectable non-fatal + 0x00000008 Memory Correctable + 0x00000010 Memory Uncorrectable non-fatal + 0x00000001 EINJV2 Processor Error + 0x00000002 EINJV2 Memory Error + + # echo 0x12345000 > param1 # Set memory address for injection + # echo 0xfffffffffffff000 > param2 # Range - anywhere in this page + # comp_arr=3D"0x1 0x2 # Fill in the component array + >0x1 0x4 + >0x2 0x4" + # echo "$comp_arr" > einjv2_component_array + # echo 0x2 > error_type # Choose EINJv2 memory error + # echo 0xa > flags # set flags to indicate EINJv2 + # echo 1 > error_inject # Inject now + You should see something like this in dmesg:: =20 [22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR --=20 2.34.1