From nobody Thu Dec 18 09:50:24 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C9C3217704; Thu, 5 Dec 2024 12:01:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733400113; cv=none; b=q4ljS14Ve+YWjh1sSLyYynV1HxmceXd5LLEz+47RY9sfCo0WwMFRYq6LknhcK/FapFm6fruV3x2d2Kyp9CS6C9rTcZkATQRibTD3psuBhOz6bPT64G+bF4cLmHiacMxjwzhhApSxT3bqkgFfWhAlurSd71/zKAKAyHHu7hRLiIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733400113; c=relaxed/simple; bh=MD7MJgd0ceelkM7HmQYQUT1RE4VA3NQ/iyCzrpZcTwY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=d/0TXhbZU0U83ZgO6j3bibVRlYWU3prZZaeGZW/jFywMfXRTP04KD1+9ryi+95v7lhjraCTFa53Rss20hgfZXHaGHF4OEvlVnZPlqVSQVovu29oi6iijA4GamFuS4kYBxfAn8JYoBOzUslG/Cgnz7XL0oIaW9XavKABY377fI8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=XoG1bTkJ; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="XoG1bTkJ" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 4B5C1kSR1943306 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 5 Dec 2024 06:01:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1733400106; bh=i83+XyCVE1KwnX0mSRiSVl27kUFWH+OoIaPZSuRFm2k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XoG1bTkJ1yyBSGqWEFgrHrXy4odDQ/jWXsM0kZN7Uo1BLgYLT6XF+0NSpvh2ThM/C 23mhuGG3HDjtpSzqHBR67dA0hqGd4ga2I+8HrSyRvhvWBfjz+OaUBL8HaWTjg3cX+k 2uhoXkm3KpWoSsGnTRjLyErYKbthj6Bf63qBnr3U= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4B5C1kHQ107982 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 5 Dec 2024 06:01:46 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 5 Dec 2024 06:01:46 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 5 Dec 2024 06:01:45 -0600 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.72.81]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4B5C1Zp9018608; Thu, 5 Dec 2024 06:01:42 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH v2 2/2] arm64: dts: ti: k3-am62x-sk-common: Support SoC wakeup using USB1 wakeup Date: Thu, 5 Dec 2024 17:31:29 +0530 Message-ID: <20241205120134.754664-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241205120134.754664-1-s-vadapalli@ti.com> References: <20241205120134.754664-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup the SoC based on USB events triggered by USB devices. This requires that the pin corresponding to the Type-A connector remains pulled up even after the SoC has entered the Deep Sleep mode. Hence, enable Deep Sleep pullup / pulldown selection for the USB1_DRVVBUS pin and set its Deep Sleep state to PULL_UP. Signed-off-by: Siddharth Vadapalli --- v1: https://lore.kernel.org/r/20241112115650.988943-3-s-vadapalli@ti.com Changes since v1: - Rebased on next-20241204. arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am62x-sk-common.dtsi index 6957b3e44c82..8b6316454639 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -256,7 +256,7 @@ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_= TX_CTL */ =20 main_usb1_pins_default: main-usb1-default-pins { pinctrl-single,pins =3D < - AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */ + AM62X_IOPAD(0x0258, PIN_OUTPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP,= 0) /* (F18/E16) USB1_DRVVBUS */ >; }; =20 --=20 2.43.0