From nobody Fri Dec 19 04:54:38 2025 Received: from mail.steuer-voss.de (mail.steuer-voss.de [85.183.69.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16F741F9407 for ; Tue, 3 Dec 2024 19:11:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=85.183.69.95 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733253087; cv=none; b=UjTZmGKUCzmd6IWyUy7aNnee4MBjajzXU8HRyGFtlPEpRrMwzd1SUyTtQouUMvk6WfiBHRRDoYORgtPbbVKlhBFCOGmNgoJnQeaJbIjePflkyOPy3Fk33T+SZc0qZOe9uayFwvR+tRBVjhuztLgVRhaZhsJuoslvm5zyeOdqBkA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733253087; c=relaxed/simple; bh=Jnjj7vU+uMzKr6QUhfR2hjgDnzgmd93qAiccXLvATws=; h=From:Date:Subject:To:Cc:Message-Id; b=JLE0YwwRB9ziveboBC1XNy8MuKrtAV9y/IyAUJpQUx+h+1js++KBkOy8kRVC/WgQho+H4j+8i22TKqHgEgaQC2wRIMg8sH5d8hk6f9iU3IdX0OoAg8ha6g/8NkG5chy6kr2zc4tM5/pV0qgMTqEw/sosaf+SCpgvu/4ndG7063Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=vosn.de; spf=pass smtp.mailfrom=vosn.de; arc=none smtp.client-ip=85.183.69.95 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=vosn.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=vosn.de X-Virus-Scanned: Debian amavisd-new at mail.steuer-voss.de Received: by mail.steuer-voss.de (Postfix, from userid 1000) id 47B56F7; Tue, 3 Dec 2024 20:11:11 +0100 (CET) From: Nikolaus Voss Date: Tue, 3 Dec 2024 20:09:52 +0100 Subject: [PATCH v2] drm: bridge: fsl-ldb: fixup mode on freq mismatch To: Alexander Stein , Liu Ying , Luca Ceresoli , Fabio Estevam , Marek Vasut , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , miquel.raynal@bootlin.com, nikolaus.voss@haag-streit.com Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Message-Id: <20241203191111.47B56F7@mail.steuer-voss.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" LDB clock has to be a fixed multiple of the pixel clock. As LDB and pixel clock are derived from different clock sources (at least on imx8mp), this constraint cannot be satisfied for any pixel clock, which leads to flickering and incomplete lines on the attached display. To overcome this, check this condition in .atomic_check() and adapt the pixel clock accordingly. Cc: Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP = LDB bridge") Signed-off-by: Nikolaus Voss --- v2: - use .atomic_check() instead of .mode_fixup() (Dmitry Baryshkov) - add Fixes tag (Liu Ying) - use fsl_ldb_link_frequency() and drop const qualifier for struct fsl_ldb* (Liu Ying) drivers/gpu/drm/bridge/fsl-ldb.c | 33 ++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-= ldb.c index 0e4bac7dd04ff..5b09529564609 100644 --- a/drivers/gpu/drm/bridge/fsl-ldb.c +++ b/drivers/gpu/drm/bridge/fsl-ldb.c @@ -121,6 +121,38 @@ static int fsl_ldb_attach(struct drm_bridge *bridge, bridge, flags); } =20 +static int fsl_ldb_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *) +{ + struct fsl_ldb *fsl_ldb =3D to_fsl_ldb(bridge); + const struct drm_display_mode *mode =3D &crtc_state->mode; + unsigned long requested_link_freq =3D + fsl_ldb_link_frequency(fsl_ldb, mode->clock); + unsigned long freq =3D clk_round_rate(fsl_ldb->clk, requested_link_freq); + + if (freq !=3D requested_link_freq) { + /* + * this will lead to flicker and incomplete lines on + * the attached display, adjust the CRTC clock + * accordingly. + */ + struct drm_display_mode *adjusted_mode =3D &crtc_state->adjusted_mode; + int pclk =3D freq / fsl_ldb_link_frequency(fsl_ldb, 1); + + if (adjusted_mode->clock !=3D pclk) { + dev_warn(fsl_ldb->dev, "Adjusted pixel clk to match LDB clk (%d kHz -> = %d kHz)!\n", + adjusted_mode->clock, pclk); + + adjusted_mode->clock =3D pclk; + adjusted_mode->crtc_clock =3D pclk; + } + } + + return 0; +} + static void fsl_ldb_atomic_enable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { @@ -280,6 +312,7 @@ fsl_ldb_mode_valid(struct drm_bridge *bridge, =20 static const struct drm_bridge_funcs funcs =3D { .attach =3D fsl_ldb_attach, + .atomic_check =3D fsl_ldb_atomic_check, .atomic_enable =3D fsl_ldb_atomic_enable, .atomic_disable =3D fsl_ldb_atomic_disable, .atomic_duplicate_state =3D drm_atomic_helper_bridge_duplicate_state, --=20 2.43.0