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Mon, 02 Dec 2024 20:42:36 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B2Kga9i029657 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 2 Dec 2024 20:42:36 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 2 Dec 2024 12:42:35 -0800 From: Abhinav Kumar Date: Mon, 2 Dec 2024 12:42:00 -0800 Subject: [PATCH 3/3] drm/msm/dp: add a debugfs node for using tpg Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241202-tpg-v1-3-0fd6b518b914@quicinc.com> References: <20241202-tpg-v1-0-0fd6b518b914@quicinc.com> In-Reply-To: <20241202-tpg-v1-0-0fd6b518b914@quicinc.com> To: Rob Clark , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , "Simona Vetter" , Stephen Boyd , Kuogee Hsieh CC: , , , , "Jessica Zhang" , Abhinav Kumar X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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Expose a debugfs to use the TPG configuration to help debug DP issues. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/dp/dp_debug.c | 61 +++++++++++++++++++++++++++++++++++= ++++ drivers/gpu/drm/msm/dp/dp_panel.h | 2 ++ 2 files changed, 63 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_= debug.c index 22fd946ee201..843fe77268f8 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.c +++ b/drivers/gpu/drm/msm/dp/dp_debug.c @@ -197,6 +197,65 @@ static const struct file_operations test_active_fops = =3D { .write =3D msm_dp_test_active_write }; =20 +static ssize_t msm_dp_tpg_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + const struct msm_dp_debug_private *debug; + char *input_buffer; + int val; + int status =3D 0; + struct msm_dp_panel *dp_panel; + + debug =3D ((struct seq_file *)file->private_data)->private; + dp_panel =3D debug->panel; + + input_buffer =3D memdup_user_nul(ubuf, len); + if (IS_ERR(input_buffer)) + return PTR_ERR(input_buffer); + + status =3D kstrtoint(input_buffer, 10, &val); + if (status < 0) { + kfree(input_buffer); + return status; + } + + msm_dp_panel_tpg_config(dp_panel, val); + + dp_panel->tpg_enabled =3D val; + + kfree(input_buffer); + + *offp +=3D len; + return len; +} + +static int msm_dp_tpg_show(struct seq_file *f, void *data) +{ + struct msm_dp_debug_private *debug =3D f->private; + struct msm_dp_panel *dp_panel =3D debug->panel; + + if (dp_panel->tpg_enabled) + seq_puts(f, "1"); + else + seq_puts(f, "0"); + + return 0; +} + +static int msm_dp_tpg_open(struct inode *inode, struct file *file) +{ + return single_open(file, msm_dp_tpg_show, inode->i_private); +} + +static const struct file_operations msm_dp_tpg_fops =3D { + .owner =3D THIS_MODULE, + .open =3D msm_dp_tpg_open, + .read =3D seq_read, + .llseek =3D seq_lseek, + .release =3D single_release, + .write =3D msm_dp_tpg_write +}; + int msm_dp_debug_init(struct device *dev, struct msm_dp_panel *panel, struct msm_dp_link *link, struct drm_connector *connector, @@ -231,6 +290,8 @@ int msm_dp_debug_init(struct device *dev, struct msm_dp= _panel *panel, debugfs_create_file("dp_test_type", 0444, root, debug, &msm_dp_test_type_fops); + + debugfs_create_file("dp_tpg", 0444, root, debug, &msm_dp_tpg_fops); } =20 return 0; diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_= panel.h index 0e944db3adf2..7910b11fd685 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.h +++ b/drivers/gpu/drm/msm/dp/dp_panel.h @@ -50,6 +50,8 @@ struct msm_dp_panel { u32 max_dp_link_rate; =20 u32 max_bw_code; + + bool tpg_enabled; }; =20 int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel); --=20 2.34.1