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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241202-fd-dp-audio-fixup-v2-6-d9187ea96dad@linaro.org> References: <20241202-fd-dp-audio-fixup-v2-0-d9187ea96dad@linaro.org> In-Reply-To: <20241202-fd-dp-audio-fixup-v2-0-d9187ea96dad@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Paloma Arellano Cc: Douglas Anderson , Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=11775; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=a22N/Iog56veNS4AL1IWOgvaXb8i6uVs0B8X4ErpUrY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnTYatRfpWK9GK1ECOk8PcAmkh3zuzFlINY7EeQ 15lVfcJS9KJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ02GrQAKCRCLPIo+Aiko 1YfUB/9SjJmavQhGtsDPmU3pJl8nCQXsVtaPJkVA55bC4/BXFVmD7Ow5PZsfmt1glHxN17It3GH NZMcrvQUUz6Tq3U7De24mmcjr69CE1Q5r+YSFMW4sn7FOmq9m0GQmZP+P+dkucaKb4sWzjMZTUc EY7UzHBxJ8WhwmRHouF+/ZxdouQvBgeFOj6kj+W2FzXCnTF82Tqo0HBCTza1MUuZgZt/v1b1yf+ UKiCtWuuv98XqgWF44slDK53PHtDrFpQtK7SXC+Eue79iQVCQ17zsfO0m547ZNN/SvHHFej58gX TS7j6K/tLhs4VWFBIQj8VKRJOP8uOzGFeoykZilw5Uklm5Ja X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Move all register-level functions to dp_aux.c, inlining one line wrappers during this process. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_aux.c | 98 +++++++++++++++++++++++++++++++--= ---- drivers/gpu/drm/msm/dp/dp_catalog.c | 96 ---------------------------------= --- drivers/gpu/drm/msm/dp/dp_catalog.h | 9 ---- 3 files changed, 84 insertions(+), 119 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_au= x.c index bc8d46abfc619d669dce339477d58fb0c464a3ea..46e8a2e13ac1d1249fbad9b50a6= d64c52d51cf38 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.c +++ b/drivers/gpu/drm/msm/dp/dp_aux.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include =20 @@ -45,6 +46,73 @@ struct msm_dp_aux_private { struct drm_dp_aux msm_dp_aux; }; =20 +static int msm_dp_aux_clear_hw_interrupts(struct msm_dp_aux_private *aux) +{ + struct msm_dp_catalog *msm_dp_catalog =3D aux->catalog; + + msm_dp_read_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS); + msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); + msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); + msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0); + + return 0; +} + +/* + * NOTE: resetting AUX controller will also clear any pending HPD related = interrupts + */ +static void msm_dp_aux_reset(struct msm_dp_aux_private *aux) +{ + struct msm_dp_catalog *msm_dp_catalog =3D aux->catalog; + u32 aux_ctrl; + + aux_ctrl =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL); + + aux_ctrl |=3D DP_AUX_CTRL_RESET; + msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); + usleep_range(1000, 1100); /* h/w recommended delay */ + + aux_ctrl &=3D ~DP_AUX_CTRL_RESET; + msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); +} + +static void msm_dp_aux_enable(struct msm_dp_aux_private *aux) +{ + struct msm_dp_catalog *msm_dp_catalog =3D aux->catalog; + u32 aux_ctrl; + + aux_ctrl =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL); + + msm_dp_write_aux(msm_dp_catalog, REG_DP_TIMEOUT_COUNT, 0xffff); + msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_LIMITS, 0xffff); + + aux_ctrl |=3D DP_AUX_CTRL_ENABLE; + msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); +} + +static void msm_dp_aux_disable(struct msm_dp_aux_private *aux) +{ + struct msm_dp_catalog *msm_dp_catalog =3D aux->catalog; + u32 aux_ctrl; + + aux_ctrl =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL); + aux_ctrl &=3D ~DP_AUX_CTRL_ENABLE; + msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); +} + +static int msm_dp_aux_wait_for_hpd_connect_state(struct msm_dp_aux_private= *aux, + unsigned long wait_us) +{ + struct msm_dp_catalog *msm_dp_catalog =3D aux->catalog; + u32 state; + + /* poll for hpd connected status every 2ms and timeout after wait_us */ + return readl_poll_timeout(msm_dp_catalog->aux_base + + REG_DP_DP_HPD_INT_STATUS, + state, state & DP_DP_HPD_STATE_STATUS_CONNECTED, + min(wait_us, 2000), wait_us); +} + #define MAX_AUX_RETRIES 5 =20 static ssize_t msm_dp_aux_write(struct msm_dp_aux_private *aux, @@ -88,11 +156,11 @@ static ssize_t msm_dp_aux_write(struct msm_dp_aux_priv= ate *aux, /* index =3D 0, write */ if (i =3D=3D 0) reg |=3D DP_AUX_DATA_INDEX_WRITE; - msm_dp_catalog_aux_write_data(aux->catalog, reg); + msm_dp_write_aux(aux->catalog, REG_DP_AUX_DATA, reg); } =20 - msm_dp_catalog_aux_clear_trans(aux->catalog, false); - msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog); + msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, 0); + msm_dp_aux_clear_hw_interrupts(aux); =20 reg =3D 0; /* Transaction number =3D=3D 1 */ if (!aux->native) { /* i2c */ @@ -106,7 +174,7 @@ static ssize_t msm_dp_aux_write(struct msm_dp_aux_priva= te *aux, } =20 reg |=3D DP_AUX_TRANS_CTRL_GO; - msm_dp_catalog_aux_write_trans(aux->catalog, reg); + msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, reg); =20 return len; } @@ -139,20 +207,22 @@ static ssize_t msm_dp_aux_cmd_fifo_rx(struct msm_dp_a= ux_private *aux, u32 i, actual_i; u32 len =3D msg->size; =20 - msm_dp_catalog_aux_clear_trans(aux->catalog, true); + data =3D msm_dp_read_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL); + data &=3D ~DP_AUX_TRANS_CTRL_GO; + msm_dp_write_aux(aux->catalog, REG_DP_AUX_TRANS_CTRL, data); =20 data =3D DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */ data |=3D DP_AUX_DATA_READ; /* read */ =20 - msm_dp_catalog_aux_write_data(aux->catalog, data); + msm_dp_write_aux(aux->catalog, REG_DP_AUX_DATA, data); =20 dp =3D msg->buffer; =20 /* discard first byte */ - data =3D msm_dp_catalog_aux_read_data(aux->catalog); + data =3D msm_dp_read_aux(aux->catalog, REG_DP_AUX_DATA); =20 for (i =3D 0; i < len; i++) { - data =3D msm_dp_catalog_aux_read_data(aux->catalog); + data =3D msm_dp_read_aux(aux->catalog, REG_DP_AUX_DATA); *dp++ =3D (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff); =20 actual_i =3D (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF; @@ -336,7 +406,7 @@ static ssize_t msm_dp_aux_transfer(struct drm_dp_aux *m= sm_dp_aux, } /* reset aux if link is in connected state */ if (msm_dp_catalog_link_is_connected(aux->catalog)) - msm_dp_catalog_aux_reset(aux->catalog); + msm_dp_aux_reset(aux); } else { aux->retry_cnt =3D 0; switch (aux->aux_error_num) { @@ -403,7 +473,7 @@ irqreturn_t msm_dp_aux_isr(struct drm_dp_aux *msm_dp_au= x) =20 if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num =3D DP_AUX_ERR_PHY; - msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog); + msm_dp_aux_clear_hw_interrupts(aux); } else if (isr & DP_INTR_NACK_DEFER) { aux->aux_error_num =3D DP_AUX_ERR_NACK_DEFER; } else if (isr & DP_INTR_WRONG_ADDR) { @@ -444,7 +514,7 @@ void msm_dp_aux_reconfig(struct drm_dp_aux *msm_dp_aux) aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 phy_calibrate(aux->phy); - msm_dp_catalog_aux_reset(aux->catalog); + msm_dp_aux_reset(aux); } =20 void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux) @@ -460,7 +530,7 @@ void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux) =20 mutex_lock(&aux->mutex); =20 - msm_dp_catalog_aux_enable(aux->catalog, true); + msm_dp_aux_enable(aux); aux->retry_cnt =3D 0; aux->initted =3D true; =20 @@ -476,7 +546,7 @@ void msm_dp_aux_deinit(struct drm_dp_aux *msm_dp_aux) mutex_lock(&aux->mutex); =20 aux->initted =3D false; - msm_dp_catalog_aux_enable(aux->catalog, false); + msm_dp_aux_disable(aux); =20 mutex_unlock(&aux->mutex); } @@ -517,7 +587,7 @@ static int msm_dp_wait_hpd_asserted(struct drm_dp_aux *= msm_dp_aux, if (ret) return ret; =20 - ret =3D msm_dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog, wait_= us); + ret =3D msm_dp_aux_wait_for_hpd_connect_state(aux, wait_us); pm_runtime_put_sync(aux->dev); =20 return ret; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/d= p_catalog.c index bd9d875ca7a66aba7875085b977e75c55ba91578..5804231ac3ffcd13907fe6b09ee= 309150ef7b028 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -78,102 +78,6 @@ void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm= _dp_catalog, struct msm_d msm_disp_snapshot_add_block(disp_state, msm_dp_catalog->p0_len, msm_dp_ca= talog->p0_base, "dp_p0"); } =20 -/* aux related catalog functions */ -u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog) -{ - return msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_DATA); -} - -int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u= 32 data) -{ - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_DATA, data); - return 0; -} - -int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, = u32 data) -{ - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, data); - return 0; -} - -int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, = bool read) -{ - u32 data; - - if (read) { - data =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL); - data &=3D ~DP_AUX_TRANS_CTRL_GO; - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, data); - } else { - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_TRANS_CTRL, 0); - } - return 0; -} - -int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_c= atalog) -{ - msm_dp_read_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS); - msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); - msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); - msm_dp_write_aux(msm_dp_catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0); - return 0; -} - -/** - * msm_dp_catalog_aux_reset() - reset AUX controller - * - * @msm_dp_catalog: DP catalog structure - * - * return: void - * - * This function reset AUX controller - * - * NOTE: reset AUX controller will also clear any pending HPD related inte= rrupts - *=20 - */ -void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog) -{ - u32 aux_ctrl; - - aux_ctrl =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL); - - aux_ctrl |=3D DP_AUX_CTRL_RESET; - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); - usleep_range(1000, 1100); /* h/w recommended delay */ - - aux_ctrl &=3D ~DP_AUX_CTRL_RESET; - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); -} - -void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool= enable) -{ - u32 aux_ctrl; - - aux_ctrl =3D msm_dp_read_aux(msm_dp_catalog, REG_DP_AUX_CTRL); - - if (enable) { - msm_dp_write_aux(msm_dp_catalog, REG_DP_TIMEOUT_COUNT, 0xffff); - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_LIMITS, 0xffff); - aux_ctrl |=3D DP_AUX_CTRL_ENABLE; - } else { - aux_ctrl &=3D ~DP_AUX_CTRL_ENABLE; - } - - msm_dp_write_aux(msm_dp_catalog, REG_DP_AUX_CTRL, aux_ctrl); -} - -int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *m= sm_dp_catalog, - unsigned long wait_us) -{ - u32 state; - - /* poll for hpd connected status every 2ms and timeout after wait_us */ - return readl_poll_timeout(msm_dp_catalog->aux_base + - REG_DP_DP_HPD_INT_STATUS, - state, state & DP_DP_HPD_STATE_STATUS_CONNECTED, - min(wait_us, 2000), wait_us); -} - u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog) { u32 intr, intr_ack; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/d= p_catalog.h index 2c500dc0898edfe1d6bdac2eedf3c1b78056cf6b..6dea28c5e97e8f939a71b008f95= 980ea55b13bff 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -133,15 +133,6 @@ static inline void msm_dp_write_link(struct msm_dp_cat= alog *msm_dp_catalog, void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct= msm_disp_state *disp_state); =20 /* AUX APIs */ -u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog); -int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u= 32 data); -int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, = u32 data); -int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, = bool read); -int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_c= atalog); -void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog); -void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool= enable); -int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *m= sm_dp_catalog, - unsigned long wait_us); u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog); =20 /* DP Controller APIs */ --=20 2.39.5