From nobody Wed Dec 4 19:10:13 2024 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D24291DE4E6 for ; Mon, 2 Dec 2024 20:28:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733171303; cv=none; b=NzSkjo0ruieQ0LPS11urO/BSUapv19Y+OONfyZLCH+BWjtwCZSlfOevQoPG0nvYAE/iAtI23PK3VmtJlf2iAj/GJ2sTLMo41FhyawL/b60UtVg03qoEUCUIPTitUtDqzW9KhaYFIuWh7z6uux6gy0KvFwUeV5c+N040SBNO9iqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733171303; c=relaxed/simple; bh=rBKYTLNDOW58j3hrrUdo0WdSxf4pv9UIQrcg23u2TeI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=L7fvxylcYC97iCrocDVN4+fjkFmhVOAyYcp0s2q95E4VA4cV/78gbkoKXiPGbGi4H8tukgj/mvzW19jnoNeJKXYdEoH4wxAsuMTsOYUcNup10lQj0eV3rYRUFzVI8KZQ5OZrnqHzLm33UwZapGSfdwecqAOUcV193fvmJ9r8hDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=PkhjGQyJ; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PkhjGQyJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1733171298; bh=rBKYTLNDOW58j3hrrUdo0WdSxf4pv9UIQrcg23u2TeI=; h=From:Date:Subject:To:Cc:From; b=PkhjGQyJ4/Fevt7ZCrl+pKRnMo03LMwldD/4TjcRFA64a1e+Yanmovbl+JYFnmBEB Kcy403oV5TKa8+BiYZk4GjmpZK+9znodpZku2DRXsy7PCG2GDIhvo1ZOw5R5N8w+oj nzkes2CoQicHSXlYjx7IY+O7WLgaJkLTQzLqXoT66xwhiy7B5rIwMZhKo+0+aaeyW0 mLf1wG+dg4PwxWhMCJv3iLBPE8cl2kh3qL+ooG7jwX28NPsHqUCrqJT5L2HLSqHauV VKPBCRpeK7r95320h6FmGV0BT3zgvn/a1xNDHNFPFjfVvpm5IemPeSH1JegTYLUxY/ ywJbbG9T/GmEg== Received: from localhost (unknown [86.120.21.57]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id A3D4D17E37E4; Mon, 2 Dec 2024 21:28:18 +0100 (CET) From: Cristian Ciocaltea Date: Mon, 02 Dec 2024 22:27:34 +0200 Subject: [PATCH] drm/rockchip: dw_hdmi_qp: Simplify clock handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241202-dw-hdmi-qp-rk-clk-bulk-v1-1-60a7cc9cd74e@collabora.com> X-B4-Tracking: v=1; b=H4sIADUYTmcC/x2MSQqAMAwAvyI5G2irgvgV8aBttMG9xQXEvxu8D Mxh5oFIgSlClTwQ6OTI6yKi0wSsb5eBkJ04GGVyLUB3oXcz475hGNFOI3aHIHN9q3RhqNQ5SLw F6vn+x3Xzvh9C6epiaAAAAA== X-Change-ID: 20241202-dw-hdmi-qp-rk-clk-bulk-3dfa0152e814 To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Make use of the recently introduced devm_clk_bulk_get_all_enabled() helper to simplify the code a bit. Signed-off-by: Cristian Ciocaltea --- drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 28 +++++++++++++---------= ---- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/d= rm/rockchip/dw_hdmi_qp-rockchip.c index c8b362cc2b95fd490029a9c0552ad9fbc5631d17..20ecc0729db9f5e321041ae7b33= 49bff5246a926 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c @@ -214,17 +214,13 @@ MODULE_DEVICE_TABLE(of, dw_hdmi_qp_rockchip_dt_ids); static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *mas= ter, void *data) { - static const char * const clk_names[] =3D { - "pclk", "earc", "aud", "hdp", "hclk_vo1", - "ref" /* keep "ref" last */ - }; struct platform_device *pdev =3D to_platform_device(dev); struct dw_hdmi_qp_plat_data plat_data; struct drm_device *drm =3D data; struct drm_connector *connector; struct drm_encoder *encoder; struct rockchip_hdmi_qp *hdmi; - struct clk *clk; + struct clk_bulk_data *clks; int ret, irq, i; u32 val; =20 @@ -270,18 +266,22 @@ static int dw_hdmi_qp_rockchip_bind(struct device *de= v, struct device *master, return PTR_ERR(hdmi->vo_regmap); } =20 - for (i =3D 0; i < ARRAY_SIZE(clk_names); i++) { - clk =3D devm_clk_get_enabled(hdmi->dev, clk_names[i]); + ret =3D devm_clk_bulk_get_all_enabled(hdmi->dev, &clks); + if (ret < 0) { + drm_err(hdmi, "Failed to get clocks: %d\n", ret); + return ret; + } =20 - if (IS_ERR(clk)) { - ret =3D PTR_ERR(clk); - if (ret !=3D -EPROBE_DEFER) - drm_err(hdmi, "Failed to get %s clock: %d\n", - clk_names[i], ret); - return ret; + for (i =3D 0; i < ret; i++) { + if (!strcmp(clks[i].id, "ref")) { + hdmi->ref_clk =3D clks[1].clk; + break; } } - hdmi->ref_clk =3D clk; + if (!hdmi->ref_clk) { + drm_err(hdmi, "Missing ref clock\n"); + return -EINVAL; + } =20 hdmi->enable_gpio =3D devm_gpiod_get_optional(hdmi->dev, "enable", GPIOD_OUT_HIGH); --- base-commit: 40384c840ea1944d7c5a392e8975ed088ecf0b37 change-id: 20241202-dw-hdmi-qp-rk-clk-bulk-3dfa0152e814