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Sun, 01 Dec 2024 08:00:56 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH v4 05/10] arm64: dts: apple: t7001: Add PMGR node Date: Sun, 1 Dec 2024 23:56:42 +0800 Message-ID: <20241201155820.29259-6-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241201155820.29259-1-towinchenmi@gmail.com> References: <20241201155820.29259-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This adds the PMGR node and all known power state subnodes. Since there are a large number of them, let's put them in a separate file to include. Acked-by: Hector Martin Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t7001-air2.dtsi | 1 + arch/arm64/boot/dts/apple/t7001-pmgr.dtsi | 650 ++++++++++++++++++++++ arch/arm64/boot/dts/apple/t7001.dtsi | 13 + 3 files changed, 664 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t7001-pmgr.dtsi diff --git a/arch/arm64/boot/dts/apple/t7001-air2.dtsi b/arch/arm64/boot/dt= s/apple/t7001-air2.dtsi index 19fabd425c52..e4ec8c1977de 100644 --- a/arch/arm64/boot/dts/apple/t7001-air2.dtsi +++ b/arch/arm64/boot/dts/apple/t7001-air2.dtsi @@ -20,6 +20,7 @@ chosen { framebuffer0: framebuffer@0 { compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; reg =3D <0 0 0 0>; /* To be filled by loader */ + power-domains =3D <&ps_disp0 &ps_dp>; /* Format properties will be added by loader */ status =3D "disabled"; }; diff --git a/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t7001-pmgr.dtsi new file mode 100644 index 000000000000..7321cfdcd189 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-pmgr.dtsi @@ -0,0 +1,650 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T7001 "A8X" SoC + * + * Copyright (c) 2024, Nick Chan + */ + +&pmgr { + ps_cpu0: power-controller@20000 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "cpu0"; + apple,always-on; /* Core device */ + }; + + ps_cpu1: power-controller@20008 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "cpu1"; + apple,always-on; /* Core device */ + }; + + ps_cpu2: power-controller@20010 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "cpu2"; + apple,always-on; /* Core device */ + }; + + ps_cpm: power-controller@20040 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20040 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "cpm"; + apple,always-on; /* Core device */ + }; + + ps_sio_p: power-controller@201f8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_p"; + }; + + ps_lio: power-controller@20100 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "lio"; + apple,always-on; /* Core device */ + }; + + ps_iomux: power-controller@20108 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "iomux"; + apple,always-on; /* Core device */ + }; + + ps_aic: power-controller@20110 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + apple,always-on; /* Core device */ + }; + + ps_debug: power-controller@20118 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug"; + }; + + ps_dwi: power-controller@20120 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@20128 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_mca0: power-controller@20130 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_mca1: power-controller@20138 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca1"; + power-domains =3D <&ps_sio_p>; + }; + + ps_mca2: power-controller@20140 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca2"; + power-domains =3D <&ps_sio_p>; + }; + + ps_mca3: power-controller@20148 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca3"; + power-domains =3D <&ps_sio_p>; + }; + + ps_mca4: power-controller@20150 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca4"; + power-domains =3D <&ps_sio_p>; + }; + + ps_pwm0: power-controller@20158 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pwm0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_i2c0: power-controller@20160 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_i2c1: power-controller@20168 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + power-domains =3D <&ps_sio_p>; + }; + + ps_i2c2: power-controller@20170 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + power-domains =3D <&ps_sio_p>; + }; + + ps_i2c3: power-controller@20178 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + power-domains =3D <&ps_sio_p>; + }; + + ps_spi0: power-controller@20180 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_spi1: power-controller@20188 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_sio_p>; + }; + + ps_spi2: power-controller@20190 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_sio_p>; + }; + + ps_spi3: power-controller@20198 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart0: power-controller@201a0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart1: power-controller@201a8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart2: power-controller@201b0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart3: power-controller@201b8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart4: power-controller@201c0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart5: power-controller@201c8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart6: power-controller@201d0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart6"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart7: power-controller@201d8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart7"; + power-domains =3D <&ps_sio_p>; + }; + + ps_uart8: power-controller@201e0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart8"; + power-domains =3D <&ps_sio_p>; + }; + + ps_aes0: power-controller@201e8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes0"; + power-domains =3D <&ps_sio_p>; + }; + + ps_sio: power-controller@201f0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x201f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio"; + power-domains =3D <&ps_sio_p>; + apple,always-on; /* Core device */ + }; + + ps_usb: power-controller@20248 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usb"; + }; + + ps_usbctrl: power-controller@20250 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usbctrl"; + power-domains =3D <&ps_usb>; + }; + + ps_usb2host0: power-controller@20258 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usb2host0"; + power-domains =3D <&ps_usbctrl>; + }; + + ps_usb2host1: power-controller@20268 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usb2host1"; + power-domains =3D <&ps_usbctrl>; + }; + + ps_usb2host2: power-controller@20278 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usb2host2"; + power-domains =3D <&ps_usbctrl>; + }; + + ps_disp_busmux: power-controller@202a8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_busmux"; + }; + + ps_disp1_busmux: power-controller@202c0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp1_busmux"; + }; + + ps_media: power-controller@202d8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "media"; + }; + + ps_isp: power-controller@202d0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp"; + }; + + ps_msr: power-controller@202e0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + power-domains =3D <&ps_media>; + }; + + ps_jpg: power-controller@202e8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + power-domains =3D <&ps_media>; + }; + + ps_disp0: power-controller@202b0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp0"; + power-domains =3D <&ps_disp_busmux>; + }; + + ps_disp1: power-controller@202c8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp1"; + power-domains =3D <&ps_disp1_busmux>; + }; + + ps_pcie_ref: power-controller@20220 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pcie_ref"; + }; + + ps_hsic0_phy: power-controller@20200 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "hsic0_phy"; + power-domains =3D <&ps_usb2host1>; + }; + + ps_hsic1_phy: power-controller@20208 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "hsic1_phy"; + power-domains =3D <&ps_usb2host2>; + }; + + ps_ispsens0: power-controller@20210 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens0"; + }; + + ps_ispsens1: power-controller@20218 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens1"; + }; + + ps_mcc: power-controller@20230 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mcc"; + apple,always-on; /* Memory cache controller */ + }; + + ps_mcu: power-controller@20238 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mcu"; + apple,always-on; /* Core device */ + }; + + ps_amp: power-controller@20240 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "amp"; + apple,always-on; /* Core device */ + }; + + ps_usb2host0_ohci: power-controller@20260 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usb2host0_ohci"; + power-domains =3D <&ps_usb2host0>; + }; + + ps_usbotg: power-controller@20288 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "usbotg"; + power-domains =3D <&ps_usbctrl>; + }; + + ps_smx: power-controller@20290 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "smx"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_sf: power-controller@20298 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sf"; + apple,always-on; /* Apple fabric, critical block */ + }; + + ps_cp: power-controller@202a0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "cp"; + apple,always-on; /* Core device */ + }; + + ps_dp: power-controller@202b8 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dp"; + power-domains =3D <&ps_disp0>; + }; + + ps_vdec: power-controller@202f0 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x202f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "vdec"; + power-domains =3D <&ps_media>; + }; + + ps_ans: power-controller@20318 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + }; + + ps_venc: power-controller@20300 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc"; + power-domains =3D <&ps_media>; + }; + + ps_pcie: power-controller@20308 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pcie"; + }; + + ps_pcie_aux: power-controller@20310 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pcie_aux"; + }; + + ps_gfx: power-controller@20320 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + }; + + ps_sep: power-controller@20400 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x20400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; /* Locked on */ + }; + + ps_venc_pipe: power-controller@21000 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x21000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe"; + power-domains =3D <&ps_venc>; + }; + + ps_venc_me0: power-controller@21008 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x21008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me0"; + power-domains =3D <&ps_venc>; + }; + + ps_venc_me1: power-controller@21010 { + compatible =3D "apple,t7000-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg =3D <0x21010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me1"; + power-domains =3D <&ps_venc>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t7001.dtsi b/arch/arm64/boot/dts/app= le/t7001.dtsi index a76e034c85e3..c471f57cca0e 100644 --- a/arch/arm64/boot/dts/apple/t7001.dtsi +++ b/arch/arm64/boot/dts/apple/t7001.dtsi @@ -72,9 +72,18 @@ serial0: serial@20a0c0000 { /* Use the bootloader-enabled clocks for now. */ clocks =3D <&clkref>, <&clkref>; clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; status =3D "disabled"; }; =20 + pmgr: power-management@20e000000 { + compatible =3D "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x2 0xe000000 0 0x24000>; + }; + wdt: watchdog@20e027000 { compatible =3D "apple,t7000-wdt", "apple,wdt"; reg =3D <0x2 0x0e027000 0x0 0x1000>; @@ -88,11 +97,13 @@ aic: interrupt-controller@20e100000 { reg =3D <0x2 0x0e100000 0x0 0x100000>; #interrupt-cells =3D <3>; interrupt-controller; + power-domains =3D <&ps_aic>; }; =20 pinctrl: pinctrl@20e300000 { compatible =3D "apple,t7000-pinctrl", "apple,pinctrl"; reg =3D <0x2 0x0e300000 0x0 0x100000>; + power-domains =3D <&ps_gpio>; =20 gpio-controller; #gpio-cells =3D <2>; @@ -121,3 +132,5 @@ timer { ; }; }; + +#include "t7001-pmgr.dtsi" --=20 2.47.1