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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241130-fix-board-clocks-v2-23-b9a35858657e@linaro.org> References: <20241130-fix-board-clocks-v2-0-b9a35858657e@linaro.org> In-Reply-To: <20241130-fix-board-clocks-v2-0-b9a35858657e@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Leo Yan , Joseph Gates , Georgi Djakov , Shawn Guo , Stephan Gerhold , Zac Crosby , =?utf-8?q?Bastian_K=C3=B6cher?= , Andy Gross , Jeremy McNicoll , Rohit Agarwal , Melody Olvera , Bhupesh Sharma , cros-qcom-dts-watchers@chromium.org, Stephen Boyd , Rajendra Nayak , Martin Botka , Jonathan Marek , Vinod Koul , Tengfei Fan , Fenglin Wu , Neil Armstrong , Abel Vesa , Alexandru Marc Serdeliuc , Vladimir Zapolskiy , Sibi Sankar , Bryan O'Donoghue , Jun Nie , James Willcox , Max Chen , Vincent Knecht , Benjamin Li , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1889; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=TFWNpIU22nTtjPrBPXwtPtG3hCCyX6t5KRLVmL2rE50=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnSm32BPMAQzJKXT1aKXkF5qYTSpCJQIfHXE2my 6SNtnGP5byJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ0pt9gAKCRCLPIo+Aiko 1VftB/4tg537UIMUbY1WMczWqB7pmkYZ2dep2XLl49J6S7jzVpYMtJQ0gBHxn0XKdqr3xmVpHMb ax6cNI82ZVKw+SWOTSWx+XDnuc0K447lUePZsUR7nZHlRL2SKInS70FO+iaLtcyIRw6oMBV+Gwv lW3qMTYxCpgDyYylXm2anXXk1nLLSy5bqClG4rf5IH0L00v4jvhtp+9FopVoElgbei3jn229L1A cN9tcW1NVynok0I14k25KpNevwEiJVAPIkjDmKHI1iJlAEvTdkXHEp0njKj0JJg5eLwkV6nzF/+ +V7U6G9LJThc4ns/dzJuBR5SeysoVd2hKLcXeNXLhzABCl7m X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A IPQ9574 is one of the platforms where board-level clocks (XO, sleep) definitions are split between the SoC dtsi file and the board file. This is not optimal, as the clocks are a part of the SoC + PMICs design. Frequencies are common for the whole set of devices using the same SoC. Remove the split and move frequencies to the SoC DTSI file. Suggested-by: Bjorn Andersson Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 8 -------- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/= boot/dts/qcom/ipq9574-rdp-common.dtsi index 91e104b0f86534ce02349c7b69b36f4c5e602c6d..d1af7c55f6256e9297c86df2b3a= 1ab68fc636862 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi @@ -114,10 +114,6 @@ mp5496_l2: l2 { }; }; =20 -&sleep_clk { - clock-frequency =3D <32000>; -}; - &tlmm { spi_0_pins: spi-0-state { pins =3D "gpio11", "gpio12", "gpio13", "gpio14"; @@ -163,7 +159,3 @@ &usb_0_qusbphy { &usb3 { status =3D "okay"; }; - -&xo_board_clk { - clock-frequency =3D <24000000>; -}; diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index d1fd35ebc4a28bafee77e7be441709f99f482558..7e519db962d140989887f6ca9cc= 270a6666dfb58 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -22,11 +22,13 @@ clocks { sleep_clk: sleep-clk { compatible =3D "fixed-clock"; #clock-cells =3D <0>; + clock-frequency =3D <32000>; }; =20 xo_board_clk: xo-board-clk { compatible =3D "fixed-clock"; #clock-cells =3D <0>; + clock-frequency =3D <24000000>; }; }; =20 --=20 2.39.5