From nobody Sat Feb 7 14:39:30 2026 Received: from smtp-fw-6001.amazon.com (smtp-fw-6001.amazon.com [52.95.48.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C90E917ADF7 for ; Fri, 29 Nov 2024 11:31:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=52.95.48.154 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732879892; cv=none; b=lDvG/sgPeimDNW0DWhmza0I19w3odrfrWPLXEKs/PdHtOLAOoiX2X9ph3ybWs4lTS7Mfl98iejcE7UbwW0mT9fZQqEUihZBkJAYcqDlPDUzKVXKBONyHaf6oDMQ1Tf7dEZEvnZoYgh/VLVWBLnI7DoCDQ4T0MomyQ2qgvdx89yo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732879892; c=relaxed/simple; bh=r00Dn9iao+zxhhw0m61/ll9tt8Br9ZSm5Yz2aaGq46A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bG6LFMX1o8oj6wTLxO1bBvnLv/nvvENn2pGQG4zy49s0g/883OXk8vxs13Ho/d8p7gxs+pyPhujdh+E++i8acyNnW06ry1ROKpktB333SS63zGMN5wDy4bfgiCHZIyW5gfs4zHEo4iU5grrNmjNVtAvOKMjJAe/yVgO9Ig7axfo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com; spf=pass smtp.mailfrom=amazon.com; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b=mjgWYGSB; arc=none smtp.client-ip=52.95.48.154 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amazon.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b="mjgWYGSB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1732879891; x=1764415891; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PxmNV7GjQJp/WjqJilccpNw4h74oTGMlOElZP81PE90=; b=mjgWYGSBbEK8UanOtm1luTD9FjfV2RhOyWonVWDY6n6sSNE0Wt6TT1zD o82PYBhsFNnTh0r0vKax5s/7sfBl9AMskvxeREK3frW6MBckXZbyyYlpa uA01QLA9vEc6xy6MhtUk7YPugchGmG0tBwCqhEHWeiawHtdnsbIDpFZi7 8=; X-IronPort-AV: E=Sophos;i="6.12,195,1728950400"; d="scan'208";a="441793920" Received: from iad6-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.124.125.2]) by smtp-border-fw-6001.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2024 11:31:24 +0000 Received: from EX19MTAUWB002.ant.amazon.com [10.0.38.20:62811] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.32.230:2525] with esmtp (Farcaster) id 7f123ea5-1e55-4e73-b57a-c0691d28a7da; Fri, 29 Nov 2024 11:31:24 +0000 (UTC) X-Farcaster-Flow-ID: 7f123ea5-1e55-4e73-b57a-c0691d28a7da Received: from EX19D013UWA002.ant.amazon.com (10.13.138.210) by EX19MTAUWB002.ant.amazon.com (10.250.64.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Fri, 29 Nov 2024 11:31:20 +0000 Received: from EX19MTAUWC001.ant.amazon.com (10.250.64.145) by EX19D013UWA002.ant.amazon.com (10.13.138.210) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Fri, 29 Nov 2024 11:31:19 +0000 Received: from email-imr-corp-prod-pdx-all-2c-785684ef.us-west-2.amazon.com (10.25.36.210) by mail-relay.amazon.com (10.250.64.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34 via Frontend Transport; Fri, 29 Nov 2024 11:31:19 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com [172.19.116.181]) by email-imr-corp-prod-pdx-all-2c-785684ef.us-west-2.amazon.com (Postfix) with ESMTP id A0A2DA02BC; Fri, 29 Nov 2024 11:31:19 +0000 (UTC) Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 37ADB2ED2; Fri, 29 Nov 2024 11:31:19 +0000 (UTC) From: Eliav Farber To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH v4 1/2] kexec: Consolidate machine_kexec_mask_interrupts() implementation Date: Fri, 29 Nov 2024 11:31:18 +0000 Message-ID: <20241129113119.26669-2-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20241129113119.26669-1-farbere@amazon.com> References: <20241129113119.26669-1-farbere@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the machine_kexec_mask_interrupts function to a common location in kernel/kexec_core.c, removing duplicate implementations from architecture specific files (arch/arm, arch/arm64, arch/powerpc, and arch/riscv). This consolidation reduces code duplication and improves maintainability. The unified function includes an architecture-specific behavior for CONFIG_ARM64 by conditionally clearing the active interrupt state before handling other interrupt masking operations. Signed-off-by: Eliav Farber --- V4 -> V3: Add missing include. arch/arm/kernel/machine_kexec.c | 23 --------------------- arch/arm64/kernel/machine_kexec.c | 31 ----------------------------- arch/powerpc/include/asm/kexec.h | 1 - arch/powerpc/kexec/core.c | 22 --------------------- arch/riscv/kernel/machine_kexec.c | 23 --------------------- include/linux/kexec.h | 2 ++ kernel/kexec_core.c | 33 +++++++++++++++++++++++++++++++ 7 files changed, 35 insertions(+), 100 deletions(-) diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexe= c.c index 80ceb5bd2680..dd430477e7c1 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -127,29 +127,6 @@ void crash_smp_send_stop(void) cpus_stopped =3D 1; } =20 -static void machine_kexec_mask_interrupts(void) -{ - unsigned int i; - struct irq_desc *desc; - - for_each_irq_desc(i, desc) { - struct irq_chip *chip; - - chip =3D irq_desc_get_chip(desc); - if (!chip) - continue; - - if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) - chip->irq_eoi(&desc->irq_data); - - if (chip->irq_mask) - chip->irq_mask(&desc->irq_data); - - if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) - chip->irq_disable(&desc->irq_data); - } -} - void machine_crash_shutdown(struct pt_regs *regs) { local_irq_disable(); diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_= kexec.c index 82e2203d86a3..6f121a0164a4 100644 --- a/arch/arm64/kernel/machine_kexec.c +++ b/arch/arm64/kernel/machine_kexec.c @@ -207,37 +207,6 @@ void machine_kexec(struct kimage *kimage) BUG(); /* Should never get here. */ } =20 -static void machine_kexec_mask_interrupts(void) -{ - unsigned int i; - struct irq_desc *desc; - - for_each_irq_desc(i, desc) { - struct irq_chip *chip; - int ret; - - chip =3D irq_desc_get_chip(desc); - if (!chip) - continue; - - /* - * First try to remove the active state. If this - * fails, try to EOI the interrupt. - */ - ret =3D irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false); - - if (ret && irqd_irq_inprogress(&desc->irq_data) && - chip->irq_eoi) - chip->irq_eoi(&desc->irq_data); - - if (chip->irq_mask) - chip->irq_mask(&desc->irq_data); - - if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) - chip->irq_disable(&desc->irq_data); - } -} - /** * machine_crash_shutdown - shutdown non-crashing cpus and save registers */ diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/ke= xec.h index 270ee93a0f7d..601e569303e1 100644 --- a/arch/powerpc/include/asm/kexec.h +++ b/arch/powerpc/include/asm/kexec.h @@ -61,7 +61,6 @@ struct pt_regs; extern void kexec_smp_wait(void); /* get and clear naca physid, wait for master to copy new code to 0 */ extern void default_machine_kexec(struct kimage *image); -extern void machine_kexec_mask_interrupts(void); =20 void relocate_new_kernel(unsigned long indirection_page, unsigned long reb= oot_code_buffer, unsigned long start_address) __noreturn; diff --git a/arch/powerpc/kexec/core.c b/arch/powerpc/kexec/core.c index b8333a49ea5d..58a930a47422 100644 --- a/arch/powerpc/kexec/core.c +++ b/arch/powerpc/kexec/core.c @@ -22,28 +22,6 @@ #include #include =20 -void machine_kexec_mask_interrupts(void) { - unsigned int i; - struct irq_desc *desc; - - for_each_irq_desc(i, desc) { - struct irq_chip *chip; - - chip =3D irq_desc_get_chip(desc); - if (!chip) - continue; - - if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) - chip->irq_eoi(&desc->irq_data); - - if (chip->irq_mask) - chip->irq_mask(&desc->irq_data); - - if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) - chip->irq_disable(&desc->irq_data); - } -} - #ifdef CONFIG_CRASH_DUMP void machine_crash_shutdown(struct pt_regs *regs) { diff --git a/arch/riscv/kernel/machine_kexec.c b/arch/riscv/kernel/machine_= kexec.c index 3c830a6f7ef4..2306ce3e5f22 100644 --- a/arch/riscv/kernel/machine_kexec.c +++ b/arch/riscv/kernel/machine_kexec.c @@ -114,29 +114,6 @@ void machine_shutdown(void) #endif } =20 -static void machine_kexec_mask_interrupts(void) -{ - unsigned int i; - struct irq_desc *desc; - - for_each_irq_desc(i, desc) { - struct irq_chip *chip; - - chip =3D irq_desc_get_chip(desc); - if (!chip) - continue; - - if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) - chip->irq_eoi(&desc->irq_data); - - if (chip->irq_mask) - chip->irq_mask(&desc->irq_data); - - if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) - chip->irq_disable(&desc->irq_data); - } -} - /* * machine_crash_shutdown - Prepare to kexec after a kernel crash * diff --git a/include/linux/kexec.h b/include/linux/kexec.h index f0e9f8eda7a3..9dac0524c0be 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h @@ -375,6 +375,8 @@ extern void machine_kexec(struct kimage *image); extern int machine_kexec_prepare(struct kimage *image); extern void machine_kexec_cleanup(struct kimage *image); extern int kernel_kexec(void); +extern void machine_kexec_mask_interrupts(void); + extern struct page *kimage_alloc_control_pages(struct kimage *image, unsigned int order); =20 diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c index c0caa14880c3..777191458544 100644 --- a/kernel/kexec_core.c +++ b/kernel/kexec_core.c @@ -40,6 +40,7 @@ #include #include #include +#include =20 #include #include @@ -1072,3 +1073,35 @@ int kernel_kexec(void) kexec_unlock(); return error; } + +void machine_kexec_mask_interrupts(void) +{ + unsigned int i; + struct irq_desc *desc; + + for_each_irq_desc(i, desc) { + struct irq_chip *chip; + int check_eoi =3D 1; + + chip =3D irq_desc_get_chip(desc); + if (!chip) + continue; + + if (IS_ENABLED(CONFIG_ARM64)) { + /* + * First try to remove the active state. If this fails, try to EOI the + * interrupt. + */ + check_eoi =3D irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false); + } + + if (check_eoi && chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) + chip->irq_eoi(&desc->irq_data); + + if (chip->irq_mask) + chip->irq_mask(&desc->irq_data); + + if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) + chip->irq_disable(&desc->irq_data); + } +} --=20 2.40.1