From nobody Mon Feb 9 17:22:31 2026 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7122F19D8A7; Thu, 28 Nov 2024 12:30:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732797040; cv=none; b=N0unvF+0VuMNfp1xnYiYrDAkHrFScqT/Z+rmxPJMmZPfjAkii8pJFPFXVNBXDcZI+7fmKW0ZEd0VO314fJEBiVKMU/x96udMbbUyfTxHSzWmKj8pt+M8NE7JmM1AXUoD37UFZ+rVdrW7IIovVekEMXAV9+kYRODSQoLPoPQSrUQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732797040; c=relaxed/simple; bh=qQfSGpoxyAfMBJob4y9N+kQr7wTHaGzFzJGcipJFtHM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nAvyydJFQgZTZcS4SvvK3f0T5nXAIXqgKd8O57gtFytOPVVQrKRLkPEe3uSYolI9NIf18i3PD+KKjrx5LDbS0Z6PPd0hD8JPGKCru6IZGXFU0XyGG87SI70KhdJnBlPYy4oTUPeu9Ot8ZgKGCHRZNXwAuoes9J2odTzgnODzk5s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=TGddTWQL; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="TGddTWQL" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 4ASCUA9F018871; Thu, 28 Nov 2024 06:30:10 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1732797010; bh=fQO2yb69MdDx8Mnlqh3Ip+U5xpP7Qntvpn0/D4YfxUM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TGddTWQL+c3Gf2QJ418N2E1lhbrJCGUncLCK5YLJTZFSm9LvHYFMsFwSmpiT0y3Bl XQw8DIe+MqYD++IAbLyJio6ZD+nTpKgEfOZi3mTfOi4UVuzavhKkvL6ljo5m29BdRG YS0Rk5F6ivMnhaWS/vmcmedeJzBNJHCyEHFhm1JE= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4ASCUAqj088962 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 28 Nov 2024 06:30:10 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 28 Nov 2024 06:30:10 -0600 Received: from fllvsmtp7.itg.ti.com (10.64.40.31) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 28 Nov 2024 06:30:09 -0600 Received: from fllv0122.itg.ti.com (fllv0122.itg.ti.com [10.247.120.72]) by fllvsmtp7.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4ASCUAZg105730; Thu, 28 Nov 2024 06:30:10 -0600 Received: from localhost (meghana-pc.dhcp.ti.com [10.24.69.13] (may be forged)) by fllv0122.itg.ti.com (8.14.7/8.14.7) with ESMTP id 4ASCU9cI015658; Thu, 28 Nov 2024 06:30:09 -0600 From: Meghana Malladi To: , , , , , , , , , , , CC: , , , , Roger Quadros , Subject: [PATCH net v2 2/2] net: ti: icssg-prueth: Fix clearing of IEP_CMP_CFG registers during iep_init Date: Thu, 28 Nov 2024 17:59:31 +0530 Message-ID: <20241128122931.2494446-3-m-malladi@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241128122931.2494446-1-m-malladi@ti.com> References: <20241128122931.2494446-1-m-malladi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" When ICSSG interfaces are brought down and brought up again, the pru cores are shut down and booted again, flushing out all the memories and start again in a clean state. Hence it is expected that the IEP_CMP_CFG register needs to be flushed during iep_init() to ensure that the existing residual configuration doesn't cause any unusual behavior. If the register is not cleared, existing IEP_CMP_CFG set for CMP1 will result in SYNC0_OUT signal based on the SYNC_OUT register values. After bringing the interface up, calling PPS enable doesn't work as the driver believes PPS is already enabled, (iep->pps_enabled is not cleared during interface bring down) and driver will just return true even though there is no signal. Fix this by disabling pps and perout. Fixes: c1e0230eeaab ("net: ti: icss-iep: Add IEP driver") Signed-off-by: Meghana Malladi Reviewed-by: Roger Quadros --- Hi all, This patch is based on net-next tagged next-2024110. v1:https://lore.kernel.org/all/20241106074040.3361730-3-m-malladi@ti.com/ Changes since v1 (v2-v1): - Move clear CMP_CFG inside clear CMP_STAT loop as suggested by Roger Quadros - Disable pps/perout instead of setting to false as suggested by Roger Quadros drivers/net/ethernet/ti/icssg/icss_iep.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/ethernet/ti/icssg/icss_iep.c b/drivers/net/etherne= t/ti/icssg/icss_iep.c index 5d6d1cf78e93..a96861debbe3 100644 --- a/drivers/net/ethernet/ti/icssg/icss_iep.c +++ b/drivers/net/ethernet/ti/icssg/icss_iep.c @@ -215,6 +215,10 @@ static void icss_iep_enable_shadow_mode(struct icss_ie= p *iep) for (cmp =3D IEP_MIN_CMP; cmp < IEP_MAX_CMP; cmp++) { regmap_update_bits(iep->map, ICSS_IEP_CMP_STAT_REG, IEP_CMP_STATUS(cmp), IEP_CMP_STATUS(cmp)); + + regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG, + IEP_CMP_CFG_CMP_EN(cmp), 0); + } =20 /* enable reset counter on CMP0 event */ @@ -780,6 +784,11 @@ int icss_iep_exit(struct icss_iep *iep) } icss_iep_disable(iep); =20 + if (iep->pps_enabled) + icss_iep_pps_enable(iep, false); + else if (iep->perout_enabled) + icss_iep_perout_enable(iep, NULL, false); + return 0; } EXPORT_SYMBOL_GPL(icss_iep_exit); --=20 2.25.1