From nobody Tue Feb 10 13:34:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 885BE193439; Wed, 27 Nov 2024 09:52:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732701176; cv=none; b=EOO8kSHQCp50V+G1Kp5bY6Ep/X+bkJjM0ZwK7/3n5TKPz4Mrn8KsP1GXNhShDSUAmK7svt+R6bBlnfdWuXVRenDsPUO5cnr6PC9974a7cMGaSoxS++yZFpS1VpShy4VY3JGp5M2u8A2+b88kNCFbJL2xoE5x70RyU31jDiDeUZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732701176; c=relaxed/simple; bh=vANsmCOoD0TQdfXrOh5vdj/T2mUFG1OskmBRHSIuSFY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bkgFUvlOxmZpD6kCUwEEsZ7JFymSikXu30ZE7TZ+cT7yBwMe330QkkKub4gqs5/t8x9DEP9kNk/Jfqm77mUT8v4f9CqmuaukwTUaO55YNMsan9QjsXVZkpOEsVRRhUTAy2zICGNfya7GF77ZA9EtCjnvnX5IOClO5kcHcS0Ovew= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=M9Hc5rPq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="M9Hc5rPq" Received: by smtp.kernel.org (Postfix) with ESMTPS id 16206C4CECC; Wed, 27 Nov 2024 09:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732701176; bh=vANsmCOoD0TQdfXrOh5vdj/T2mUFG1OskmBRHSIuSFY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=M9Hc5rPqeP/0WvDqIk7toy609JAmpI1ZHe6DTh695FGq+dB/7VpX/xqXikPSXsB4y MR0RfIkm9KEd7VJ7KxtruK8cUp/NAo7/pSdwNHDrHlcWWtC2SKTBGQrfPRaVDI60qN Ygx0AI4Xftw8sek0OiMnVXQP0JsWIw4WY+lB1o9pFNCqes03KP3Nrls4BwWKPWRanp NDCtwpzQ5nxfSaFtaslTnwMvIDZsaHiVowr+sEj+bVtdpCnmi9t2Vnj+pWn+gJqDx5 kBRZgrGw8p0MpXp0MNUqOL5jzQ3/VeuP+Cd+JBnTbkp8NxXFwHo0LEc6LbLsS1HQaG tHRAJqO3S69YA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 067CED609C1; Wed, 27 Nov 2024 09:52:56 +0000 (UTC) From: Janne Grunau via B4 Relay Date: Wed, 27 Nov 2024 10:52:29 +0100 Subject: [PATCH RESEND 2/5] arm64: dts: apple: t8103: Add spi controller nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241127-asahi-spi-dt-v1-2-907c9447f623@jannau.net> References: <20241127-asahi-spi-dt-v1-0-907c9447f623@jannau.net> In-Reply-To: <20241127-asahi-spi-dt-v1-0-907c9447f623@jannau.net> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Janne Grunau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3356; i=j@jannau.net; s=yk2024; h=from:subject:message-id; bh=b1UDB+1sljglElFujEd7C6cEIDOAyC8En801j5/oUGU=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhnS3119tX+Uacs/mOXwpqKM5bHcqw6rs+B/hWQcmpql+L nxcbbGoo5SFQYyLQVZMkSVJ+2UHw+oaxZjaB2Ewc1iZQIYwcHEKwETmSTL8z1//ftWNnQxygtu7 f29ROvrRaHPpCjbrna3b5CfondAq3sDwz+BMr3HB8aiG38rtLiw8nvH9F+XW7lD4lNGWLr3mfHQ BLwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 X-Endpoint-Received: by B4 Relay for j@jannau.net/yk2024 with auth_id=264 X-Original-From: Janne Grunau Reply-To: j@jannau.net From: Janne Grunau Apple silicon devices have one or more SPI devices. Add device tree nodes for all known controllers. The missing ones could be guessed and tested with a little effort but since the devices expose no pins and no new devices are expected there is no point in spending the effort. SPI is used for spi-nor and input devices like keyboard, trackpad, touchscreen and fingerprint reader. Only the spi-nor flash has upstream drivers. Support for it will be added in a following commit. Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t8103.dtsi | 68 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/app= le/t8103.dtsi index 9b0dad6b618444ac6b1c9735c50cccfc3965f947..9b2d32059c3542f12fedd7f4dca= 309baa66c1bd4 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -326,6 +326,20 @@ clkref: clock-ref { clock-output-names =3D "clkref"; }; =20 + clk_120m: clock-120m { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <120000000>; + clock-output-names =3D "clk_120m"; + }; + + clk_200m: clock-200m { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <200000000>; + clock-output-names =3D "clk_200m"; + }; + /* * This is a fabulated representation of the input clock * to NCO since we don't know the true clock tree. @@ -441,6 +455,46 @@ fpwm1: pwm@235044000 { status =3D "disabled"; }; =20 + spi0: spi@235100000 { + compatible =3D "apple,t8103-spi", "apple,spi"; + reg =3D <0x2 0x35100000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clk_200m>; + power-domains =3D <&ps_spi0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + spi1: spi@235104000 { + compatible =3D "apple,t8103-spi", "apple,spi"; + reg =3D <0x2 0x35104000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clk_200m>; + pinctrl-0 =3D <&spi1_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_spi1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + spi3: spi@23510c000 { + compatible =3D "apple,t8103-spi", "apple,spi"; + reg =3D <0x2 0x3510c000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clk_120m>; + pinctrl-0 =3D <&spi3_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_spi3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + serial0: serial@235200000 { compatible =3D "apple,s5l-uart"; reg =3D <0x2 0x35200000 0x0 0x1000>; @@ -597,6 +651,20 @@ i2c4_pins: i2c4-pins { ; }; =20 + spi1_pins: spi1-pins { + pinmux =3D , + , + , + ; + }; + + spi3_pins: spi3-pins { + pinmux =3D , + , + , + ; + }; + pcie_pins: pcie-pins { pinmux =3D , , --=20 2.47.0