From nobody Mon Feb 9 21:19:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2FBA1CF5C6; Tue, 26 Nov 2024 13:17:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732627078; cv=none; b=cMJS9e77cwBZ3nqNnWGYaGSw4Au3XMiOLHhPRBP1NPc5ZjEfAEscQXu7f72dZjliZUxL5oc5XBbq+JrXiZvHEc8mRHS71vkegUuGmrqZUHAtTvkUkfizrYqPLEIrLGS+yVX8wV6NkCAy5Cbi87q1N8U2wOJUH0ib5MT63MxlaKc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732627078; c=relaxed/simple; bh=ClKbe0mSrhwu/246YCVwi9LbH3lrJBADxqdCPt763fQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UoMbA7l38iUr5B9zdHIBcdAw3HmJxk0bBFeIlHSU2Pm8BuyB/PmjrzRwi2hXwNmk+nQ7yQ07EaztF0XWPYzWUFUCKpfPvGwWaW9U9UIjChUPKyBLUiJtZUK0G90dLZya1YlkoPmRgmEf2i5u5gkgjY5VFN9LULHxcadXQCx+YB4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=xYxu5kBC; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="xYxu5kBC" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=lXa3PF8sz3OO2Szsi/u695inlM9MoDzsn3tOkzccKl0=; b=xYxu5kBCxGCt5/5v4Wn++GL8vq YxfK8C2wac9vxam+PekynkvOU1rYMBrbKyuEfx1dEUexWTEiZ/bQy8qJ9ZQZIR23jZIatRck8fHXr TWYiOWvm9cSJCLRpZbsFDZoJWJewspMMBZ94Vw0UeqWyHfT2w7JZD8e7KSxlMQVEJhN+e/jsuD4mH 4cEFkfcZ7Md8kn2O4KW5mMp3GGiN4euzBIKcODdPkLMlYQLSgLzqZKCWPDlQf0+0TSD79c9xMPlfD E/32wD3US7BcKgBo3ZgQOoijji6imCI+SwwRhQRqKpXLb/vfvmwnGQGrnfC4OYLyX1Ho3FUW+ftqv sQjzmkVw==; Received: from i5e86190f.versanet.de ([94.134.25.15] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tFvRj-0007zi-5Q; Tue, 26 Nov 2024 14:17:39 +0100 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, sebastian.reichel@collabora.com, heiko@sntech.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dse@thaumatec.com, Heiko Stuebner Subject: [PATCH v4 1/2] dt-bindings: phy: Add Rockchip MIPI C-/D-PHY schema Date: Tue, 26 Nov 2024 14:17:34 +0100 Message-ID: <20241126131736.465111-2-heiko@sntech.de> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126131736.465111-1-heiko@sntech.de> References: <20241126131736.465111-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Add dt-binding schema for the MIPI C-/D-PHY found on Rockchip RK3588 SoCs. Tested-by: Daniel Semkowicz Tested-by: Sebastian Reichel Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley Reviewed-by: Sebastian Reichel --- .../phy/rockchip,rk3588-mipi-dcphy.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3588-m= ipi-dcphy.yaml diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcp= hy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.= yaml new file mode 100644 index 000000000000..c8ff5ba22a86 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip MIPI D-/C-PHY with Samsung IP block + +maintainers: + - Guochun Huang + - Heiko Stuebner + +properties: + compatible: + enum: + - rockchip,rk3576-mipi-dcphy + - rockchip,rk3588-mipi-dcphy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + description: | + Argument is mode to operate in. Supported modes are: + - PHY_TYPE_DPHY + - PHY_TYPE_CPHY + See include/dt-bindings/phy/phy.h for constants. + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: ref + + resets: + maxItems: 4 + + reset-names: + items: + - const: m_phy + - const: apb + - const: grf + - const: s_phy + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the 'mipi dcphy general register file= s'. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + phy@feda0000 { + compatible =3D "rockchip,rk3588-mipi-dcphy"; + reg =3D <0x0 0xfeda0000 0x0 0x10000>; + clocks =3D <&cru PCLK_MIPI_DCPHY0>, + <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>; + clock-names =3D "pclk", "ref"; + resets =3D <&cru SRST_M_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0_GRF>, + <&cru SRST_S_MIPI_DCPHY0>; + reset-names =3D "m_phy", "apb", "grf", "s_phy"; + rockchip,grf =3D <&mipidcphy0_grf>; + #phy-cells =3D <1>; + }; + }; --=20 2.45.2