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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fb271ffsm12745475f8f.53.2024.11.26.01.51.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 01:51:40 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: corbet@lwn.net, akpm@linux-foundation.org, thuth@redhat.com, rostedt@goodmis.org, paulmck@kernel.org, xiongwei.song@windriver.com, ying.huang@intel.com Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, claudiu.beznea@tuxon.dev, geert+renesas@glider.be, wsa+renesas@sang-engineering.com, Claudiu Beznea Subject: [RFC PATCH] mm: page_alloc: Add kernel parameter to select maximum PCP batch scale number Date: Tue, 26 Nov 2024 11:51:38 +0200 Message-Id: <20241126095138.1832464-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Commit 52166607ecc9 ("mm: restrict the pcp batch scale factor to avoid too long latency") introduced default PCP (Per-CPU Pageset) batch size as a configuration flag. The configuration flag is CONFIG_PCP_BATCH_SCALE_MAX. The ARM64 defconfig has CONFIG_PCP_BATCH_SCALE_MAX=3D5. This defconfig is used by a high range of SoCs. The Renesas RZ/G3S SoC is a single CPU SoC, with L1$ (I-cache 32Kbytes, D-cache 32 Kbytes), L3$ (256 Kbytes), but no L2$. It is currently used in a configuration with 1 GiB RAM size. In this configuration, starting with commit 52166607ecc9 ("mm: restrict the pcp batch scale factor to avoid too long latency") the "bonnie++ -d /mnt -u root" benchmark takes ~14 minutes while previously it took ~10 minutes. The /mnt directory is mounted on SD card. Same behavior is reproduced on similar Renesas single core devices (e.g., Renesas RZ/G2UL). Add a new kernel parameter to allow systems like Renesas RZ/G3S to continue have the same performance numbers with the default mainline ARM64 config. With pcp_batch_scale_max=3D5 (the default value) the bonnie++ benchmark takes ~14 minutes while with pcp_batch_scale_max=3D0 it takes ~10 minutes. Signed-off-by: Claudiu Beznea --- .../admin-guide/kernel-parameters.txt | 6 +++++ mm/page_alloc.c | 26 ++++++++++++++----- 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index e7bfe1bde49e..ce745ea78470 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4716,6 +4716,12 @@ for debug and development, but should not be needed on a platform with proper driver support. =20 + pcp_batch_scale_max=3Dn + Format: + Range: 0,6 : number + Default : CONFIG_PCP_BATCH_SCALE_MAX + Used for setting the scale number for PCP batch scale algorithm. + pdcchassis=3D [PARISC,HW] Disable/Enable PDC Chassis Status codes at boot time. Format: { 0 | 1 } diff --git a/mm/page_alloc.c b/mm/page_alloc.c index bc55d39eb372..ef1d37cefb43 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -163,6 +163,20 @@ static DEFINE_MUTEX(pcp_batch_high_lock); #define pcp_spin_unlock(ptr) \ pcpu_spin_unlock(lock, ptr) =20 +static unsigned int pcp_batch_scale_max =3D CONFIG_PCP_BATCH_SCALE_MAX; +#define MAX_PCP_BATCH 6 + +static int __init setup_pcp_batch_scale_max(char *str) +{ + get_option(&str, (unsigned int *)&pcp_batch_scale_max); + + if (pcp_batch_scale_max > MAX_PCP_BATCH) + pcp_batch_scale_max =3D MAX_PCP_BATCH; + + return 1; +} +__setup("pcp_batch_scale_max=3D", setup_pcp_batch_scale_max); + #ifdef CONFIG_USE_PERCPU_NUMA_NODE_ID DEFINE_PER_CPU(int, numa_node); EXPORT_PER_CPU_SYMBOL(numa_node); @@ -2362,7 +2376,7 @@ int decay_pcp_high(struct zone *zone, struct per_cpu_= pages *pcp) * control latency. This caps pcp->high decrement too. */ if (pcp->high > high_min) { - pcp->high =3D max3(pcp->count - (batch << CONFIG_PCP_BATCH_SCALE_MAX), + pcp->high =3D max3(pcp->count - (batch << pcp_batch_scale_max), pcp->high - (pcp->high >> 3), high_min); if (pcp->high > high_min) todo++; @@ -2412,7 +2426,7 @@ static void drain_pages_zone(unsigned int cpu, struct= zone *zone) count =3D pcp->count; if (count) { int to_drain =3D min(count, - pcp->batch << CONFIG_PCP_BATCH_SCALE_MAX); + pcp->batch << pcp_batch_scale_max); =20 free_pcppages_bulk(zone, to_drain, pcp, 0); count -=3D to_drain; @@ -2540,7 +2554,7 @@ static int nr_pcp_free(struct per_cpu_pages *pcp, int= batch, int high, bool free =20 /* Free as much as possible if batch freeing high-order pages. */ if (unlikely(free_high)) - return min(pcp->count, batch << CONFIG_PCP_BATCH_SCALE_MAX); + return min(pcp->count, batch << pcp_batch_scale_max); =20 /* Check for PCP disabled or boot pageset */ if (unlikely(high < batch)) @@ -2572,7 +2586,7 @@ static int nr_pcp_high(struct per_cpu_pages *pcp, str= uct zone *zone, return 0; =20 if (unlikely(free_high)) { - pcp->high =3D max(high - (batch << CONFIG_PCP_BATCH_SCALE_MAX), + pcp->high =3D max(high - (batch << pcp_batch_scale_max), high_min); return 0; } @@ -2642,7 +2656,7 @@ static void free_unref_page_commit(struct zone *zone,= struct per_cpu_pages *pcp, } else if (pcp->flags & PCPF_PREV_FREE_HIGH_ORDER) { pcp->flags &=3D ~PCPF_PREV_FREE_HIGH_ORDER; } - if (pcp->free_count < (batch << CONFIG_PCP_BATCH_SCALE_MAX)) + if (pcp->free_count < (batch << pcp_batch_scale_max)) pcp->free_count +=3D (1 << order); high =3D nr_pcp_high(pcp, zone, batch, free_high); if (pcp->count >=3D high) { @@ -2984,7 +2998,7 @@ static int nr_pcp_alloc(struct per_cpu_pages *pcp, st= ruct zone *zone, int order) * subsequent allocation of order-0 pages without any freeing. */ if (batch <=3D max_nr_alloc && - pcp->alloc_factor < CONFIG_PCP_BATCH_SCALE_MAX) + pcp->alloc_factor < pcp_batch_scale_max) pcp->alloc_factor++; batch =3D min(batch, max_nr_alloc); } --=20 2.39.2