From nobody Tue Feb 10 07:22:23 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E05D1B413C for ; Tue, 26 Nov 2024 09:21:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732612877; cv=none; b=Bw+xhkP8VolFZIcO/rKWH+hAueUtNzxQbN/SkzvtfAlr50X4KmUNtrDl60PuLJoXwMt2zmxZr9RJfO0e3rlF/vy4itTj+jiyRMNq6jIb5iqLXPy0gOfmdBm+9baEcfrk0x53VHwgcGoaY5WwF7IfRj9j8DHzvMiJdIcwuroS+Vc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732612877; c=relaxed/simple; bh=4F232ENECAOLomVUSY8tBxTq5zAbQQSu7jUMFMN+Pp4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=h9qhs/+XBkQtZMKNvq1hbqFGGLYfnLN1fE06rIFiY90/ncP/uAccDYuP06HIyBQyk2oWqaesAoRJFkGXVufLke27MRZlZ2nboD+naNhe3d6QLJMhtt/GPqDex18Ss9OHkfg8e2Bwn7U9BhTeQmRG2vNvBbb+ztXaiipTL84E0Yo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=IirP2PBv; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="IirP2PBv" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-43162cf1eaaso67086815e9.0 for ; Tue, 26 Nov 2024 01:21:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1732612874; x=1733217674; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LKW3EfLpg9xj1NAX34ulRBb1/poqN6qEBq3WFAZfenM=; b=IirP2PBvcho0H6iTKUBPqaFzZSLbr1s7FmnuIkmTtgERTsDdFAzdIRHukfAB2WgkpW 3vGQapU8wAhXsndg+PAL+Mt3Y0nI5ePH+lHgwdVr29Lmf12twCqc0vR/ABqtQvET9ICv ZgXCMAPJdtcginb9Hy+pvQf6zGMIhJhbuv9PaNW3sS0SF4luQBW3CIvAN5+sHujMMCbZ DZjj1EBi/vf0xotjebPF8mbkXsZ/5+GtFUXqPEnnQ3XH9SxrlFxc1ceFghiUYRAnZvJR F6U9iXNYMBbXmP1x5wJbzMroauFk030pDfTT2bnCCa9snMx7W6fNONnlSsML246LhHnu wnbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732612874; x=1733217674; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LKW3EfLpg9xj1NAX34ulRBb1/poqN6qEBq3WFAZfenM=; b=TyFxaHHawWWx/LEnjvHAJMk8jsSuMvAx8w2kYZNrnB1H7QD0JU1cE0j60XK/Shyk6n 7mA/UyLDHtbrFzJerv4A1SNfFZzMhBf3Buc+xnap+gOWyIl1xqr9OvaqZ8ZM/6mxoXJB 3nHgSe6klA2wYSo4OiQp/oPXTLy982rgiZNsNbYDMkEpTAG+9VcxNEE9xVeGYGjQP5c5 Mjp3tfECKwpPAzd0Dq6oJJLOpGkLSkoQ91oKKtecKexgMSH9KS0tPW0hWcMwDgrpp1Jl HwIJ5GpTOVLKVl+bthsA+jn9X+x8+oqWol2qLwS5P2JK7sPJ1uiiHgoEtYLRhbKAP24e d9pg== X-Forwarded-Encrypted: i=1; AJvYcCWVAZwU2zw7FSbwUt+ihaLM7GV/Vly86wqdDxBISnvW0NB9Eto2Na2Qk4OCXCmt6FRR71s6aXqXX4S7k88=@vger.kernel.org X-Gm-Message-State: AOJu0Yz/oYX9XCnaSlyKSlfG8yKXU4JwPz4ugdQjBbVtqwd/K9HQyQe0 rvsiJVxB4C1BAwEDi4cT4GqoXeZfMvL5UGKOMCHG4q+RF98GpXBLliyYaw8m7IQ= X-Gm-Gg: ASbGncuI6x+qdYWLunuGFJe5wJWZ+/R0VrGMVsdcQmQlUQgW8MiXOkXWzRcWMjSsgah KFObr/aqv67dCQBKQ4mxnY8pR9QEMWbwddAtIkBGu/q8FyVvhXScXA+6XcLkm48YntkN++0qu7f ONMnmiTVXp22sMZesDWN8jGThwKei1nYztib8TBtUXcrfy/CXhE3mXqbfUOdQPDxUioo6Jv8mVa v9ydXGqSg5haUvXELCk+LekQh/ahhwmd8B8Gi0QHDtv8IQM1OpqCxuJ/aY3EukK3//KvIRFUhqu gBc= X-Google-Smtp-Source: AGHT+IE7w+dBoCGCxxbUApCfNcapHwRVn5rVPYIN6Suv5fX7t/i3bspO7Ak4XFCK5NYSFpFy53f9sQ== X-Received: by 2002:a05:600c:5122:b0:428:d31:ef25 with SMTP id 5b1f17b1804b1-433ce41ffc9mr177417025e9.12.1732612874002; Tue, 26 Nov 2024 01:21:14 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc3a47sm13027694f8f.73.2024.11.26.01.21.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 01:21:13 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, geert+renesas@glider.be, magnus.damm@gmail.com, gregkh@linuxfoundation.org, yoshihiro.shimoda.uh@renesas.com, christophe.jaillet@wanadoo.fr Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-usb@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 05/15] soc: renesas: rz-sysc: Move RZ/G3S SoC detection to the SYSC driver Date: Tue, 26 Nov 2024 11:20:40 +0200 Message-Id: <20241126092050.1825607-6-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241126092050.1825607-1-claudiu.beznea.uj@bp.renesas.com> References: <20241126092050.1825607-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Now that we have SoC detection in the RZ SYSC driver, move the RZ/G3S SoC detection to it. The SYSC provides SoC ID in its own registers. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v2: - this was handled though patch 05/16 in v1=20 - provide SoC specific init data through the SoC specific driver drivers/soc/renesas/r9a08g045-sysc.c | 12 ++++++++++++ drivers/soc/renesas/renesas-soc.c | 12 ------------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/soc/renesas/r9a08g045-sysc.c b/drivers/soc/renesas/r9a= 08g045-sysc.c index ceea738aee72..81970db300b2 100644 --- a/drivers/soc/renesas/r9a08g045-sysc.c +++ b/drivers/soc/renesas/r9a08g045-sysc.c @@ -11,6 +11,9 @@ =20 #include "rz-sysc.h" =20 +#define SYS_LSI_DEVID 0xa04 +#define SYS_LSI_DEVID_REV GENMASK(31, 28) +#define SYS_LSI_DEVID_SPECIFIC GENMASK(27, 0) #define SYS_USB_PWRRDY 0xd70 #define SYS_USB_PWRRDY_PWRRDY_N BIT(0) #define SYS_MAX_REG 0xe20 @@ -24,7 +27,16 @@ static const struct rz_sysc_signal_init_data rzg3s_sysc_= signals_init_data[] __in } }; =20 +static const struct rz_sysc_soc_id_init_data rzg3s_sysc_soc_id_init_data _= _initconst =3D { + .family =3D "RZ/G3S", + .id =3D 0x85e0447, + .offset =3D SYS_LSI_DEVID, + .revision_mask =3D SYS_LSI_DEVID_REV, + .specific_id_mask =3D SYS_LSI_DEVID_SPECIFIC +}; + const struct rz_sysc_init_data rzg3s_sysc_init_data =3D { + .soc_id_init_data =3D &rzg3s_sysc_soc_id_init_data, .signals_init_data =3D rzg3s_sysc_signals_init_data, .num_signals =3D ARRAY_SIZE(rzg3s_sysc_signals_init_data), .max_register_offset =3D SYS_MAX_REG, diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesa= s-soc.c index 172d59e6fbcf..425d9037dcd0 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -71,10 +71,6 @@ static const struct renesas_family fam_rzg2ul __initcons= t __maybe_unused =3D { .name =3D "RZ/G2UL", }; =20 -static const struct renesas_family fam_rzg3s __initconst __maybe_unused = =3D { - .name =3D "RZ/G3S", -}; - static const struct renesas_family fam_rzv2h __initconst __maybe_unused = =3D { .name =3D "RZ/V2H", }; @@ -176,11 +172,6 @@ static const struct renesas_soc soc_rz_g2ul __initcons= t __maybe_unused =3D { .id =3D 0x8450447, }; =20 -static const struct renesas_soc soc_rz_g3s __initconst __maybe_unused =3D { - .family =3D &fam_rzg3s, - .id =3D 0x85e0447, -}; - static const struct renesas_soc soc_rz_v2h __initconst __maybe_unused =3D { .family =3D &fam_rzv2h, .id =3D 0x847a447, @@ -410,9 +401,6 @@ static const struct of_device_id renesas_socs[] __initc= onst __maybe_unused =3D { #ifdef CONFIG_ARCH_R9A07G054 { .compatible =3D "renesas,r9a07g054", .data =3D &soc_rz_v2l }, #endif -#ifdef CONFIG_ARCH_R9A08G045 - { .compatible =3D "renesas,r9a08g045", .data =3D &soc_rz_g3s }, -#endif #ifdef CONFIG_ARCH_R9A09G011 { .compatible =3D "renesas,r9a09g011", .data =3D &soc_rz_v2m }, #endif --=20 2.39.2