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charset="utf-8" Add "ref" clock to enable reference clock. To avoid breaking DT backwards compatibility, i.MX95 REF clock might be optional. Use devm_clk_get_optional() to fetch i.MX95 PCIe optional clocks in driver. If use external clock, ref clock should point to external reference. If use internal clock, CREF_EN in LAST_TO_REG controls reference output, which implement in drivers/clk/imx/clk-imx95-blk-ctl.c. Signed-off-by: Richard Zhu Reviewed-by: Frank Li --- drivers/pci/controller/dwc/pci-imx6.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 385f6323e3ca..f7e928e0a018 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -103,6 +103,7 @@ struct imx_pcie_drvdata { const char *gpr; const char * const *clk_names; const u32 clks_cnt; + const u32 clks_optional_cnt; const u32 ltssm_off; const u32 ltssm_mask; const u32 mode_off[IMX_PCIE_MAX_INSTANCES]; @@ -1306,9 +1307,8 @@ static int imx_pcie_probe(struct platform_device *pde= v) struct device_node *np; struct resource *dbi_base; struct device_node *node =3D dev->of_node; - int ret; + int i, ret, req_cnt; u16 val; - int i; =20 imx_pcie =3D devm_kzalloc(dev, sizeof(*imx_pcie), GFP_KERNEL); if (!imx_pcie) @@ -1358,9 +1358,13 @@ static int imx_pcie_probe(struct platform_device *pd= ev) imx_pcie->clks[i].id =3D imx_pcie->drvdata->clk_names[i]; =20 /* Fetch clocks */ - ret =3D devm_clk_bulk_get(dev, imx_pcie->drvdata->clks_cnt, imx_pcie->clk= s); + req_cnt =3D imx_pcie->drvdata->clks_cnt - imx_pcie->drvdata->clks_optiona= l_cnt; + ret =3D devm_clk_bulk_get(dev, req_cnt, imx_pcie->clks); if (ret) return ret; + imx_pcie->clks[req_cnt].clk =3D devm_clk_get_optional(dev, "ref"); + if (IS_ERR(imx_pcie->clks[req_cnt].clk)) + return PTR_ERR(imx_pcie->clks[req_cnt].clk); =20 if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_PHYDRV)) { imx_pcie->phy =3D devm_phy_get(dev, "pcie-phy"); @@ -1509,6 +1513,7 @@ static const char * const imx8mm_clks[] =3D {"pcie_bu= s", "pcie", "pcie_aux"}; static const char * const imx8mq_clks[] =3D {"pcie_bus", "pcie", "pcie_phy= ", "pcie_aux"}; static const char * const imx6sx_clks[] =3D {"pcie_bus", "pcie", "pcie_phy= ", "pcie_inbound_axi"}; static const char * const imx8q_clks[] =3D {"mstr", "slv", "dbi"}; +static const char * const imx95_clks[] =3D {"pcie_bus", "pcie", "pcie_phy"= , "pcie_aux", "ref"}; =20 static const struct imx_pcie_drvdata drvdata[] =3D { [IMX6Q] =3D { @@ -1623,8 +1628,9 @@ static const struct imx_pcie_drvdata drvdata[] =3D { [IMX95] =3D { .variant =3D IMX95, .flags =3D IMX_PCIE_FLAG_HAS_SERDES, - .clk_names =3D imx8mq_clks, - .clks_cnt =3D ARRAY_SIZE(imx8mq_clks), + .clk_names =3D imx95_clks, + .clks_cnt =3D ARRAY_SIZE(imx95_clks), + .clks_optional_cnt =3D 1, .ltssm_off =3D IMX95_PE0_GEN_CTRL_3, .ltssm_mask =3D IMX95_PCIE_LTSSM_EN, .mode_off[0] =3D IMX95_PE0_GEN_CTRL_1, --=20 2.37.1