From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0941A191F7A for ; Mon, 25 Nov 2024 09:48:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528106; cv=none; b=avoRn5L4dh+xmY9wCP8wBrBKHPE25yoc6HSLQyRCbwncrLaXlrIGhAA0lkhMDEmW2ApLJjcE6326FwTmFe86bM8NZoITr+0WoBW1V26tpJQLG7gpdxJwrE5S3oquGQPYUAEYVk8PFAimCoc7v8xrsg9toJCqxELxeYpqySJA3js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528106; c=relaxed/simple; bh=eIqVdQjaWI7rfmZALNqUneIC3BHaMRK+BwsAKDTiM2Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pn7Z95aDcam8SrA8H7+oObgAmD+fe9+xK/OpW5PkN03I/9PLjdYXTMy5QHzS7lotgvJJoQf1Z7CmwGB5uuf+cL0+9RK0PZp8vleNCtArV/hP8uJ6W0oVr09lVqPgSULU5KMuFTGXy8XwgVs+jMOLzuqFrsF2ozrlZowmc2JQzrM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 76EE21756; Mon, 25 Nov 2024 01:48:53 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 407E23F66E; Mon, 25 Nov 2024 01:48:21 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 1/9] coresight: change coresight_device lock type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:08 +0000 Message-Id: <20241125094816.365472-2-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun coresight_device->cscfg_csdev_lock can be held during __schedule() by perf_event_task_sched_out()/in(). Since coresight->cscfg_csdev_lock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type of coresight_device->cscfg_csdev_lock from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-syscfg.c | 75 +++++++++---------- include/linux/coresight.h | 2 +- 2 files changed, 35 insertions(+), 42 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-syscfg.c b/drivers/hwtra= cing/coresight/coresight-syscfg.c index 11138a9762b0..b7e9fb822e8f 100644 --- a/drivers/hwtracing/coresight/coresight-syscfg.c +++ b/drivers/hwtracing/coresight/coresight-syscfg.c @@ -65,7 +65,6 @@ static int cscfg_add_csdev_cfg(struct coresight_device *c= sdev, { struct cscfg_config_csdev *config_csdev =3D NULL; struct cscfg_feature_csdev *feat_csdev; - unsigned long flags; int i; =20 /* look at each required feature and see if it matches any feature on the= device */ @@ -89,9 +88,9 @@ static int cscfg_add_csdev_cfg(struct coresight_device *c= sdev, } /* if matched features, add config to device.*/ if (config_csdev) { - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); - list_add(&config_csdev->node, &csdev->config_csdev_list); - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + scoped_guard(raw_spinlock_irqsave, &csdev->cscfg_csdev_lock) { + list_add(&config_csdev->node, &csdev->config_csdev_list); + } } =20 return 0; @@ -177,7 +176,6 @@ static int cscfg_load_feat_csdev(struct coresight_devic= e *csdev, struct cscfg_csdev_feat_ops *ops) { struct cscfg_feature_csdev *feat_csdev; - unsigned long flags; int err; =20 if (!ops->load_feat) @@ -194,9 +192,9 @@ static int cscfg_load_feat_csdev(struct coresight_devic= e *csdev, =20 /* add to internal csdev feature list & initialise using reset call */ cscfg_reset_feat(feat_csdev); - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); - list_add(&feat_csdev->node, &csdev->feature_csdev_list); - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + scoped_guard(raw_spinlock_irqsave, &csdev->cscfg_csdev_lock) { + list_add(&feat_csdev->node, &csdev->feature_csdev_list); + } =20 return 0; } @@ -765,7 +763,7 @@ static int cscfg_list_add_csdev(struct coresight_device= *csdev, =20 INIT_LIST_HEAD(&csdev->feature_csdev_list); INIT_LIST_HEAD(&csdev->config_csdev_list); - spin_lock_init(&csdev->cscfg_csdev_lock); + raw_spin_lock_init(&csdev->cscfg_csdev_lock); =20 return 0; } @@ -853,17 +851,14 @@ EXPORT_SYMBOL_GPL(cscfg_unregister_csdev); void cscfg_csdev_reset_feats(struct coresight_device *csdev) { struct cscfg_feature_csdev *feat_csdev; - unsigned long flags; =20 - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); + guard(raw_spinlock_irqsave)(&csdev->cscfg_csdev_lock); + if (list_empty(&csdev->feature_csdev_list)) - goto unlock_exit; + return; =20 list_for_each_entry(feat_csdev, &csdev->feature_csdev_list, node) cscfg_reset_feat(feat_csdev); - -unlock_exit: - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); } EXPORT_SYMBOL_GPL(cscfg_csdev_reset_feats); =20 @@ -1048,7 +1043,6 @@ int cscfg_csdev_enable_active_config(struct coresight= _device *csdev, { struct cscfg_config_csdev *config_csdev_active =3D NULL, *config_csdev_it= em; const struct cscfg_config_desc *config_desc; - unsigned long flags; int err =3D 0; =20 /* quickly check global count */ @@ -1059,17 +1053,17 @@ int cscfg_csdev_enable_active_config(struct coresig= ht_device *csdev, * Look for matching configuration - set the active configuration * context if found. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); - list_for_each_entry(config_csdev_item, &csdev->config_csdev_list, node) { - config_desc =3D config_csdev_item->config_desc; - if ((atomic_read(&config_desc->active_cnt)) && - ((unsigned long)config_desc->event_ea->var =3D=3D cfg_hash)) { - config_csdev_active =3D config_csdev_item; - csdev->active_cscfg_ctxt =3D (void *)config_csdev_active; - break; + scoped_guard(raw_spinlock_irqsave, &csdev->cscfg_csdev_lock) { + list_for_each_entry(config_csdev_item, &csdev->config_csdev_list, node) { + config_desc =3D config_csdev_item->config_desc; + if ((atomic_read(&config_desc->active_cnt)) && + ((unsigned long)config_desc->event_ea->var =3D=3D cfg_hash)) { + config_csdev_active =3D config_csdev_item; + csdev->active_cscfg_ctxt =3D (void *)config_csdev_active; + break; + } } } - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); =20 /* * If found, attempt to enable @@ -1090,12 +1084,12 @@ int cscfg_csdev_enable_active_config(struct coresig= ht_device *csdev, * * Set enabled if OK, err if not. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); - if (csdev->active_cscfg_ctxt) - config_csdev_active->enabled =3D true; - else - err =3D -EBUSY; - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); + scoped_guard(raw_spinlock_irqsave, &csdev->cscfg_csdev_lock) { + if (csdev->active_cscfg_ctxt) + config_csdev_active->enabled =3D true; + else + err =3D -EBUSY; + } } } return err; @@ -1117,23 +1111,22 @@ EXPORT_SYMBOL_GPL(cscfg_csdev_enable_active_config); void cscfg_csdev_disable_active_config(struct coresight_device *csdev) { struct cscfg_config_csdev *config_csdev; - unsigned long flags; =20 /* * Check if we have an active config, and that it was successfully enable= d. * If it was not enabled, we have no work to do, otherwise mark as disabl= ed. * Clear the active config pointer. */ - spin_lock_irqsave(&csdev->cscfg_csdev_lock, flags); - config_csdev =3D (struct cscfg_config_csdev *)csdev->active_cscfg_ctxt; - if (config_csdev) { - if (!config_csdev->enabled) - config_csdev =3D NULL; - else - config_csdev->enabled =3D false; + scoped_guard(raw_spinlock_irqsave, &csdev->cscfg_csdev_lock) { + config_csdev =3D (struct cscfg_config_csdev *)csdev->active_cscfg_ctxt; + if (config_csdev) { + if (!config_csdev->enabled) + config_csdev =3D NULL; + else + config_csdev->enabled =3D false; + } + csdev->active_cscfg_ctxt =3D NULL; } - csdev->active_cscfg_ctxt =3D NULL; - spin_unlock_irqrestore(&csdev->cscfg_csdev_lock, flags); =20 /* true if there was an enabled active config */ if (config_csdev) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index c13342594278..924b58c343b3 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -296,7 +296,7 @@ struct coresight_device { /* system configuration and feature lists */ struct list_head feature_csdev_list; struct list_head config_csdev_list; - spinlock_t cscfg_csdev_lock; + raw_spinlock_t cscfg_csdev_lock; void *active_cscfg_ctxt; }; =20 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B6C171925A3 for ; Mon, 25 Nov 2024 09:48:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528109; cv=none; b=QSJPxrGAygw5VH/VXKZ6hR0inRwUXOfTTBtNfXuIGp7N3LwSa0Ks7vJw6gneZcaMEh3BT83oqCJqO/JY03a665Qga+mo7wliBbWf5S6q/7+tAseeCY1uCTz3UcEbAd/yo/bWzPkUYvYF7vPLhIHumNyLgZNyYtTXTMS/QVARQjw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528109; c=relaxed/simple; bh=7HbgQN2A56kgUGcl0Z8JV44Plpb++j82rThQnvbbS3o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Pm0zdFw+tnO5wt7KPgzu5UC68Uk1JMaeTX063yAxa5Vr5lBuloFaSxaO5vmQh2kqrA+mgCC6wx6RkpW/rb491n4GHZqtM/f7wJ5Go0zUv2lnLsItdVemPoyg5bvkdmx0pWzJQYmNlGDYlRdV+zidkY338OlzD0ZLDJm03XCO748= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 463E11FC7; Mon, 25 Nov 2024 01:48:56 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BF5873F66E; Mon, 25 Nov 2024 01:48:23 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 2/9] coresight-etm4x: change etmv4_drvdata spinlock type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:09 +0000 Message-Id: <20241125094816.365472-3-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-etm4x drivers, etmv4_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etmv4_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etmv4_drvdata->spinlock in coresight-etm4x drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-config.c | 21 +- .../hwtracing/coresight/coresight-config.h | 2 +- .../coresight/coresight-etm4x-core.c | 71 ++- .../coresight/coresight-etm4x-sysfs.c | 566 +++++++++--------- drivers/hwtracing/coresight/coresight-etm4x.h | 2 +- 5 files changed, 345 insertions(+), 317 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-config.c b/drivers/hwtra= cing/coresight/coresight-config.c index 4723bf7402a2..e70579d4ce7f 100644 --- a/drivers/hwtracing/coresight/coresight-config.c +++ b/drivers/hwtracing/coresight/coresight-config.c @@ -73,28 +73,29 @@ static void cscfg_init_reg_param(struct cscfg_feature_c= sdev *feat_csdev, /* set values into the driver locations referenced in cscfg_reg_csdev */ static int cscfg_set_on_enable(struct cscfg_feature_csdev *feat_csdev) { - unsigned long flags; int i; =20 - spin_lock_irqsave(feat_csdev->drv_spinlock, flags); - for (i =3D 0; i < feat_csdev->nr_regs; i++) - cscfg_set_reg(&feat_csdev->regs_csdev[i]); - spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); + scoped_guard(raw_spinlock_irqsave, feat_csdev->drv_spinlock) { + for (i =3D 0; i < feat_csdev->nr_regs; i++) + cscfg_set_reg(&feat_csdev->regs_csdev[i]); + } + dev_dbg(&feat_csdev->csdev->dev, "Feature %s: %s", feat_csdev->feat_desc->name, "set on enable"); + return 0; } =20 /* copy back values from the driver locations referenced in cscfg_reg_csde= v */ static void cscfg_save_on_disable(struct cscfg_feature_csdev *feat_csdev) { - unsigned long flags; int i; =20 - spin_lock_irqsave(feat_csdev->drv_spinlock, flags); - for (i =3D 0; i < feat_csdev->nr_regs; i++) - cscfg_save_reg(&feat_csdev->regs_csdev[i]); - spin_unlock_irqrestore(feat_csdev->drv_spinlock, flags); + scoped_guard(raw_spinlock_irqsave, feat_csdev->drv_spinlock) { + for (i =3D 0; i < feat_csdev->nr_regs; i++) + cscfg_save_reg(&feat_csdev->regs_csdev[i]); + } + dev_dbg(&feat_csdev->csdev->dev, "Feature %s: %s", feat_csdev->feat_desc->name, "save on disable"); } diff --git a/drivers/hwtracing/coresight/coresight-config.h b/drivers/hwtra= cing/coresight/coresight-config.h index 6ba013975741..b9ebc9fcfb7f 100644 --- a/drivers/hwtracing/coresight/coresight-config.h +++ b/drivers/hwtracing/coresight/coresight-config.h @@ -206,7 +206,7 @@ struct cscfg_feature_csdev { const struct cscfg_feature_desc *feat_desc; struct coresight_device *csdev; struct list_head node; - spinlock_t *drv_spinlock; + raw_spinlock_t *drv_spinlock; int nr_params; struct cscfg_parameter_csdev *params_csdev; int nr_regs; diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index 66d44a404ad0..1740cf6ab956 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -807,33 +807,30 @@ static int etm4_enable_sysfs(struct coresight_device = *csdev) return ret; } =20 - spin_lock(&drvdata->spinlock); - - /* sysfs needs to read and allocate a trace ID */ - ret =3D etm4_read_alloc_trace_id(drvdata); - if (ret < 0) - goto unlock_sysfs_enable; - - /* - * Executing etm4_enable_hw on the cpu whose ETM is being enabled - * ensures that register writes occur when cpu is powered. - */ - arg.drvdata =3D drvdata; - ret =3D smp_call_function_single(drvdata->cpu, - etm4_enable_hw_smp_call, &arg, 1); - if (!ret) - ret =3D arg.rc; - if (!ret) - drvdata->sticky_enable =3D true; - - if (ret) - etm4_release_trace_id(drvdata); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + /* sysfs needs to read and allocate a trace ID */ + ret =3D etm4_read_alloc_trace_id(drvdata); + if (ret < 0) + return ret; =20 -unlock_sysfs_enable: - spin_unlock(&drvdata->spinlock); + /* + * Executing etm4_enable_hw on the cpu whose ETM is being enabled + * ensures that register writes occur when cpu is powered. + */ + arg.drvdata =3D drvdata; + ret =3D smp_call_function_single(drvdata->cpu, + etm4_enable_hw_smp_call, &arg, 1); + if (!ret) { + ret =3D arg.rc; + drvdata->sticky_enable =3D true; + } else { + etm4_release_trace_id(drvdata); + } + } =20 if (!ret) dev_dbg(&csdev->dev, "ETM tracing enabled\n"); + return ret; } =20 @@ -977,15 +974,13 @@ static void etm4_disable_sysfs(struct coresight_devic= e *csdev) * DYING hotplug callback is serviced by the ETM driver. */ cpus_read_lock(); - spin_lock(&drvdata->spinlock); - - /* - * Executing etm4_disable_hw on the cpu whose ETM is being disabled - * ensures that register writes occur when cpu is powered. - */ - smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1); - - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + /* + * Executing etm4_disable_hw on the cpu whose ETM is being disabled + * ensures that register writes occur when cpu is powered. + */ + smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1); + } cpus_read_unlock(); =20 /* @@ -1663,13 +1658,14 @@ static int etm4_starting_cpu(unsigned int cpu) if (!etmdrvdata[cpu]) return 0; =20 - spin_lock(&etmdrvdata[cpu]->spinlock); + guard(raw_spinlock)(&etmdrvdata[cpu]->spinlock); + if (!etmdrvdata[cpu]->os_unlock) etm4_os_unlock(etmdrvdata[cpu]); =20 if (coresight_get_mode(etmdrvdata[cpu]->csdev)) etm4_enable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); + return 0; } =20 @@ -1678,10 +1674,11 @@ static int etm4_dying_cpu(unsigned int cpu) if (!etmdrvdata[cpu]) return 0; =20 - spin_lock(&etmdrvdata[cpu]->spinlock); + guard(raw_spinlock)(&etmdrvdata[cpu]->spinlock); + if (coresight_get_mode(etmdrvdata[cpu]->csdev)) etm4_disable_hw(etmdrvdata[cpu]); - spin_unlock(&etmdrvdata[cpu]->spinlock); + return 0; } =20 @@ -2125,7 +2122,7 @@ static int etm4_probe(struct device *dev) return -ENOMEM; } =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/= hwtracing/coresight/coresight-etm4x-sysfs.c index a9f19629f3f8..2e6b79c37f87 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -174,99 +174,99 @@ static ssize_t reset_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); - if (val) - config->mode =3D 0x0; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + if (val) + config->mode =3D 0x0; =20 - /* Disable data tracing: do not trace load and store data transfers */ - config->mode &=3D ~(ETM_MODE_LOAD | ETM_MODE_STORE); - config->cfg &=3D ~(TRCCONFIGR_INSTP0_LOAD | TRCCONFIGR_INSTP0_STORE); + /* Disable data tracing: do not trace load and store data transfers */ + config->mode &=3D ~(ETM_MODE_LOAD | ETM_MODE_STORE); + config->cfg &=3D ~(TRCCONFIGR_INSTP0_LOAD | TRCCONFIGR_INSTP0_STORE); =20 - /* Disable data value and data address tracing */ - config->mode &=3D ~(ETM_MODE_DATA_TRACE_ADDR | - ETM_MODE_DATA_TRACE_VAL); - config->cfg &=3D ~(TRCCONFIGR_DA | TRCCONFIGR_DV); + /* Disable data value and data address tracing */ + config->mode &=3D ~(ETM_MODE_DATA_TRACE_ADDR | + ETM_MODE_DATA_TRACE_VAL); + config->cfg &=3D ~(TRCCONFIGR_DA | TRCCONFIGR_DV); =20 - /* Disable all events tracing */ - config->eventctrl0 =3D 0x0; - config->eventctrl1 =3D 0x0; + /* Disable all events tracing */ + config->eventctrl0 =3D 0x0; + config->eventctrl1 =3D 0x0; =20 - /* Disable timestamp event */ - config->ts_ctrl =3D 0x0; + /* Disable timestamp event */ + config->ts_ctrl =3D 0x0; =20 - /* Disable stalling */ - config->stall_ctrl =3D 0x0; + /* Disable stalling */ + config->stall_ctrl =3D 0x0; =20 - /* Reset trace synchronization period to 2^8 =3D 256 bytes*/ - if (drvdata->syncpr =3D=3D false) - config->syncfreq =3D 0x8; + /* Reset trace synchronization period to 2^8 =3D 256 bytes*/ + if (drvdata->syncpr =3D=3D false) + config->syncfreq =3D 0x8; =20 - /* - * Enable ViewInst to trace everything with start-stop logic in - * started state. ARM recommends start-stop logic is set before - * each trace run. - */ - config->vinst_ctrl =3D FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01); - if (drvdata->nr_addr_cmp > 0) { - config->mode |=3D ETM_MODE_VIEWINST_STARTSTOP; - /* SSSTATUS, bit[9] */ - config->vinst_ctrl |=3D TRCVICTLR_SSSTATUS; - } + /* + * Enable ViewInst to trace everything with start-stop logic in + * started state. ARM recommends start-stop logic is set before + * each trace run. + */ + config->vinst_ctrl =3D FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01); + if (drvdata->nr_addr_cmp > 0) { + config->mode |=3D ETM_MODE_VIEWINST_STARTSTOP; + /* SSSTATUS, bit[9] */ + config->vinst_ctrl |=3D TRCVICTLR_SSSTATUS; + } =20 - /* No address range filtering for ViewInst */ - config->viiectlr =3D 0x0; + /* No address range filtering for ViewInst */ + config->viiectlr =3D 0x0; =20 - /* No start-stop filtering for ViewInst */ - config->vissctlr =3D 0x0; - config->vipcssctlr =3D 0x0; + /* No start-stop filtering for ViewInst */ + config->vissctlr =3D 0x0; + config->vipcssctlr =3D 0x0; =20 - /* Disable seq events */ - for (i =3D 0; i < drvdata->nrseqstate-1; i++) - config->seq_ctrl[i] =3D 0x0; - config->seq_rst =3D 0x0; - config->seq_state =3D 0x0; + /* Disable seq events */ + for (i =3D 0; i < drvdata->nrseqstate-1; i++) + config->seq_ctrl[i] =3D 0x0; + config->seq_rst =3D 0x0; + config->seq_state =3D 0x0; =20 - /* Disable external input events */ - config->ext_inp =3D 0x0; + /* Disable external input events */ + config->ext_inp =3D 0x0; =20 - config->cntr_idx =3D 0x0; - for (i =3D 0; i < drvdata->nr_cntr; i++) { - config->cntrldvr[i] =3D 0x0; - config->cntr_ctrl[i] =3D 0x0; - config->cntr_val[i] =3D 0x0; - } + config->cntr_idx =3D 0x0; + for (i =3D 0; i < drvdata->nr_cntr; i++) { + config->cntrldvr[i] =3D 0x0; + config->cntr_ctrl[i] =3D 0x0; + config->cntr_val[i] =3D 0x0; + } =20 - config->res_idx =3D 0x0; - for (i =3D 2; i < 2 * drvdata->nr_resource; i++) - config->res_ctrl[i] =3D 0x0; + config->res_idx =3D 0x0; + for (i =3D 2; i < 2 * drvdata->nr_resource; i++) + config->res_ctrl[i] =3D 0x0; =20 - config->ss_idx =3D 0x0; - for (i =3D 0; i < drvdata->nr_ss_cmp; i++) { - config->ss_ctrl[i] =3D 0x0; - config->ss_pe_cmp[i] =3D 0x0; - } + config->ss_idx =3D 0x0; + for (i =3D 0; i < drvdata->nr_ss_cmp; i++) { + config->ss_ctrl[i] =3D 0x0; + config->ss_pe_cmp[i] =3D 0x0; + } =20 - config->addr_idx =3D 0x0; - for (i =3D 0; i < drvdata->nr_addr_cmp * 2; i++) { - config->addr_val[i] =3D 0x0; - config->addr_acc[i] =3D 0x0; - config->addr_type[i] =3D ETM_ADDR_TYPE_NONE; - } + config->addr_idx =3D 0x0; + for (i =3D 0; i < drvdata->nr_addr_cmp * 2; i++) { + config->addr_val[i] =3D 0x0; + config->addr_acc[i] =3D 0x0; + config->addr_type[i] =3D ETM_ADDR_TYPE_NONE; + } =20 - config->ctxid_idx =3D 0x0; - for (i =3D 0; i < drvdata->numcidc; i++) - config->ctxid_pid[i] =3D 0x0; + config->ctxid_idx =3D 0x0; + for (i =3D 0; i < drvdata->numcidc; i++) + config->ctxid_pid[i] =3D 0x0; =20 - config->ctxid_mask0 =3D 0x0; - config->ctxid_mask1 =3D 0x0; + config->ctxid_mask0 =3D 0x0; + config->ctxid_mask1 =3D 0x0; =20 - config->vmid_idx =3D 0x0; - for (i =3D 0; i < drvdata->numvmidc; i++) - config->vmid_val[i] =3D 0x0; - config->vmid_mask0 =3D 0x0; - config->vmid_mask1 =3D 0x0; + config->vmid_idx =3D 0x0; + for (i =3D 0; i < drvdata->numvmidc; i++) + config->vmid_val[i] =3D 0x0; =20 - spin_unlock(&drvdata->spinlock); + config->vmid_mask0 =3D 0x0; + config->vmid_mask1 =3D 0x0; + } =20 /* for sysfs - only release trace id when resetting */ etm4_release_trace_id(drvdata); @@ -300,7 +300,8 @@ static ssize_t mode_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->mode =3D val & ETMv4_MODE_ALL; =20 if (drvdata->instrp0 =3D=3D true) { @@ -437,8 +438,6 @@ static ssize_t mode_store(struct device *dev, if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER)) etm4_config_trace_mode(config); =20 - spin_unlock(&drvdata->spinlock); - return size; } static DEVICE_ATTR_RW(mode); @@ -466,14 +465,14 @@ static ssize_t pe_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + if (val > drvdata->nr_pe) { - spin_unlock(&drvdata->spinlock); return -EINVAL; } =20 config->pe_sel =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(pe); @@ -501,7 +500,8 @@ static ssize_t event_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + switch (drvdata->nr_event) { case 0x0: /* EVENT0, bits[7:0] */ @@ -522,7 +522,7 @@ static ssize_t event_store(struct device *dev, default: break; } - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(event); @@ -550,7 +550,8 @@ static ssize_t event_instren_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* start by clearing all instruction event enable bits */ config->eventctrl1 &=3D ~TRCEVENTCTL1R_INSTEN_MASK; switch (drvdata->nr_event) { @@ -578,7 +579,7 @@ static ssize_t event_instren_store(struct device *dev, default: break; } - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(event_instren); @@ -739,11 +740,12 @@ static ssize_t event_vinst_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + val &=3D TRCVICTLR_EVENT_MASK >> __bf_shf(TRCVICTLR_EVENT_MASK); config->vinst_ctrl &=3D ~TRCVICTLR_EVENT_MASK; config->vinst_ctrl |=3D FIELD_PREP(TRCVICTLR_EVENT_MASK, val); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(event_vinst); @@ -771,13 +773,14 @@ static ssize_t s_exlevel_vinst_store(struct device *d= ev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* clear all EXLEVEL_S bits */ config->vinst_ctrl &=3D ~TRCVICTLR_EXLEVEL_S_MASK; /* enable instruction tracing for corresponding exception level */ val &=3D drvdata->s_ex_level; config->vinst_ctrl |=3D val << __bf_shf(TRCVICTLR_EXLEVEL_S_MASK); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(s_exlevel_vinst); @@ -806,13 +809,14 @@ static ssize_t ns_exlevel_vinst_store(struct device *= dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* clear EXLEVEL_NS bits */ config->vinst_ctrl &=3D ~TRCVICTLR_EXLEVEL_NS_MASK; /* enable instruction tracing for corresponding exception level */ val &=3D drvdata->ns_ex_level; config->vinst_ctrl |=3D val << __bf_shf(TRCVICTLR_EXLEVEL_NS_MASK); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(ns_exlevel_vinst); @@ -846,9 +850,10 @@ static ssize_t addr_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->addr_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_idx); @@ -862,7 +867,8 @@ static ssize_t addr_instdatatype_show(struct device *de= v, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; val =3D FIELD_GET(TRCACATRn_TYPE_MASK, config->addr_acc[idx]); len =3D scnprintf(buf, PAGE_SIZE, "%s\n", @@ -870,7 +876,7 @@ static ssize_t addr_instdatatype_show(struct device *de= v, (val =3D=3D TRCACATRn_TYPE_DATA_LOAD_ADDR ? "data_load" : (val =3D=3D TRCACATRn_TYPE_DATA_STORE_ADDR ? "data_store" : "data_load_store"))); - spin_unlock(&drvdata->spinlock); + return len; } =20 @@ -888,13 +894,13 @@ static ssize_t addr_instdatatype_store(struct device = *dev, if (sscanf(buf, "%s", str) !=3D 1) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; if (!strcmp(str, "instr")) /* TYPE, bits[1:0] */ config->addr_acc[idx] &=3D ~TRCACATRn_TYPE_MASK; =20 - spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_instdatatype); @@ -908,15 +914,15 @@ static ssize_t addr_single_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - idx =3D config->addr_idx; - spin_lock(&drvdata->spinlock); - if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || - config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; + if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || + config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) + return -EPERM; + + val =3D (unsigned long)config->addr_val[idx]; } - val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -932,17 +938,16 @@ static ssize_t addr_single_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || - config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) { - spin_unlock(&drvdata->spinlock); + config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_SINGLE)) return -EPERM; - } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_SINGLE; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_single); @@ -956,23 +961,21 @@ static ssize_t addr_range_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; - if (idx % 2 !=3D 0) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } - if (!((config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE && - config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_NONE) || - (config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_RANGE && - config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); - return -EPERM; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; + if (idx % 2 !=3D 0) + return -EPERM; + + if (!((config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE && + config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_NONE) || + (config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_RANGE && + config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) + return -EPERM; + + val1 =3D (unsigned long)config->addr_val[idx]; + val2 =3D (unsigned long)config->addr_val[idx + 1]; } =20 - val1 =3D (unsigned long)config->addr_val[idx]; - val2 =3D (unsigned long)config->addr_val[idx + 1]; - spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -995,20 +998,17 @@ static ssize_t addr_range_store(struct device *dev, if (val1 > val2) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; - if (idx % 2 !=3D 0) { - spin_unlock(&drvdata->spinlock); + if (idx % 2 !=3D 0) return -EPERM; - } =20 if (!((config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE && config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_NONE) || (config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_RANGE && - config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) { - spin_unlock(&drvdata->spinlock); + config->addr_type[idx + 1] =3D=3D ETM_ADDR_TYPE_RANGE))) return -EPERM; - } =20 config->addr_val[idx] =3D (u64)val1; config->addr_type[idx] =3D ETM_ADDR_TYPE_RANGE; @@ -1023,7 +1023,6 @@ static ssize_t addr_range_store(struct device *dev, exclude =3D config->mode & ETM_MODE_EXCLUDE; etm4_set_mode_exclude(drvdata, exclude ? true : false); =20 - spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(addr_range); @@ -1037,17 +1036,17 @@ static ssize_t addr_start_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; =20 - if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || - config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; + if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || + config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_START)) { + return -EPERM; + } + + val =3D (unsigned long)config->addr_val[idx]; } =20 - val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1063,22 +1062,21 @@ static ssize_t addr_start_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; if (!drvdata->nr_addr_cmp) { - spin_unlock(&drvdata->spinlock); return -EINVAL; } if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_START)) { - spin_unlock(&drvdata->spinlock); return -EPERM; } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_START; config->vissctlr |=3D BIT(idx); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_start); @@ -1092,17 +1090,16 @@ static ssize_t addr_stop_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; =20 - if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || - config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); - return -EPERM; - } + if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || + config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_STOP)) { + return -EPERM; + } =20 - val =3D (unsigned long)config->addr_val[idx]; - spin_unlock(&drvdata->spinlock); + val =3D (unsigned long)config->addr_val[idx]; + } return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1118,22 +1115,21 @@ static ssize_t addr_stop_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; if (!drvdata->nr_addr_cmp) { - spin_unlock(&drvdata->spinlock); return -EINVAL; } if (!(config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_NONE || config->addr_type[idx] =3D=3D ETM_ADDR_TYPE_STOP)) { - spin_unlock(&drvdata->spinlock); return -EPERM; } =20 config->addr_val[idx] =3D (u64)val; config->addr_type[idx] =3D ETM_ADDR_TYPE_STOP; config->vissctlr |=3D BIT(idx + 16); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_stop); @@ -1147,14 +1143,15 @@ static ssize_t addr_ctxtype_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; /* CONTEXTTYPE, bits[3:2] */ val =3D FIELD_GET(TRCACATRn_CONTEXTTYPE_MASK, config->addr_acc[idx]); len =3D scnprintf(buf, PAGE_SIZE, "%s\n", val =3D=3D ETM_CTX_NONE ? "none= " : (val =3D=3D ETM_CTX_CTXID ? "ctxid" : (val =3D=3D ETM_CTX_VMID ? "vmid" : "all"))); - spin_unlock(&drvdata->spinlock); + return len; } =20 @@ -1172,7 +1169,8 @@ static ssize_t addr_ctxtype_store(struct device *dev, if (sscanf(buf, "%s", str) !=3D 1) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; if (!strcmp(str, "none")) /* start by clearing context type bits */ @@ -1199,7 +1197,7 @@ static ssize_t addr_ctxtype_store(struct device *dev, if (drvdata->numvmidc) config->addr_acc[idx] |=3D TRCACATRn_CONTEXTTYPE_VMID; } - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_ctxtype); @@ -1213,11 +1211,12 @@ static ssize_t addr_context_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; - /* context ID comparator bits[6:4] */ - val =3D FIELD_GET(TRCACATRn_CONTEXT_MASK, config->addr_acc[idx]); - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; + /* context ID comparator bits[6:4] */ + val =3D FIELD_GET(TRCACATRn_CONTEXT_MASK, config->addr_acc[idx]); + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1238,12 +1237,12 @@ static ssize_t addr_context_store(struct device *de= v, drvdata->numcidc : drvdata->numvmidc)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); idx =3D config->addr_idx; /* clear context ID comparator bits[6:4] */ config->addr_acc[idx] &=3D ~TRCACATRn_CONTEXT_MASK; config->addr_acc[idx] |=3D val << __bf_shf(TRCACATRn_CONTEXT_MASK); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_context); @@ -1257,10 +1256,11 @@ static ssize_t addr_exlevel_s_ns_show(struct device= *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; - val =3D FIELD_GET(TRCACATRn_EXLEVEL_MASK, config->addr_acc[idx]); - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; + val =3D FIELD_GET(TRCACATRn_EXLEVEL_MASK, config->addr_acc[idx]); + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1279,12 +1279,13 @@ static ssize_t addr_exlevel_s_ns_store(struct devic= e *dev, if (val & ~(TRCACATRn_EXLEVEL_MASK >> __bf_shf(TRCACATRn_EXLEVEL_MASK))) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->addr_idx; /* clear Exlevel_ns & Exlevel_s bits[14:12, 11:8], bit[15] is res0 */ config->addr_acc[idx] &=3D ~TRCACATRn_EXLEVEL_MASK; config->addr_acc[idx] |=3D val << __bf_shf(TRCACATRn_EXLEVEL_MASK); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(addr_exlevel_s_ns); @@ -1307,22 +1308,23 @@ static ssize_t addr_cmp_view_show(struct device *de= v, int size =3D 0; bool exclude =3D false; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->addr_idx; - addr_v =3D config->addr_val[idx]; - addr_ctrl =3D config->addr_acc[idx]; - addr_type =3D config->addr_type[idx]; - if (addr_type =3D=3D ETM_ADDR_TYPE_RANGE) { - if (idx & 0x1) { - idx -=3D 1; - addr_v2 =3D addr_v; - addr_v =3D config->addr_val[idx]; - } else { - addr_v2 =3D config->addr_val[idx + 1]; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->addr_idx; + addr_v =3D config->addr_val[idx]; + addr_ctrl =3D config->addr_acc[idx]; + addr_type =3D config->addr_type[idx]; + if (addr_type =3D=3D ETM_ADDR_TYPE_RANGE) { + if (idx & 0x1) { + idx -=3D 1; + addr_v2 =3D addr_v; + addr_v =3D config->addr_val[idx]; + } else { + addr_v2 =3D config->addr_val[idx + 1]; + } + exclude =3D config->viiectlr & BIT(idx / 2 + 16); } - exclude =3D config->viiectlr & BIT(idx / 2 + 16); } - spin_unlock(&drvdata->spinlock); + if (addr_type) { size =3D scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx, addr_type_names[addr_type], addr_v); @@ -1366,9 +1368,10 @@ static ssize_t vinst_pe_cmp_start_stop_store(struct = device *dev, if (!drvdata->nr_pe_cmp) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->vipcssctlr =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); @@ -1402,9 +1405,10 @@ static ssize_t seq_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->seq_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(seq_idx); @@ -1448,10 +1452,11 @@ static ssize_t seq_event_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->seq_idx; - val =3D config->seq_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->seq_idx; + val =3D config->seq_ctrl[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1467,11 +1472,12 @@ static ssize_t seq_event_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->seq_idx; /* Seq control has two masks B[15:8] F[7:0] */ config->seq_ctrl[idx] =3D val & 0xFFFF; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(seq_event); @@ -1535,9 +1541,10 @@ static ssize_t cntr_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->cntr_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(cntr_idx); @@ -1551,10 +1558,11 @@ static ssize_t cntrldvr_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->cntr_idx; - val =3D config->cntrldvr[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->cntr_idx; + val =3D config->cntrldvr[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1572,10 +1580,11 @@ static ssize_t cntrldvr_store(struct device *dev, if (val > ETM_CNTR_MAX_VAL) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->cntr_idx; config->cntrldvr[idx] =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(cntrldvr); @@ -1589,10 +1598,11 @@ static ssize_t cntr_val_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->cntr_idx; - val =3D config->cntr_val[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->cntr_idx; + val =3D config->cntr_val[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1610,10 +1620,11 @@ static ssize_t cntr_val_store(struct device *dev, if (val > ETM_CNTR_MAX_VAL) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->cntr_idx; config->cntr_val[idx] =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(cntr_val); @@ -1627,10 +1638,11 @@ static ssize_t cntr_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->cntr_idx; - val =3D config->cntr_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->cntr_idx; + val =3D config->cntr_ctrl[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1646,10 +1658,11 @@ static ssize_t cntr_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->cntr_idx; config->cntr_ctrl[idx] =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(cntr_ctrl); @@ -1687,9 +1700,10 @@ static ssize_t res_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->res_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(res_idx); @@ -1703,10 +1717,11 @@ static ssize_t res_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->res_idx; - val =3D config->res_ctrl[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->res_idx; + val =3D config->res_ctrl[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1722,7 +1737,8 @@ static ssize_t res_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->res_idx; /* For odd idx pair inversal bit is RES0 */ if (idx % 2 !=3D 0) @@ -1732,7 +1748,7 @@ static ssize_t res_ctrl_store(struct device *dev, TRCRSCTLRn_INV | TRCRSCTLRn_GROUP_MASK | TRCRSCTLRn_SELECT_MASK); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(res_ctrl); @@ -1761,9 +1777,10 @@ static ssize_t sshot_idx_store(struct device *dev, if (val >=3D drvdata->nr_ss_cmp) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->ss_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(sshot_idx); @@ -1776,9 +1793,10 @@ static ssize_t sshot_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - val =3D config->ss_ctrl[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D config->ss_ctrl[config->ss_idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1794,12 +1812,13 @@ static ssize_t sshot_ctrl_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->ss_idx; config->ss_ctrl[idx] =3D FIELD_PREP(TRCSSCCRn_SAC_ARC_RST_MASK, val); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &=3D ~TRCSSCSRn_STATUS; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(sshot_ctrl); @@ -1811,9 +1830,10 @@ static ssize_t sshot_status_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - val =3D config->ss_status[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D config->ss_status[config->ss_idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } static DEVICE_ATTR_RO(sshot_status); @@ -1826,9 +1846,10 @@ static ssize_t sshot_pe_ctrl_show(struct device *dev, struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct etmv4_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - val =3D config->ss_pe_cmp[config->ss_idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D config->ss_pe_cmp[config->ss_idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1844,12 +1865,13 @@ static ssize_t sshot_pe_ctrl_store(struct device *d= ev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->ss_idx; config->ss_pe_cmp[idx] =3D FIELD_PREP(TRCSSPCICRn_PC_MASK, val); /* must clear bit 31 in related status register on programming */ config->ss_status[idx] &=3D ~TRCSSCSRn_STATUS; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(sshot_pe_ctrl); @@ -1883,9 +1905,10 @@ static ssize_t ctxid_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->ctxid_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(ctxid_idx); @@ -1906,10 +1929,11 @@ static ssize_t ctxid_pid_show(struct device *dev, if (task_active_pid_ns(current) !=3D &init_pid_ns) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); - idx =3D config->ctxid_idx; - val =3D (unsigned long)config->ctxid_pid[idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + idx =3D config->ctxid_idx; + val =3D (unsigned long)config->ctxid_pid[idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -1944,10 +1968,11 @@ static ssize_t ctxid_pid_store(struct device *dev, if (kstrtoul(buf, 16, &pid)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + idx =3D config->ctxid_idx; config->ctxid_pid[idx] =3D (u64)pid; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(ctxid_pid); @@ -1967,10 +1992,11 @@ static ssize_t ctxid_masks_show(struct device *dev, if (task_active_pid_ns(current) !=3D &init_pid_ns) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); - val1 =3D config->ctxid_mask0; - val2 =3D config->ctxid_mask1; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val1 =3D config->ctxid_mask0; + val2 =3D config->ctxid_mask1; + } + return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -2003,7 +2029,8 @@ static ssize_t ctxid_masks_store(struct device *dev, if ((drvdata->numcidc > 4) && (nr_inputs !=3D 2)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* * each byte[0..3] controls mask value applied to ctxid * comparator[0..3] @@ -2075,7 +2102,6 @@ static ssize_t ctxid_masks_store(struct device *dev, mask >>=3D 0x8; } =20 - spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_RW(ctxid_masks); @@ -2109,9 +2135,10 @@ static ssize_t vmid_idx_store(struct device *dev, * Use spinlock to ensure index doesn't change while it gets * dereferenced multiple times within a spinlock block elsewhere. */ - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->vmid_idx =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(vmid_idx); @@ -2131,9 +2158,10 @@ static ssize_t vmid_val_show(struct device *dev, if (!task_is_in_init_pid_ns(current)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); - val =3D (unsigned long)config->vmid_val[config->vmid_idx]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D (unsigned long)config->vmid_val[config->vmid_idx]; + } + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); } =20 @@ -2161,9 +2189,10 @@ static ssize_t vmid_val_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + config->vmid_val[config->vmid_idx] =3D (u64)val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(vmid_val); @@ -2182,10 +2211,11 @@ static ssize_t vmid_masks_show(struct device *dev, if (!task_is_in_init_pid_ns(current)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); - val1 =3D config->vmid_mask0; - val2 =3D config->vmid_mask1; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val1 =3D config->vmid_mask0; + val2 =3D config->vmid_mask1; + } + return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2); } =20 @@ -2217,7 +2247,7 @@ static ssize_t vmid_masks_store(struct device *dev, if ((drvdata->numvmidc > 4) && (nr_inputs !=3D 2)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* * each byte[0..3] controls mask value applied to vmid @@ -2290,7 +2320,7 @@ static ssize_t vmid_masks_store(struct device *dev, else mask >>=3D 0x8; } - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(vmid_masks); diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtrac= ing/coresight/coresight-etm4x.h index 9e9165f62e81..366f8f23a3e5 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -989,7 +989,7 @@ struct etmv4_drvdata { struct clk *pclk; void __iomem *base; struct coresight_device *csdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; int cpu; u8 arch; u8 nr_pe; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3BF851922ED for ; Mon, 25 Nov 2024 09:48:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C02D81FCD; Mon, 25 Nov 2024 01:48:58 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8CE293F66E; Mon, 25 Nov 2024 01:48:26 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 3/9] coresight: change coresight_trace_id_map's lock type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:10 +0000 Message-Id: <20241125094816.365472-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun coresight_trace_id_map->lock can be acquired while coresight devices' drvdata_lock. But the drvdata_lock can be raw_spinlock_t (i.e) coresight-etm4x. To address this, change type of coresight_trace_id_map->lock to raw_spinlock_t Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- drivers/hwtracing/coresight/coresight-core.c | 2 +- .../hwtracing/coresight/coresight-trace-id.c | 93 +++++++++---------- include/linux/coresight.h | 2 +- 3 files changed, 44 insertions(+), 53 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index ea38ecf26fcb..cc2d87b2f248 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1164,7 +1164,7 @@ struct coresight_device *coresight_register(struct co= resight_desc *desc) =20 if (csdev->type =3D=3D CORESIGHT_DEV_TYPE_SINK || csdev->type =3D=3D CORESIGHT_DEV_TYPE_LINKSINK) { - spin_lock_init(&csdev->perf_sink_id_map.lock); + raw_spin_lock_init(&csdev->perf_sink_id_map.lock); csdev->perf_sink_id_map.cpu_map =3D alloc_percpu(atomic_t); if (!csdev->perf_sink_id_map.cpu_map) { kfree(csdev); diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwt= racing/coresight/coresight-trace-id.c index d98e12cb30ec..1818a353ac5f 100644 --- a/drivers/hwtracing/coresight/coresight-trace-id.c +++ b/drivers/hwtracing/coresight/coresight-trace-id.c @@ -16,7 +16,7 @@ static DEFINE_PER_CPU(atomic_t, id_map_default_cpu_ids) =3D ATOMIC_INIT(0); static struct coresight_trace_id_map id_map_default =3D { .cpu_map =3D &id_map_default_cpu_ids, - .lock =3D __SPIN_LOCK_UNLOCKED(id_map_default.lock) + .lock =3D __RAW_SPIN_LOCK_UNLOCKED(id_map_default.lock) }; =20 /* #define TRACE_ID_DEBUG 1 */ @@ -118,50 +118,46 @@ static void coresight_trace_id_free(int id, struct co= resight_trace_id_map *id_ma */ static void coresight_trace_id_release_all(struct coresight_trace_id_map *= id_map) { - unsigned long flags; int cpu; =20 - spin_lock_irqsave(&id_map->lock, flags); - bitmap_zero(id_map->used_ids, CORESIGHT_TRACE_IDS_MAX); - for_each_possible_cpu(cpu) - atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); - spin_unlock_irqrestore(&id_map->lock, flags); + scoped_guard(raw_spinlock_irqsave, &id_map->lock) { + bitmap_zero(id_map->used_ids, CORESIGHT_TRACE_IDS_MAX); + for_each_possible_cpu(cpu) + atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); + } + DUMP_ID_MAP(id_map); } =20 static int _coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_= id_map *id_map) { - unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map->lock, flags); - - /* check for existing allocation for this CPU */ - id =3D _coresight_trace_id_read_cpu_id(cpu, id_map); - if (id) - goto get_cpu_id_out_unlock; - - /* - * Find a new ID. - * - * Use legacy values where possible in the dynamic trace ID allocator to - * allow older tools to continue working if they are not upgraded at the - * same time as the kernel drivers. - * - * If the generated legacy ID is invalid, or not available then the next - * available dynamic ID will be used. - */ - id =3D coresight_trace_id_alloc_new_id(id_map, - CORESIGHT_LEGACY_CPU_TRACE_ID(cpu), - false); - if (!IS_VALID_CS_TRACE_ID(id)) - goto get_cpu_id_out_unlock; - - /* allocate the new id to the cpu */ - atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), id); + scoped_guard(raw_spinlock_irqsave, &id_map->lock) { + /* check for existing allocation for this CPU */ + id =3D _coresight_trace_id_read_cpu_id(cpu, id_map); + if (id) + return id; =20 -get_cpu_id_out_unlock: - spin_unlock_irqrestore(&id_map->lock, flags); + /* + * Find a new ID. + * + * Use legacy values where possible in the dynamic trace ID allocator to + * allow older tools to continue working if they are not upgraded at the + * same time as the kernel drivers. + * + * If the generated legacy ID is invalid, or not available then the next + * available dynamic ID will be used. + */ + id =3D coresight_trace_id_alloc_new_id(id_map, + CORESIGHT_LEGACY_CPU_TRACE_ID(cpu), + false); + if (!IS_VALID_CS_TRACE_ID(id)) + return id; + + /* allocate the new id to the cpu */ + atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), id); + } =20 DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); @@ -170,7 +166,6 @@ static int _coresight_trace_id_get_cpu_id(int cpu, stru= ct coresight_trace_id_map =20 static void _coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace= _id_map *id_map) { - unsigned long flags; int id; =20 /* check for existing allocation for this CPU */ @@ -178,25 +173,23 @@ static void _coresight_trace_id_put_cpu_id(int cpu, s= truct coresight_trace_id_ma if (!id) return; =20 - spin_lock_irqsave(&id_map->lock, flags); - - coresight_trace_id_free(id, id_map); - atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); + scoped_guard(raw_spinlock_irqsave, &id_map->lock) { + coresight_trace_id_free(id, id_map); + atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); + } =20 - spin_unlock_irqrestore(&id_map->lock, flags); DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); } =20 static int coresight_trace_id_map_get_system_id(struct coresight_trace_id_= map *id_map) { - unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map->lock, flags); - /* prefer odd IDs for system components to avoid legacy CPU IDS */ - id =3D coresight_trace_id_alloc_new_id(id_map, 0, true); - spin_unlock_irqrestore(&id_map->lock, flags); + scoped_guard(raw_spinlock_irqsave, &id_map->lock) { + /* prefer odd IDs for system components to avoid legacy CPU IDS */ + id =3D coresight_trace_id_alloc_new_id(id_map, 0, true); + } =20 DUMP_ID(id); DUMP_ID_MAP(id_map); @@ -205,11 +198,9 @@ static int coresight_trace_id_map_get_system_id(struct= coresight_trace_id_map *i =20 static void coresight_trace_id_map_put_system_id(struct coresight_trace_id= _map *id_map, int id) { - unsigned long flags; - - spin_lock_irqsave(&id_map->lock, flags); - coresight_trace_id_free(id, id_map); - spin_unlock_irqrestore(&id_map->lock, flags); + scoped_guard(raw_spinlock_irqsave, &id_map->lock) { + coresight_trace_id_free(id, id_map); + } =20 DUMP_ID(id); DUMP_ID_MAP(id_map); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 924b58c343b3..6446ca1f09d8 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -233,7 +233,7 @@ struct coresight_trace_id_map { DECLARE_BITMAP(used_ids, CORESIGHT_TRACE_IDS_MAX); atomic_t __percpu *cpu_map; atomic_t perf_cs_etm_session_active; - spinlock_t lock; + raw_spinlock_t lock; }; =20 /** --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 91D6F1925B4 for ; Mon, 25 Nov 2024 09:48:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528113; cv=none; b=ATNzlaXgZ3PQpLJvX8g2ytHrBV4ja5dUo4Kj8GGRqJsx+r3A3DrH2Ljy6LgcP5SRLvNjd7Lf3pV8J+SnbYWBWwPDjRFGG4KznNbMfaltOO5X/V4VNJiV1D+ZKuLcaJrjMfAKu5mXqug/MC8NMAwvTzi1gArKv6cv/KGFfYRRAIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528113; c=relaxed/simple; bh=djXJbAb1RGfZ7BDmxDBwgarcNIj+fJ6NdpcnqHzxdhk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Hj/EhAqy/AyAFvEoGOw09qtbcyOMCMCWEBfthVDev0vlj8AWMeRduucGeFuZcxXrl8MqIikx+prR+izMtDftNTh6xwO0MdmXTNnIFZtLyY3Ljv4D8mJ/pbW3sZkD8PCPW1nTeYy/kxDmsLwwjNnDn5UfjmYKt610e6DcM3Qrhyg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 470201692; Mon, 25 Nov 2024 01:49:01 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 133A03F66E; Mon, 25 Nov 2024 01:48:28 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 4/9] coresight-cti: change cti_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:11 +0000 Message-Id: <20241125094816.365472-5-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-cti drivers, cti_drvdata->spinlock can be held during __schedu= le() by perf_event_task_sched_out()/in(). Since cti_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type cti_drvdata->spinlock in coresight-cti drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-cti-core.c | 65 +++------ .../hwtracing/coresight/coresight-cti-sysfs.c | 135 ++++++++++-------- drivers/hwtracing/coresight/coresight-cti.h | 2 +- 3 files changed, 96 insertions(+), 106 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwt= racing/coresight/coresight-cti-core.c index d2b5a5718c29..1f7766e9a2ea 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -90,10 +90,9 @@ void cti_write_all_hw_regs(struct cti_drvdata *drvdata) static int cti_enable_hw(struct cti_drvdata *drvdata) { struct cti_config *config =3D &drvdata->config; - unsigned long flags; int rc =3D 0; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 /* no need to do anything if enabled or unpowered*/ if (config->hw_enabled || !config->hw_powered) @@ -108,7 +107,6 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) =20 config->hw_enabled =3D true; drvdata->config.enable_req_count++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; =20 cti_state_unchanged: @@ -116,7 +114,6 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) =20 /* cannot enable due to error */ cti_err_not_enabled: - spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } =20 @@ -125,25 +122,20 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *d= rvdata) { struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); config->hw_powered =3D true; =20 /* no need to do anything if no enable request */ if (!drvdata->config.enable_req_count) - goto cti_hp_not_enabled; + return; =20 /* try to claim the device */ if (coresight_claim_device(drvdata->csdev)) - goto cti_hp_not_enabled; + return; =20 cti_write_all_hw_regs(drvdata); config->hw_enabled =3D true; - spin_unlock(&drvdata->spinlock); return; - - /* did not re-enable due to no claim / no request */ -cti_hp_not_enabled: - spin_unlock(&drvdata->spinlock); } =20 /* disable hardware */ @@ -151,23 +143,20 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) { struct cti_config *config =3D &drvdata->config; struct coresight_device *csdev =3D drvdata->csdev; - int ret =3D 0; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* don't allow negative refcounts, return an error */ - if (!drvdata->config.enable_req_count) { - ret =3D -EINVAL; - goto cti_not_disabled; - } + if (!drvdata->config.enable_req_count) + return -EINVAL; =20 /* check refcount - disable on 0 */ if (--drvdata->config.enable_req_count > 0) - goto cti_not_disabled; + return 0; =20 /* no need to do anything if disabled or cpu unpowered */ if (!config->hw_enabled || !config->hw_powered) - goto cti_not_disabled; + return 0; =20 CS_UNLOCK(drvdata->base); =20 @@ -177,13 +166,7 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) =20 coresight_disclaim_device_unlocked(csdev); CS_LOCK(drvdata->base); - spin_unlock(&drvdata->spinlock); - return ret; - - /* not disabled this call */ -cti_not_disabled: - spin_unlock(&drvdata->spinlock); - return ret; + return 0; } =20 void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 val= ue) @@ -198,11 +181,11 @@ void cti_write_intack(struct device *dev, u32 ackval) struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* write if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIINTACK, ackval); - spin_unlock(&drvdata->spinlock); } =20 /* @@ -369,7 +352,7 @@ int cti_channel_trig_op(struct device *dev, enum cti_ch= an_op op, reg_offset =3D (direction =3D=3D CTI_TRIG_IN ? CTIINEN(trigger_idx) : CTIOUTEN(trigger_idx)); =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* read - modify write - the trigger / channel enable value */ reg_value =3D direction =3D=3D CTI_TRIG_IN ? config->ctiinen[trigger_idx]= : @@ -388,7 +371,6 @@ int cti_channel_trig_op(struct device *dev, enum cti_ch= an_op op, /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, reg_offset, reg_value); - spin_unlock(&drvdata->spinlock); return 0; } =20 @@ -406,7 +388,8 @@ int cti_channel_gate_op(struct device *dev, enum cti_ch= an_gate_op op, =20 chan_bitmask =3D BIT(channel_idx); =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); + reg_value =3D config->ctigate; switch (op) { case CTI_GATE_CHAN_ENABLE: @@ -426,7 +409,6 @@ int cti_channel_gate_op(struct device *dev, enum cti_ch= an_gate_op op, if (cti_active(config)) cti_write_single_reg(drvdata, CTIGATE, reg_value); } - spin_unlock(&drvdata->spinlock); return err; } =20 @@ -445,7 +427,8 @@ int cti_channel_setop(struct device *dev, enum cti_chan= _set_op op, =20 chan_bitmask =3D BIT(channel_idx); =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + reg_value =3D config->ctiappset; switch (op) { case CTI_CHAN_SET: @@ -473,7 +456,6 @@ int cti_channel_setop(struct device *dev, enum cti_chan= _set_op op, =20 if ((err =3D=3D 0) && cti_active(config)) cti_write_single_reg(drvdata, reg_offset, reg_value); - spin_unlock(&drvdata->spinlock); =20 return err; } @@ -676,7 +658,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, if (WARN_ON_ONCE(drvdata->ctidev.cpu !=3D cpu)) return NOTIFY_BAD; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 switch (cmd) { case CPU_PM_ENTER: @@ -703,7 +685,7 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, if (drvdata->config.enable_req_count) { /* check we can claim the device as we re-power */ if (coresight_claim_device(csdev)) - goto cti_notify_exit; + return notify_res; =20 drvdata->config.hw_enabled =3D true; cti_write_all_hw_regs(drvdata); @@ -715,8 +697,6 @@ static int cti_cpu_pm_notify(struct notifier_block *nb,= unsigned long cmd, break; } =20 -cti_notify_exit: - spin_unlock(&drvdata->spinlock); return notify_res; } =20 @@ -743,11 +723,12 @@ static int cti_dying_cpu(unsigned int cpu) if (!drvdata) return 0; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + drvdata->config.hw_powered =3D false; if (drvdata->config.hw_enabled) coresight_disclaim_device(drvdata->csdev); - spin_unlock(&drvdata->spinlock); + return 0; } =20 @@ -888,7 +869,7 @@ static int cti_probe(struct amba_device *adev, const st= ruct amba_id *id) drvdata->ctidev.ctm_id =3D 0; INIT_LIST_HEAD(&drvdata->ctidev.trig_cons); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 /* initialise CTI driver config values */ cti_set_default_config(dev, drvdata); diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index d25dd2737b49..fa149b94a495 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -84,11 +84,11 @@ static ssize_t enable_show(struct device *dev, bool enabled, powered; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - enable_req =3D drvdata->config.enable_req_count; - powered =3D drvdata->config.hw_powered; - enabled =3D drvdata->config.hw_enabled; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + enable_req =3D drvdata->config.enable_req_count; + powered =3D drvdata->config.hw_powered; + enabled =3D drvdata->config.hw_enabled; + } =20 if (powered) return sprintf(buf, "%d\n", enabled); @@ -134,9 +134,9 @@ static ssize_t powered_show(struct device *dev, bool powered; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - powered =3D drvdata->config.hw_powered; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + powered =3D drvdata->config.hw_powered; + } =20 return sprintf(buf, "%d\n", powered); } @@ -181,10 +181,10 @@ static ssize_t coresight_cti_reg_show(struct device *= dev, u32 val =3D 0; =20 pm_runtime_get_sync(dev->parent); - spin_lock(&drvdata->spinlock); - if (drvdata->config.hw_powered) - val =3D readl_relaxed(drvdata->base + cti_attr->off); - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + if (drvdata->config.hw_powered) + val =3D readl_relaxed(drvdata->base + cti_attr->off); + } pm_runtime_put_sync(dev->parent); return sysfs_emit(buf, "0x%x\n", val); } @@ -202,10 +202,10 @@ static __maybe_unused ssize_t coresight_cti_reg_store= (struct device *dev, return -EINVAL; =20 pm_runtime_get_sync(dev->parent); - spin_lock(&drvdata->spinlock); - if (drvdata->config.hw_powered) - cti_write_single_reg(drvdata, cti_attr->off, val); - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + if (drvdata->config.hw_powered) + cti_write_single_reg(drvdata, cti_attr->off, val); + } pm_runtime_put_sync(dev->parent); return size; } @@ -264,17 +264,18 @@ static ssize_t cti_reg32_show(struct device *dev, cha= r *buf, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); - if ((reg_offset >=3D 0) && cti_active(config)) { - CS_UNLOCK(drvdata->base); - val =3D readl_relaxed(drvdata->base + reg_offset); - if (pcached_val) - *pcached_val =3D val; - CS_LOCK(drvdata->base); - } else if (pcached_val) { - val =3D *pcached_val; + scoped_guard (raw_spinlock, &drvdata->spinlock) { + if ((reg_offset >=3D 0) && cti_active(config)) { + CS_UNLOCK(drvdata->base); + val =3D readl_relaxed(drvdata->base + reg_offset); + if (pcached_val) + *pcached_val =3D val; + CS_LOCK(drvdata->base); + } else if (pcached_val) { + val =3D *pcached_val; + } } - spin_unlock(&drvdata->spinlock); + return sprintf(buf, "%#x\n", val); } =20 @@ -293,7 +294,8 @@ static ssize_t cti_reg32_store(struct device *dev, cons= t char *buf, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + /* local store */ if (pcached_val) *pcached_val =3D (u32)val; @@ -301,7 +303,7 @@ static ssize_t cti_reg32_store(struct device *dev, cons= t char *buf, /* write through if offset and enabled */ if ((reg_offset >=3D 0) && cti_active(config)) cti_write_single_reg(drvdata, reg_offset, val); - spin_unlock(&drvdata->spinlock); + return size; } =20 @@ -349,9 +351,10 @@ static ssize_t inout_sel_store(struct device *dev, if (val > (CTIINOUTEN_MAX - 1)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + drvdata->config.ctiinout_sel =3D val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(inout_sel); @@ -364,10 +367,11 @@ static ssize_t inen_show(struct device *dev, int index; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - index =3D drvdata->config.ctiinout_sel; - val =3D drvdata->config.ctiinen[index]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + index =3D drvdata->config.ctiinout_sel; + val =3D drvdata->config.ctiinen[index]; + } + return sprintf(buf, "%#lx\n", val); } =20 @@ -383,14 +387,15 @@ static ssize_t inen_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + index =3D config->ctiinout_sel; config->ctiinen[index] =3D val; =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIINEN(index), val); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(inen); @@ -403,10 +408,11 @@ static ssize_t outen_show(struct device *dev, int index; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - index =3D drvdata->config.ctiinout_sel; - val =3D drvdata->config.ctiouten[index]; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + index =3D drvdata->config.ctiinout_sel; + val =3D drvdata->config.ctiouten[index]; + } + return sprintf(buf, "%#lx\n", val); } =20 @@ -422,14 +428,15 @@ static ssize_t outen_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + index =3D config->ctiinout_sel; config->ctiouten[index] =3D val; =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIOUTEN(index), val); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(outen); @@ -463,7 +470,7 @@ static ssize_t appclear_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* a 1'b1 in appclr clears down the same bit in appset*/ config->ctiappset &=3D ~val; @@ -471,7 +478,7 @@ static ssize_t appclear_store(struct device *dev, /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIAPPCLEAR, val); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_WO(appclear); @@ -487,12 +494,12 @@ static ssize_t apppulse_store(struct device *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* write through if enabled */ if (cti_active(config)) cti_write_single_reg(drvdata, CTIAPPPULSE, val); - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_WO(apppulse); @@ -681,9 +688,10 @@ static ssize_t trig_filter_enable_show(struct device *= dev, u32 val; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - val =3D drvdata->config.trig_filter_enable; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D drvdata->config.trig_filter_enable; + } + return sprintf(buf, "%d\n", val); } =20 @@ -697,9 +705,10 @@ static ssize_t trig_filter_enable_store(struct device = *dev, if (kstrtoul(buf, 0, &val)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + drvdata->config.trig_filter_enable =3D !!val; - spin_unlock(&drvdata->spinlock); + return size; } static DEVICE_ATTR_RW(trig_filter_enable); @@ -728,7 +737,7 @@ static ssize_t chan_xtrigs_reset_store(struct device *d= ev, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* clear the CTI trigger / channel programming registers */ for (i =3D 0; i < config->nr_trig_max; i++) { @@ -747,7 +756,6 @@ static ssize_t chan_xtrigs_reset_store(struct device *d= ev, if (cti_active(config)) cti_write_all_hw_regs(drvdata); =20 - spin_unlock(&drvdata->spinlock); return size; } static DEVICE_ATTR_WO(chan_xtrigs_reset); @@ -768,9 +776,10 @@ static ssize_t chan_xtrigs_sel_store(struct device *de= v, if (val > (drvdata->config.nr_ctm_channels - 1)) return -EINVAL; =20 - spin_lock(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); + drvdata->config.xtrig_rchan_sel =3D val; - spin_unlock(&drvdata->spinlock); + return size; } =20 @@ -781,9 +790,9 @@ static ssize_t chan_xtrigs_sel_show(struct device *dev, unsigned long val; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); =20 - spin_lock(&drvdata->spinlock); - val =3D drvdata->config.xtrig_rchan_sel; - spin_unlock(&drvdata->spinlock); + scoped_guard(raw_spinlock, &drvdata->spinlock) { + val =3D drvdata->config.xtrig_rchan_sel; + } =20 return sprintf(buf, "%ld\n", val); } @@ -838,12 +847,12 @@ static ssize_t print_chan_list(struct device *dev, unsigned long inuse_bits =3D 0, chan_mask; =20 /* scan regs to get bitmap of channels in use. */ - spin_lock(&drvdata->spinlock); - for (i =3D 0; i < config->nr_trig_max; i++) { - inuse_bits |=3D config->ctiinen[i]; - inuse_bits |=3D config->ctiouten[i]; + scoped_guard(raw_spinlock, &drvdata->spinlock) { + for (i =3D 0; i < config->nr_trig_max; i++) { + inuse_bits |=3D config->ctiinen[i]; + inuse_bits |=3D config->ctiouten[i]; + } } - spin_unlock(&drvdata->spinlock); =20 /* inverse bits if printing free channels */ if (!inuse) diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracin= g/coresight/coresight-cti.h index cb9ee616d01f..16e310e7e9d4 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -175,7 +175,7 @@ struct cti_drvdata { void __iomem *base; struct coresight_device *csdev; struct cti_device ctidev; - spinlock_t spinlock; + raw_spinlock_t spinlock; struct cti_config config; struct list_head node; void (*csdev_release)(struct device *dev); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 13F931922ED for ; Mon, 25 Nov 2024 09:48:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528116; cv=none; b=aaFK1RmYETWm4+6ncWrGO3loaGyToxc1QI8RYuCeBbYOVTR1huIUqWnWXj2lq3W9lSuvi/gopYT3qO2EaqeGDU0jC8VRhctYka946rI6dnBcC6FaTjosTz1pihVfTp4kFNiHEpqrbFCDtNVS6unKxDAhMi3eByerfcIxNUpKhZo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528116; c=relaxed/simple; bh=zU4bpZy/SFTjJmyIE/IrCPa01LhIUwlxVkvBGUSgpO8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UsFKkV02ZdnVgwOTWTjf7EVFen3ibk9UX1Lut68NdckBWscm0cwqoIvysfonKiCtYRbVtDtoWpy+1gfrFE7DMnaybZXu+a8Xn1+NSeE+KHYEWYHoc3N1HJ9gw4WfYR4GPTM0Zp8pPU+IyiTm3w9Gdpz12HYumWr9iYM1EMQHsjs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C16821756; Mon, 25 Nov 2024 01:49:03 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8DBBF3F66E; Mon, 25 Nov 2024 01:48:31 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 5/9] coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:12 +0000 Message-Id: <20241125094816.365472-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-etb10 drivers, etb_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since etb_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type etb_drvdata->spinlock in coresight-etb10 drive= rs, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- drivers/hwtracing/coresight/coresight-etb10.c | 62 +++++++------------ 1 file changed, 22 insertions(+), 40 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index aea9ac9c4bd0..ec439f8fbc1e 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -84,7 +84,7 @@ struct etb_drvdata { struct clk *atclk; struct coresight_device *csdev; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; local_t reading; pid_t pid; u8 *buf; @@ -141,56 +141,47 @@ static int etb_enable_hw(struct etb_drvdata *drvdata) =20 static int etb_enable_sysfs(struct coresight_device *csdev) { - int ret =3D 0; - unsigned long flags; + int ret; struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 /* Don't messup with perf sessions. */ - if (coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { - ret =3D -EBUSY; - goto out; - } + if (coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) + return -EBUSY; =20 if (coresight_get_mode(csdev) =3D=3D CS_MODE_DISABLED) { ret =3D etb_enable_hw(drvdata); if (ret) - goto out; + return ret; =20 coresight_set_mode(csdev, CS_MODE_SYSFS); } =20 csdev->refcnt++; -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return ret; + + return 0; } =20 static int etb_enable_perf(struct coresight_device *csdev, void *data) { - int ret =3D 0; + int ret; pid_t pid; - unsigned long flags; struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 /* No need to continue if the component is already in used by sysFS. */ - if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { - ret =3D -EBUSY; - goto out; - } + if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) + return -EBUSY; =20 /* Get a handle on the pid of the process to monitor */ pid =3D buf->pid; =20 - if (drvdata->pid !=3D -1 && drvdata->pid !=3D pid) { - ret =3D -EBUSY; - goto out; - } + if (drvdata->pid !=3D -1 && drvdata->pid !=3D pid) + return -EBUSY; =20 /* * No HW configuration is needed if the sink is already in @@ -198,7 +189,7 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) */ if (drvdata->pid =3D=3D pid) { csdev->refcnt++; - goto out; + return 0; } =20 /* @@ -208,7 +199,7 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) */ ret =3D etb_set_buffer(csdev, handle); if (ret) - goto out; + return ret; =20 ret =3D etb_enable_hw(drvdata); if (!ret) { @@ -218,8 +209,6 @@ static int etb_enable_perf(struct coresight_device *csd= ev, void *data) csdev->refcnt++; } =20 -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; } =20 @@ -350,13 +339,11 @@ static void etb_disable_hw(struct etb_drvdata *drvdat= a) static int etb_disable(struct coresight_device *csdev) { struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - unsigned long flags; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -366,7 +353,6 @@ static int etb_disable(struct coresight_device *csdev) /* Dissociate from monitored process. */ drvdata->pid =3D -1; coresight_set_mode(csdev, CS_MODE_DISABLED); - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "ETB disabled\n"); return 0; @@ -434,7 +420,7 @@ static unsigned long etb_update_buffer(struct coresight= _device *csdev, const u32 *barrier; u32 read_ptr, write_ptr, capacity; u32 status, read_data; - unsigned long offset, to_read =3D 0, flags; + unsigned long offset, to_read =3D 0; struct cs_buffers *buf =3D sink_config; struct etb_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 @@ -443,11 +429,11 @@ static unsigned long etb_update_buffer(struct coresig= ht_device *csdev, =20 capacity =3D drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) - goto out; + return 0; =20 __etb_disable_hw(drvdata); CS_UNLOCK(drvdata->base); @@ -565,8 +551,6 @@ static unsigned long etb_update_buffer(struct coresight= _device *csdev, =20 __etb_enable_hw(drvdata); CS_LOCK(drvdata->base); -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return to_read; } @@ -585,15 +569,13 @@ static const struct coresight_ops etb_cs_ops =3D { =20 static void etb_dump(struct etb_drvdata *drvdata) { - unsigned long flags; + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { __etb_disable_hw(drvdata); etb_dump_hw(drvdata); __etb_enable_hw(drvdata); } - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n"); } @@ -746,7 +728,7 @@ static int etb_probe(struct amba_device *adev, const st= ruct amba_id *id) drvdata->base =3D base; desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 drvdata->buffer_depth =3D etb_get_buffer_depth(drvdata); =20 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A8F96193434 for ; Mon, 25 Nov 2024 09:48:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528118; cv=none; b=YMj5PQFcNonsQJps3+PbG3rzUVr28Xi8fW0RJ1kC7k7hbRUjE22l7l2O9QXozFsJ6vE3dc5y2Z/+2uX50Q/vFcAJBGAxew/KsDZW8SqTEJmSOl32vVQXRDmkIaPwpsHoYre+Rd9k4IfvNvxgPeAEI0FuWlrEP6c9fnqBsRtIlHA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Mon, 25 Nov 2024 01:48:33 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 6/9] coresight-funnel: change funnel_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:13 +0000 Message-Id: <20241125094816.365472-7-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-funnel drivers, cti_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since funnel_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type funnel_drvdata->spinlock in coresight-funnel drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-funnel.c | 34 +++++++++---------- 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 5a819c8970fb..dbc2891a10e1 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -47,7 +47,7 @@ struct funnel_drvdata { struct clk *pclk; struct coresight_device *csdev; unsigned long priority; - spinlock_t spinlock; + raw_spinlock_t spinlock; }; =20 static int dynamic_funnel_enable_hw(struct funnel_drvdata *drvdata, int po= rt) @@ -82,19 +82,18 @@ static int funnel_enable(struct coresight_device *csdev, { int rc =3D 0; struct funnel_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - unsigned long flags; bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (atomic_read(&in->dest_refcnt) =3D=3D 0) { - if (drvdata->base) - rc =3D dynamic_funnel_enable_hw(drvdata, in->dest_port); + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (atomic_read(&in->dest_refcnt) =3D=3D 0) { + if (drvdata->base) + rc =3D dynamic_funnel_enable_hw(drvdata, in->dest_port); + if (!rc) + first_enable =3D true; + } if (!rc) - first_enable =3D true; + atomic_inc(&in->dest_refcnt); } - if (!rc) - atomic_inc(&in->dest_refcnt); - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "FUNNEL inport %d enabled\n", @@ -126,16 +125,15 @@ static void funnel_disable(struct coresight_device *c= sdev, struct coresight_connection *out) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - unsigned long flags; bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (atomic_dec_return(&in->dest_refcnt) =3D=3D 0) { - if (drvdata->base) - dynamic_funnel_disable_hw(drvdata, in->dest_port); - last_disable =3D true; + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (atomic_dec_return(&in->dest_refcnt) =3D=3D 0) { + if (drvdata->base) + dynamic_funnel_disable_hw(drvdata, in->dest_port); + last_disable =3D true; + } } - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "FUNNEL inport %d disabled\n", @@ -266,7 +264,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) } dev->platform_data =3D pdata; =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); desc.type =3D CORESIGHT_DEV_TYPE_LINK; desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_MERG; desc.ops =3D &funnel_cs_ops; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 37176196C7B for ; Mon, 25 Nov 2024 09:48:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528121; cv=none; b=tJaTtNq2IVdP6tazKf8mZkLSJ20R13s9STf4gC924elIF6mGszWi/eswbhcScq62w3GvtTbBZcnKOeRNAkr57z1gAU1Aw0WQb9cdOJNx3wYCV2l0JwCkm0WjBvLdLHx2BSo4pBSC7LS90ymrETCvEZilCigxHmicHvbpyqIYq4E= ARC-Message-Signature: i=1; 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Mon, 25 Nov 2024 01:48:36 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 7/9] coresight-replicator: change replicator_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:14 +0000 Message-Id: <20241125094816.365472-8-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-replicator drivers, replicator_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since replicator_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type replicator_drvdata->spinlock in coresight-replicator drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../coresight/coresight-replicator.c | 36 +++++++++---------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 3e55be9c8418..7ff08fb70758 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -41,7 +41,7 @@ struct replicator_drvdata { struct clk *atclk; struct clk *pclk; struct coresight_device *csdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; bool check_idfilter_val; }; =20 @@ -122,20 +122,19 @@ static int replicator_enable(struct coresight_device = *csdev, { int rc =3D 0; struct replicator_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - unsigned long flags; bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { if (atomic_read(&out->src_refcnt) =3D=3D 0) { - if (drvdata->base) - rc =3D dynamic_replicator_enable(drvdata, in->dest_port, - out->src_port); + if (drvdata->base) + rc =3D dynamic_replicator_enable(drvdata, in->dest_port, + out->src_port); + if (!rc) + first_enable =3D true; + } if (!rc) - first_enable =3D true; + atomic_inc(&out->src_refcnt); } - if (!rc) - atomic_inc(&out->src_refcnt); - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "REPLICATOR enabled\n"); @@ -176,17 +175,16 @@ static void replicator_disable(struct coresight_devic= e *csdev, struct coresight_connection *out) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); - unsigned long flags; bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (atomic_dec_return(&out->src_refcnt) =3D=3D 0) { - if (drvdata->base) - dynamic_replicator_disable(drvdata, in->dest_port, - out->src_port); - last_disable =3D true; + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (atomic_dec_return(&out->src_refcnt) =3D=3D 0) { + if (drvdata->base) + dynamic_replicator_disable(drvdata, in->dest_port, + out->src_port); + last_disable =3D true; + } } - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "REPLICATOR disabled\n"); @@ -277,7 +275,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) } dev->platform_data =3D pdata; =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); desc.type =3D CORESIGHT_DEV_TYPE_LINK; desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; desc.ops =3D &replicator_cs_ops; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 910DA1991BA for ; Mon, 25 Nov 2024 09:48:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528123; cv=none; b=dwAr6HHDmq8VzHwlTUhm+E1R1jndAKITLaIHgiooBnhPzBIigh7hHzqSQi/aAPBbkR7qiZp9QkobYxZ1Rbz0VBHCPDaLw5MqZiUyFOd7EhsCZLlpdRnFnBJiPOBnOb0/NqEnu8tchJ4JrePDzOEEeDi6NqJ3TIu6BbC4YLu8yuo= ARC-Message-Signature: i=1; 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Mon, 25 Nov 2024 01:48:38 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 8/9] coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:15 +0000 Message-Id: <20241125094816.365472-9-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In coresight-tmc drivers, tmc_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since tmc_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type tmc_drvdata->spinlock in coresight-tmc drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- .../hwtracing/coresight/coresight-tmc-core.c | 9 +- .../hwtracing/coresight/coresight-tmc-etf.c | 195 +++++++---------- .../hwtracing/coresight/coresight-tmc-etr.c | 199 ++++++++---------- drivers/hwtracing/coresight/coresight-tmc.h | 2 +- 4 files changed, 169 insertions(+), 236 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index 3a482fd2cb22..d6499eb14745 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -492,7 +492,7 @@ static int __tmc_probe(struct device *dev, struct resou= rce *res) drvdata->base =3D base; desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 devid =3D readl_relaxed(drvdata->base + CORESIGHT_DEVID); drvdata->config_type =3D BMVAL(devid, 6, 7); @@ -593,13 +593,12 @@ static int tmc_probe(struct amba_device *adev, const = struct amba_id *id) =20 static void tmc_shutdown(struct amba_device *adev) { - unsigned long flags; struct tmc_drvdata *drvdata =3D amba_get_drvdata(adev); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_DISABLED) - goto out; + return; =20 if (drvdata->config_type =3D=3D TMC_CONFIG_TYPE_ETR) tmc_etr_disable_hw(drvdata); @@ -609,8 +608,6 @@ static void tmc_shutdown(struct amba_device *adev) * callback which is required for making coresight modular since * the system is going down after this. */ -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); } =20 static void __tmc_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtr= acing/coresight/coresight-tmc-etf.c index d4f641cd9de6..b2f97defbba2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -182,9 +182,9 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) * If we don't have a buffer release the lock and allocate memory. * Otherwise keep the lock and move along. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (!drvdata->buf) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocating the memory here while outside of the spinlock */ buf =3D kzalloc(drvdata->size, GFP_KERNEL); @@ -192,7 +192,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) return -ENOMEM; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading) { @@ -235,7 +235,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) used =3D false; } out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (!used) @@ -248,12 +248,12 @@ static int tmc_enable_etf_sink_perf(struct coresight_= device *csdev, void *data) { int ret =3D 0; pid_t pid; - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); + do { ret =3D -EINVAL; if (drvdata->reading) @@ -296,7 +296,6 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) csdev->refcnt++; } } while (0); - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -328,31 +327,24 @@ static int tmc_enable_etf_sink(struct coresight_devic= e *csdev, =20 static int tmc_disable_etf_sink(struct coresight_device *csdev) { - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (drvdata->reading) + return -EBUSY; =20 - if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; - } + csdev->refcnt--; + if (csdev->refcnt) + return -EBUSY; =20 - csdev->refcnt--; - if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; + /* Complain if we (somehow) got out of sync */ + WARN_ON_ONCE(coresight_get_mode(csdev) =3D=3D CS_MODE_DISABLED); + tmc_etb_disable_hw(drvdata); + /* Dissociate from monitored process. */ + drvdata->pid =3D -1; + coresight_set_mode(csdev, CS_MODE_DISABLED); } =20 - /* Complain if we (somehow) got out of sync */ - WARN_ON_ONCE(coresight_get_mode(csdev) =3D=3D CS_MODE_DISABLED); - tmc_etb_disable_hw(drvdata); - /* Dissociate from monitored process. */ - drvdata->pid =3D -1; - coresight_set_mode(csdev, CS_MODE_DISABLED); - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(&csdev->dev, "TMC-ETB/ETF disabled\n"); return 0; } @@ -362,26 +354,23 @@ static int tmc_enable_etf_link(struct coresight_devic= e *csdev, struct coresight_connection *out) { int ret =3D 0; - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; - } - - if (csdev->refcnt =3D=3D 0) { - ret =3D tmc_etf_enable_hw(drvdata); - if (!ret) { - coresight_set_mode(csdev, CS_MODE_SYSFS); - first_enable =3D true; + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (drvdata->reading) + return -EBUSY; + + if (csdev->refcnt =3D=3D 0) { + ret =3D tmc_etf_enable_hw(drvdata); + if (!ret) { + coresight_set_mode(csdev, CS_MODE_SYSFS); + first_enable =3D true; + } } + if (!ret) + csdev->refcnt++; } - if (!ret) - csdev->refcnt++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "TMC-ETF enabled\n"); @@ -392,23 +381,20 @@ static void tmc_disable_etf_link(struct coresight_dev= ice *csdev, struct coresight_connection *in, struct coresight_connection *out) { - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return; - } + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (drvdata->reading) + return; =20 - csdev->refcnt--; - if (csdev->refcnt =3D=3D 0) { - tmc_etf_disable_hw(drvdata); - coresight_set_mode(csdev, CS_MODE_DISABLED); - last_disable =3D true; + csdev->refcnt--; + if (csdev->refcnt =3D=3D 0) { + tmc_etf_disable_hw(drvdata); + coresight_set_mode(csdev, CS_MODE_DISABLED); + last_disable =3D true; + } } - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "TMC-ETF disabled\n"); @@ -477,7 +463,7 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, u32 *buf_ptr; u64 read_ptr, write_ptr; u32 status; - unsigned long offset, to_read =3D 0, flags; + unsigned long offset, to_read =3D 0; struct cs_buffers *buf =3D sink_config; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 @@ -488,11 +474,11 @@ static unsigned long tmc_update_etf_buffer(struct cor= esight_device *csdev, if (WARN_ON_ONCE(coresight_get_mode(csdev) !=3D CS_MODE_PERF)) return 0; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) - goto out; + return 0; =20 CS_UNLOCK(drvdata->base); =20 @@ -584,8 +570,6 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, * is expected by the perf ring buffer. */ CS_LOCK(drvdata->base); -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return to_read; } @@ -615,56 +599,43 @@ const struct coresight_ops tmc_etf_cs_ops =3D { int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) { enum tmc_mode mode; - int ret =3D 0; - unsigned long flags; =20 /* config types are set a boot time and never change */ if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETB && drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); =20 - if (drvdata->reading) { - ret =3D -EBUSY; - goto out; - } + if (drvdata->reading) + return -EBUSY; =20 /* Don't interfere if operated from Perf */ - if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_PERF) { - ret =3D -EINVAL; - goto out; - } + if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_PERF) + return -EINVAL; =20 /* If drvdata::buf is NULL the trace data has been read already */ - if (drvdata->buf =3D=3D NULL) { - ret =3D -EINVAL; - goto out; - } + if (drvdata->buf =3D=3D NULL) + return -EINVAL; =20 /* Disable the TMC if need be */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { /* There is no point in reading a TMC in HW FIFO mode */ mode =3D readl_relaxed(drvdata->base + TMC_MODE); - if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) { - ret =3D -EINVAL; - goto out; - } + if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) + return -EINVAL; __tmc_etb_disable_hw(drvdata); } =20 drvdata->reading =3D true; -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 - return ret; + return 0; } =20 int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) { char *buf =3D NULL; enum tmc_mode mode; - unsigned long flags; int rc =3D 0; =20 /* config types are set a boot time and never change */ @@ -672,41 +643,37 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdat= a) drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - - /* Re-enable the TMC if need be */ - if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { - /* There is no point in reading a TMC in HW FIFO mode */ - mode =3D readl_relaxed(drvdata->base + TMC_MODE); - if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EINVAL; - } - /* - * The trace run will continue with the same allocated trace - * buffer. As such zero-out the buffer so that we don't end - * up with stale data. - * - * Since the tracer is still enabled drvdata::buf - * can't be NULL. - */ - memset(drvdata->buf, 0, drvdata->size); - rc =3D __tmc_etb_enable_hw(drvdata); - if (rc) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return rc; + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + /* Re-enable the TMC if need be */ + if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { + /* There is no point in reading a TMC in HW FIFO mode */ + mode =3D readl_relaxed(drvdata->base + TMC_MODE); + if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) + return -EINVAL; + + /* + * The trace run will continue with the same allocated trace + * buffer. As such zero-out the buffer so that we don't end + * up with stale data. + * + * Since the tracer is still enabled drvdata::buf + * can't be NULL. + */ + memset(drvdata->buf, 0, drvdata->size); + rc =3D __tmc_etb_enable_hw(drvdata); + if (rc) + return rc; + } else { + /* + * The ETB/ETF is not tracing and the buffer was just read. + * As such prepare to free the trace buffer. + */ + buf =3D drvdata->buf; + drvdata->buf =3D NULL; } - } else { - /* - * The ETB/ETF is not tracing and the buffer was just read. - * As such prepare to free the trace buffer. - */ - buf =3D drvdata->buf; - drvdata->buf =3D NULL; - } =20 - drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + drvdata->reading =3D false; + } =20 /* * Free allocated memory outside of the spinlock. There is no need diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index a48bb85d0e7f..6672bea4d2b9 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1176,10 +1176,10 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(str= uct coresight_device *csdev) * buffer, provided the size matches. Any allocation has to be done * with the lock released. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); sysfs_buf =3D READ_ONCE(drvdata->sysfs_buf); if (!sysfs_buf || (sysfs_buf->size !=3D drvdata->size)) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocate memory with the locks released */ free_buf =3D new_buf =3D tmc_etr_setup_sysfs_buf(drvdata); @@ -1187,7 +1187,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) return new_buf; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading || coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { @@ -1206,7 +1206,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (free_buf) @@ -1216,35 +1216,31 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(str= uct coresight_device *csdev) =20 static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) { - int ret =3D 0; - unsigned long flags; + int ret; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct etr_buf *sysfs_buf =3D tmc_etr_get_sysfs_buffer(csdev); =20 if (IS_ERR(sysfs_buf)) return PTR_ERR(sysfs_buf); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - - /* - * In sysFS mode we can have multiple writers per sink. Since this - * sink is already enabled no memory is needed and the HW need not be - * touched, even if the buffer size has changed. - */ - if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) { - csdev->refcnt++; - goto out; - } + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + /* + * In sysFS mode we can have multiple writers per sink. Since this + * sink is already enabled no memory is needed and the HW need not be + * touched, even if the buffer size has changed. + */ + if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) { + csdev->refcnt++; + return 0; + } =20 - ret =3D tmc_etr_enable_hw(drvdata, sysfs_buf); - if (!ret) { - coresight_set_mode(csdev, CS_MODE_SYSFS); - csdev->refcnt++; + ret =3D tmc_etr_enable_hw(drvdata, sysfs_buf); + if (!ret) { + coresight_set_mode(csdev, CS_MODE_SYSFS); + csdev->refcnt++; + } } =20 -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); - if (!ret) dev_dbg(&csdev->dev, "TMC-ETR enabled\n"); =20 @@ -1557,32 +1553,28 @@ tmc_update_etr_buffer(struct coresight_device *csde= v, void *config) { bool lost =3D false; - unsigned long flags, offset, size =3D 0; + unsigned long offset, size =3D 0; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct etr_perf_buffer *etr_perf =3D config; struct etr_buf *etr_buf =3D etr_perf->etr_buf; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - - /* Don't do anything if another tracer is using this sink */ - if (csdev->refcnt !=3D 1) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - goto out; - } + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + /* Don't do anything if another tracer is using this sink */ + if (csdev->refcnt !=3D 1) + goto out; =20 - if (WARN_ON(drvdata->perf_buf !=3D etr_buf)) { - lost =3D true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - goto out; - } + if (WARN_ON(drvdata->perf_buf !=3D etr_buf)) { + lost =3D true; + goto out; + } =20 - CS_UNLOCK(drvdata->base); + CS_UNLOCK(drvdata->base); =20 - tmc_flush_and_stop(drvdata); - tmc_sync_etr_buf(drvdata); + tmc_flush_and_stop(drvdata); + tmc_sync_etr_buf(drvdata); =20 - CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + CS_LOCK(drvdata->base); + } =20 lost =3D etr_buf->full; offset =3D etr_buf->offset; @@ -1644,33 +1636,27 @@ tmc_update_etr_buffer(struct coresight_device *csde= v, =20 static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *= data) { - int rc =3D 0; + int rc; pid_t pid; - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); struct perf_output_handle *handle =3D data; struct etr_perf_buffer *etr_perf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + guard(raw_spinlock_irqsave)(&drvdata->spinlock); + /* Don't use this sink if it is already claimed by sysFS */ - if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) { - rc =3D -EBUSY; - goto unlock_out; - } + if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) + return -EBUSY; =20 - if (WARN_ON(!etr_perf || !etr_perf->etr_buf)) { - rc =3D -EINVAL; - goto unlock_out; - } + if (WARN_ON(!etr_perf || !etr_perf->etr_buf)) + return -EINVAL; =20 /* Get a handle on the pid of the session owner */ pid =3D etr_perf->pid; =20 /* Do not proceed if this device is associated with another session */ - if (drvdata->pid !=3D -1 && drvdata->pid !=3D pid) { - rc =3D -EBUSY; - goto unlock_out; - } + if (drvdata->pid !=3D -1 && drvdata->pid !=3D pid) + return -EBUSY; =20 /* * No HW configuration is needed if the sink is already in @@ -1678,7 +1664,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) */ if (drvdata->pid =3D=3D pid) { csdev->refcnt++; - goto unlock_out; + return 0; } =20 rc =3D tmc_etr_enable_hw(drvdata, etr_perf->etr_buf); @@ -1690,8 +1676,6 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) csdev->refcnt++; } =20 -unlock_out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } =20 @@ -1710,33 +1694,26 @@ static int tmc_enable_etr_sink(struct coresight_dev= ice *csdev, =20 static int tmc_disable_etr_sink(struct coresight_device *csdev) { - unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - - if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; - } - - csdev->refcnt--; - if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EBUSY; + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + if (drvdata->reading) + return -EBUSY; + + csdev->refcnt--; + if (csdev->refcnt) + return -EBUSY; + + /* Complain if we (somehow) got out of sync */ + WARN_ON_ONCE(coresight_get_mode(csdev) =3D=3D CS_MODE_DISABLED); + tmc_etr_disable_hw(drvdata); + /* Dissociate from monitored process. */ + drvdata->pid =3D -1; + coresight_set_mode(csdev, CS_MODE_DISABLED); + /* Reset perf specific data */ + drvdata->perf_buf =3D NULL; } =20 - /* Complain if we (somehow) got out of sync */ - WARN_ON_ONCE(coresight_get_mode(csdev) =3D=3D CS_MODE_DISABLED); - tmc_etr_disable_hw(drvdata); - /* Dissociate from monitored process. */ - drvdata->pid =3D -1; - coresight_set_mode(csdev, CS_MODE_DISABLED); - /* Reset perf specific data */ - drvdata->perf_buf =3D NULL; - - spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(&csdev->dev, "TMC-ETR disabled\n"); return 0; } @@ -1756,70 +1733,62 @@ const struct coresight_ops tmc_etr_cs_ops =3D { int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) { int ret =3D 0; - unsigned long flags; =20 /* config types are set a boot time and never change */ if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); - if (drvdata->reading) { - ret =3D -EBUSY; - goto out; - } + guard(raw_spinlock_irqsave)(&drvdata->spinlock); + + if (drvdata->reading) + return -EBUSY; =20 /* * We can safely allow reads even if the ETR is operating in PERF mode, * since the sysfs session is captured in mode specific data. * If drvdata::sysfs_data is NULL the trace data has been read already. */ - if (!drvdata->sysfs_buf) { - ret =3D -EINVAL; - goto out; - } + if (!drvdata->sysfs_buf) + return -EINVAL; =20 /* Disable the TMC if we are trying to read from a running session. */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) __tmc_etr_disable_hw(drvdata); =20 drvdata->reading =3D true; -out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } =20 int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) { - unsigned long flags; struct etr_buf *sysfs_buf =3D NULL; =20 /* config types are set a boot time and never change */ if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) { + /* RE-enable the TMC if need be */ + if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { + /* + * The trace run will continue with the same allocated trace + * buffer. Since the tracer is still enabled drvdata::buf can't + * be NULL. + */ + __tmc_etr_enable_hw(drvdata); + } else { + /* + * The ETR is not tracing and the buffer was just read. + * As such prepare to free the trace buffer. + */ + sysfs_buf =3D drvdata->sysfs_buf; + drvdata->sysfs_buf =3D NULL; + } =20 - /* RE-enable the TMC if need be */ - if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { - /* - * The trace run will continue with the same allocated trace - * buffer. Since the tracer is still enabled drvdata::buf can't - * be NULL. - */ - __tmc_etr_enable_hw(drvdata); - } else { - /* - * The ETR is not tracing and the buffer was just read. - * As such prepare to free the trace buffer. - */ - sysfs_buf =3D drvdata->sysfs_buf; - drvdata->sysfs_buf =3D NULL; + drvdata->reading =3D false; } =20 - drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - /* Free allocated memory out side of the spinlock */ if (sysfs_buf) tmc_etr_free_sysfs_buf(sysfs_buf); diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 2671926be62a..60b395025bc4 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -195,7 +195,7 @@ struct tmc_drvdata { void __iomem *base; struct coresight_device *csdev; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; pid_t pid; bool reading; union { --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Sat Feb 7 07:31:38 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 61830199935 for ; Mon, 25 Nov 2024 09:48:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528125; cv=none; b=iNq0kMpc59g1S1BqFPgTcwpc+LwNd6EXs9Pl+Fa0GERE/WY+FFK8R42RWhhxJmoJxvcBZ/xTClnZC0OZiiDA5f1KJrTs0ZJfQZLy6/Nr+PeVso7fnBfwUx+hlA6k2J2bwLwSDkNrUyiuDK/kxr7Q2uAN9QD30m2ljYoi2qm7R4A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732528125; c=relaxed/simple; bh=a5YNZ7tWJCDnxKMQCw9UK+C6RwdhvMc66Ssvx9VcFcM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WIILxRal1HrFKYAnBL8yhvvrM7wiMNbZ1gVxBLcmPBVX9xq7JqHgki9oFNfOAqxLkK8ChpgXpgpI7TcE3uFdsMX6ytXH1gfFQGlkflo/yWpmNdoMy/Q8zPAZi1Hx+VHWNJ6XmdXsA9T2j6VE10a+OwBOrBW+6+s0enPaSMQIVeA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C26FB1756; Mon, 25 Nov 2024 01:49:13 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8EF163F66E; Mon, 25 Nov 2024 01:48:41 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, nd@arm.com, Levi Yun Subject: [PATCH 9/9] coresight/ultrasoc: change cti_drvdata spinlock's type to raw_spinlock_t Date: Mon, 25 Nov 2024 09:48:16 +0000 Message-Id: <20241125094816.365472-10-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241125094816.365472-1-yeoreum.yun@arm.com> References: <20241125094816.365472-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Levi Yun In ultrasoc-smb drivers, smb_drv_data->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since smb__drv_data->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type smb_drv_data->spinlock in ultrasoc-smb drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: James Clark --- drivers/hwtracing/coresight/ultrasoc-smb.c | 12 ++++++------ drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing= /coresight/ultrasoc-smb.c index ef7f560f0ffa..9ab4aec6955e 100644 --- a/drivers/hwtracing/coresight/ultrasoc-smb.c +++ b/drivers/hwtracing/coresight/ultrasoc-smb.c @@ -98,7 +98,7 @@ static int smb_open(struct inode *inode, struct file *fil= e) struct smb_drv_data *drvdata =3D container_of(file->private_data, struct smb_drv_data, miscdev); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 if (drvdata->reading) return -EBUSY; @@ -152,7 +152,7 @@ static int smb_release(struct inode *inode, struct file= *file) struct smb_drv_data *drvdata =3D container_of(file->private_data, struct smb_drv_data, miscdev); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); drvdata->reading =3D false; =20 return 0; @@ -245,7 +245,7 @@ static int smb_enable(struct coresight_device *csdev, e= num cs_mode mode, struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); int ret =3D 0; =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* Do nothing, the trace data is reading by other interface now */ if (drvdata->reading) @@ -280,7 +280,7 @@ static int smb_disable(struct coresight_device *csdev) { struct smb_drv_data *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 if (drvdata->reading) return -EBUSY; @@ -378,7 +378,7 @@ static unsigned long smb_update_buffer(struct coresight= _device *csdev, if (!buf) return 0; =20 - guard(spinlock)(&drvdata->spinlock); + guard(raw_spinlock)(&drvdata->spinlock); =20 /* Don't do anything if another tracer is using this sink. */ if (csdev->refcnt !=3D 1) @@ -563,7 +563,7 @@ static int smb_probe(struct platform_device *pdev) =20 smb_reset_buffer(drvdata); platform_set_drvdata(pdev, drvdata); - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); drvdata->pid =3D -1; =20 ret =3D smb_register_sink(pdev, drvdata); diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.h b/drivers/hwtracing= /coresight/ultrasoc-smb.h index a91d39cfccb8..c4c111275627 100644 --- a/drivers/hwtracing/coresight/ultrasoc-smb.h +++ b/drivers/hwtracing/coresight/ultrasoc-smb.h @@ -115,7 +115,7 @@ struct smb_drv_data { struct coresight_device *csdev; struct smb_data_buffer sdb; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; bool reading; pid_t pid; }; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}