From nobody Sat Feb 7 18:29:16 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 959555103F; Sun, 24 Nov 2024 22:29:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732487381; cv=none; b=e/KEglreenLo/i0YEtR/Eo0ya0Gfmrsd9hACJ2HK9zFBbwHM/7NoO2d7FFGKzuZ4DXlrVwgts813EbPI5F0BZY7FhiDNJs8eF6LY9lofQuvAov6is4qRYYZKbGPF4/2DB4P71/DLZJgnV6to9tCTnyFMFJQbgQVdDxTBwhqh5Ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732487381; c=relaxed/simple; bh=oBmgB4n3U2evvqYhhVMBbKaiZhJ4zZa97cdV6i9zRZQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kLemnXqW8fosHT+KqgG0x9DyIQFTej7/jimlmdMX3PvqXcFqPvI5ZZDDRjqnyYHLm8JmDijo/RLERL+AA6VNB9MPPdgn4uCyXrMac4R15FIQJz4nTwVTRRcVSvqwIWGMvGOwzFdW5i5jBFGyg5351+qrma74ETr7rEy/bPS8Mq4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=W82RVZGx; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="W82RVZGx" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2517AC4CECC; Sun, 24 Nov 2024 22:29:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732487381; bh=oBmgB4n3U2evvqYhhVMBbKaiZhJ4zZa97cdV6i9zRZQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=W82RVZGxUOQ2s5evCxvlfUgWaPD6qSBLpUPavraAh4v3Wc+XirzXceBjfYGWqhbg3 6mEq35MdUKyd7qwAqYIyJtEomcEZgMlTSz7B3YteKCGA1sdfj+8QbjgTBotx2FACn8 V5WyAswZQ9IjMS3858mZLc1OfKX9lW9rXWHWI4Ec5sWXV5/l/JterB+pgWtL3v8Bx9 Wjx0cfRDw79yqT49hmKAr/Eycqtp89ViNHdQ1eq7Vd8+IGTKpL8vOs1c8VwKfujqmc +PmmoO2APravNjmNIWPQVZFn5JnCZfmK94XRJRBH3jO/sOsgSWsgMuRoJL9v41nD5s o2LHOifdvKRkA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17881E69187; Sun, 24 Nov 2024 22:29:41 +0000 (UTC) From: Sasha Finkelstein via B4 Relay Date: Sun, 24 Nov 2024 23:29:24 +0100 Subject: [PATCH 1/5] dt-bindgins: display: Add Apple pre-DCP display controller bindings Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241124-adpdrm-v1-1-3191d8e6e49a@gmail.com> References: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> In-Reply-To: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sasha Finkelstein X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732487379; l=2711; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=NTNIkjPdOTlJZEDvMknaGPG5ha7ey/9KeGDX3Cvd+fo=; b=aEiRFrdmA0I2NmORiFQ0n25DBwKAtSgEjQA1vtAY9JgY15BTKorcuza/Kpb5hFtDSET8waSkN UXv3sdP+1LFD5i79mgtG+qRN2dKShhJRlzP0wvWtLVqDSSNrku1HWx5 X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein Add bindings for a secondary display controller present on certain Apple laptops. Signed-off-by: Sasha Finkelstein --- .../bindings/display/apple,display-pipe.yaml | 59 ++++++++++++++++++= ++++ .../bindings/display/panel/apple,summit.yaml | 24 +++++++++ 2 files changed, 83 insertions(+) diff --git a/Documentation/devicetree/bindings/display/apple,display-pipe.y= aml b/Documentation/devicetree/bindings/display/apple,display-pipe.yaml new file mode 100644 index 0000000000000000000000000000000000000000..bd25ddc6e09dd636c0221c854e5= 94113f6011866 --- /dev/null +++ b/Documentation/devicetree/bindings/display/apple,display-pipe.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/apple,display-pipe.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple pre-DCP display controller. + +maintainers: + - asahi@lists.linux.dev + - Sasha Finkelstein + +description: | + A secondary display controller used to drive the "touchbar" on certain + Apple laptops. + +properties: + compatible: + items: + - enum: + - "apple,t8112-display-pipe" + - "apple,t8103-display-pipe" + - const: "apple,h7-display-pipe" + + reg: + minItems: 3 + maxItems: 3 + + reg-names: + items: + - const: be + - const: fe + - const: mipi + + power-domains: true + + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + items: + - const: be + - const: fe + + iommus: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +additionalProperties: true + +required: + - compatible + - reg + - interrupts diff --git a/Documentation/devicetree/bindings/display/panel/apple,summit.y= aml b/Documentation/devicetree/bindings/display/panel/apple,summit.yaml new file mode 100644 index 0000000000000000000000000000000000000000..dc281c1f52c1ed07cc2f7f804dc= fd2f3b4239d89 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/apple,summit.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/apple,summit.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple "Summit" display panel. + +maintainers: + - asahi@lists.linux.dev + - Sasha Finkelstein + +properties: + compatible: + const: apple,summit + + reg: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg --=20 2.47.0 From nobody Sat Feb 7 18:29:16 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1C7216F0E8; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241124-adpdrm-v1-2-3191d8e6e49a@gmail.com> References: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> In-Reply-To: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sasha Finkelstein , Janne Grunau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732487379; l=26704; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=hEdcGCufarFGarXqGx7f+42ilFEEinGGOQzeejnUTQo=; b=k9cboyAB5eijV7sd6bQSZ6PogZw7Qbg3teuEXIIznoIeCbIxcOpAqgIsIyKEmrbBr1mLu7xFz tHLZrsG7szlA7Q1/DbPkCA8l45Xo2fNiNvOkrHUdcSlsS4oaM/QBSoj X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein This display controller is present on M-series chips and is used to drive the touchbar display. Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau Signed-off-by: Sasha Finkelstein --- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/adp/Kconfig | 14 + drivers/gpu/drm/adp/Makefile | 5 + drivers/gpu/drm/adp/adp_drv.c | 814 ++++++++++++++++++++++++++++++++++++++= ++++ 5 files changed, 836 insertions(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 5504721007cc190e7d768d42aa9633baa0115f5e..acd1111f1773ef044c306c62ad9= f850996259ef1 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -499,6 +499,8 @@ source "drivers/gpu/drm/mcde/Kconfig" =20 source "drivers/gpu/drm/tidss/Kconfig" =20 +source "drivers/gpu/drm/adp/Kconfig" + source "drivers/gpu/drm/xlnx/Kconfig" =20 source "drivers/gpu/drm/gud/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 463afad1b5ca6275e61223adc8ca036c3d4d6b03..acd8d8943ef2bf85c80db7c218c= 59a7ec2df56da 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -213,6 +213,7 @@ obj-y +=3D mxsfb/ obj-y +=3D tiny/ obj-$(CONFIG_DRM_PL111) +=3D pl111/ obj-$(CONFIG_DRM_TVE200) +=3D tve200/ +obj-$(CONFIG_DRM_ADP) +=3D adp/ obj-$(CONFIG_DRM_XEN) +=3D xen/ obj-$(CONFIG_DRM_VBOXVIDEO) +=3D vboxvideo/ obj-$(CONFIG_DRM_LIMA) +=3D lima/ diff --git a/drivers/gpu/drm/adp/Kconfig b/drivers/gpu/drm/adp/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..3c570aeb14700611edd7e273836= 7090ebb30c346 --- /dev/null +++ b/drivers/gpu/drm/adp/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-only OR MIT +config DRM_ADP + tristate "DRM Support for pre-DCP Apple display controllers" + depends on DRM && OF && ARM64 + depends on ARCH_APPLE || COMPILE_TEST + select DRM_KMS_HELPER + select DRM_KMS_DMA_HELPER + select DRM_GEM_DMA_HELPER + select VIDEOMODE_HELPERS + select DRM_MIPI_DSI + help + Chose this option if you have an Apple Arm laptop with a touchbar. + + If M is selected, this module will be called adpdrm. diff --git a/drivers/gpu/drm/adp/Makefile b/drivers/gpu/drm/adp/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..28a5d4b4a267f3e2abe9f0ea9e1= 1fae51ca18b88 --- /dev/null +++ b/drivers/gpu/drm/adp/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only OR MIT + +adpdrm-y :=3D adp_drv.o +obj-$(CONFIG_DRM_ADP) +=3D adpdrm.o +obj-$(CONFIG_DRM_ADP) +=3D panel-summit.o diff --git a/drivers/gpu/drm/adp/adp_drv.c b/drivers/gpu/drm/adp/adp_drv.c new file mode 100644 index 0000000000000000000000000000000000000000..36510194e18161ef6514885c764= b2e7085c587e5 --- /dev/null +++ b/drivers/gpu/drm/adp/adp_drv.c @@ -0,0 +1,814 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ADP_INT_STATUS 0x34 +#define ADP_INT_STATUS_INT_MASK 0x7 +#define ADP_INT_STATUS_VBLANK 0x1 +#define ADP_CTRL 0x100 +#define ADP_CTRL_VBLANK_ON 0x12 +#define ADP_CTRL_FIFO_ON 0x601 +#define ADP_SCREEN_SIZE 0x0c +#define ADP_SCREEN_HSIZE GENMASK(15, 0) +#define ADP_SCREEN_VSIZE GENMASK(31, 16) + +#define ADBE_FIFO 0x10c0 +#define ADBE_FIFO_SYNC 0xc0000000 + +#define ADBE_BLEND_BYPASS 0x2020 +#define ADBE_BLEND_EN1 0x2028 +#define ADBE_BLEND_EN2 0x2074 +#define ADBE_BLEND_EN3 0x202c +#define ADBE_BLEND_EN4 0x2034 +#define ADBE_MASK_BUF 0x2200 + +#define ADBE_SRC_START 0x4040 +#define ADBE_SRC_SIZE 0x4048 +#define ADBE_DST_START 0x4050 +#define ADBE_DST_SIZE 0x4054 +#define ADBE_STRIDE 0x4038 +#define ADBE_FB_BASE 0x4030 + +#define ADBE_LAYER_EN1 0x4020 +#define ADBE_LAYER_EN2 0x4068 +#define ADBE_LAYER_EN3 0x40b4 +#define ADBE_LAYER_EN4 0x40f4 +#define ADBE_SCALE_CTL 0x40ac +#define ADBE_SCALE_CTL_BYPASS 0x100000 + +#define ADBE_LAYER_CTL 0x1038 +#define ADBE_LAYER_CTL_ENABLE 0x10000 + +#define ADBE_PIX_FMT 0x402c +#define ADBE_PIX_FMT_XRGB32 0x53e4001 + +#define DSI_GEN_HDR 0x6c +#define DSI_GEN_PLD_DATA 0x70 + +#define DSI_CMD_PKT_STATUS 0x74 + +#define GEN_PLD_R_EMPTY BIT(4) +#define GEN_PLD_W_FULL BIT(3) +#define GEN_PLD_W_EMPTY BIT(2) +#define GEN_CMD_FULL BIT(1) +#define GEN_CMD_EMPTY BIT(0) +#define GEN_RD_CMD_BUSY BIT(6) +#define CMD_PKT_STATUS_TIMEOUT_US 20000 + +static int adp_open(struct inode *inode, struct file *filp) +{ + /* + * The modesetting driver does not check the non-desktop connector + * property and keeps the device open and locked. If the touchbar daemon + * opens the device first modesetting breaks the whole X session. + * Simply refuse to open the device for X11 server processes as + * workaround. + */ + if (current->comm[0] =3D=3D 'X') + return -EBUSY; + + return drm_open(inode, filp); +} + +static const struct file_operations adp_fops =3D { + .owner =3D THIS_MODULE, + .open =3D adp_open, + .release =3D drm_release, + .unlocked_ioctl =3D drm_ioctl, + .compat_ioctl =3D drm_compat_ioctl, + .poll =3D drm_poll, + .read =3D drm_read, + .llseek =3D noop_llseek, + .mmap =3D drm_gem_mmap, + .fop_flags =3D FOP_UNSIGNED_OFFSET, + DRM_GEM_DMA_UNMAPPED_AREA_FOPS +}; + +static int adp_drm_gem_dumb_create(struct drm_file *file_priv, + struct drm_device *drm, + struct drm_mode_create_dumb *args) +{ + args->height =3D ALIGN(args->height, 64); + args->size =3D args->pitch * args->height; + + return drm_gem_dma_dumb_create_internal(file_priv, drm, args); +} + +static const struct drm_driver adp_driver =3D { + .driver_features =3D DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, + .fops =3D &adp_fops, + DRM_GEM_DMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(adp_drm_gem_dumb_create), + .name =3D "adp", + .desc =3D "Apple Display Pipe DRM Driver", + .date =3D "20230412", + .major =3D 0, + .minor =3D 1, +}; + +struct adp_drv_private { + struct drm_device drm; + struct drm_crtc crtc; + struct drm_encoder encoder; + struct drm_connector connector; + struct mipi_dsi_host dsi; + void __iomem *be; + void __iomem *fe; + void __iomem *mipi; + u32 *mask_buf; + u64 mask_buf_size; + dma_addr_t mask_iova; + int be_irq; + int fe_irq; + spinlock_t irq_lock; + struct drm_pending_vblank_event *event; +}; + +struct adp_plane { + struct drm_plane base_plane; + u8 id; +}; + +#define to_adp(x) container_of(x, struct adp_drv_private, drm) +#define crtc_to_adp(x) container_of(x, struct adp_drv_private, crtc) +#define conn_to_adp(x) container_of(x, struct adp_drv_private, connector) +#define mipi_to_adp(x) container_of(x, struct adp_drv_private, dsi) + +static int adp_plane_atomic_check(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *new_plane_state; + struct drm_crtc_state *crtc_state; + + new_plane_state =3D drm_atomic_get_new_plane_state(state, plane); + + if (!new_plane_state->crtc) + return 0; + + crtc_state =3D drm_atomic_get_crtc_state(state, new_plane_state->crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + return drm_atomic_helper_check_plane_state(new_plane_state, + crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + true, true); +} + +static void adp_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp; + struct drm_rect src_rect; + struct drm_gem_dma_object *obj; + struct drm_framebuffer *fb; + struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); + u32 src_pos, src_size, dst_pos, dst_size; + + if (!plane || !new_state) + return; + + fb =3D new_state->fb; + if (!fb) + return; + adp =3D to_adp(plane->dev); + + drm_rect_fp_to_int(&src_rect, &new_state->src); + src_pos =3D src_rect.x1 << 16 | src_rect.y1; + dst_pos =3D new_state->dst.x1 << 16 | new_state->dst.y1; + src_size =3D drm_rect_width(&src_rect) << 16 | drm_rect_height(&src_rect); + dst_size =3D drm_rect_width(&new_state->dst) << 16 | + drm_rect_height(&new_state->dst); + writel(src_pos, adp->be + ADBE_SRC_START); + writel(src_size, adp->be + ADBE_SRC_SIZE); + writel(dst_pos, adp->be + ADBE_DST_START); + writel(dst_size, adp->be + ADBE_DST_SIZE); + writel(fb->pitches[0], adp->be + ADBE_STRIDE); + obj =3D drm_fb_dma_get_gem_obj(fb, 0); + if (obj) + writel(obj->dma_addr + fb->offsets[0], adp->be + ADBE_FB_BASE); + + writel(0x1, adp->be + ADBE_LAYER_EN1); + writel(0x1, adp->be + ADBE_LAYER_EN2); + writel(0x1, adp->be + ADBE_LAYER_EN3); + writel(0x1, adp->be + ADBE_LAYER_EN4); + writel(ADBE_SCALE_CTL_BYPASS, adp->be + ADBE_SCALE_CTL); + writel(ADBE_LAYER_CTL_ENABLE | 0x1, adp->be + ADBE_LAYER_CTL); + writel(ADBE_PIX_FMT_XRGB32, adp->be + ADBE_PIX_FMT); + +} + +static void adp_plane_atomic_disable(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D to_adp(plane->dev); + + writel(0x0, adp->be + ADBE_LAYER_EN1); + writel(0x0, adp->be + ADBE_LAYER_EN2); + writel(0x0, adp->be + ADBE_LAYER_EN3); + writel(0x0, adp->be + ADBE_LAYER_EN4); + writel(ADBE_LAYER_CTL_ENABLE, adp->be + ADBE_LAYER_CTL); +} + +static const struct drm_plane_helper_funcs adp_plane_helper_funcs =3D { + .atomic_check =3D adp_plane_atomic_check, + .atomic_update =3D adp_plane_atomic_update, + .atomic_disable =3D adp_plane_atomic_disable, + DRM_GEM_SHADOW_PLANE_HELPER_FUNCS +}; + +static const struct drm_plane_funcs adp_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + DRM_GEM_SHADOW_PLANE_FUNCS +}; + +static const u32 plane_formats[] =3D { + DRM_FORMAT_XRGB8888, +}; + +#define ALL_CRTCS 1 + +static struct adp_plane *adp_plane_new(struct adp_drv_private *adp, u8 id) +{ + struct drm_device *drm =3D &adp->drm; + struct adp_plane *plane; + enum drm_plane_type plane_type; + + plane_type =3D (id =3D=3D 0) ? DRM_PLANE_TYPE_PRIMARY : + DRM_PLANE_TYPE_OVERLAY; + + plane =3D drmm_universal_plane_alloc(drm, struct adp_plane, base_plane, + ALL_CRTCS, &adp_plane_funcs, + plane_formats, ARRAY_SIZE(plane_formats), + NULL, plane_type, "plane %d", id); + if (!plane) { + drm_err(drm, "failed to allocate plane"); + return ERR_PTR(-ENOMEM); + } + plane->id =3D id; + + drm_plane_helper_add(&plane->base_plane, &adp_plane_helper_funcs); + return plane; +} + +static void adp_enable_vblank(struct adp_drv_private *adp) +{ + u32 cur_ctrl; + + writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); + + cur_ctrl =3D readl(adp->fe + ADP_CTRL); + writel(cur_ctrl | ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); +} + +static int adp_crtc_enable_vblank(struct drm_crtc *crtc) +{ + struct drm_device *dev =3D crtc->dev; + struct adp_drv_private *adp =3D to_adp(dev); + + adp_enable_vblank(adp); + + return 0; +} + +static void adp_disable_vblank(struct adp_drv_private *adp) +{ + u32 cur_ctrl; + + cur_ctrl =3D readl(adp->fe + ADP_CTRL); + writel(cur_ctrl & ~ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); + writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); +} + +static void adp_crtc_disable_vblank(struct drm_crtc *crtc) +{ + struct drm_device *dev =3D crtc->dev; + struct adp_drv_private *adp =3D to_adp(dev); + + adp_disable_vblank(adp); +} + + +static void adp_crtc_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + + writel(0x1, adp->be + ADBE_BLEND_EN2); + writel(0x10, adp->be + ADBE_BLEND_EN1); + writel(0x1, adp->be + ADBE_BLEND_EN3); + writel(0x1, adp->be + ADBE_BLEND_BYPASS); + writel(0x1, adp->be + ADBE_BLEND_EN4); +} + +static void adp_crtc_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + struct drm_crtc_state *old_state =3D drm_atomic_get_old_crtc_state(state,= crtc); + + drm_atomic_helper_disable_planes_on_crtc(old_state, false); + + writel(0x0, adp->be + ADBE_BLEND_EN2); + writel(0x0, adp->be + ADBE_BLEND_EN1); + writel(0x0, adp->be + ADBE_BLEND_EN3); + writel(0x0, adp->be + ADBE_BLEND_BYPASS); + writel(0x0, adp->be + ADBE_BLEND_EN4); + drm_crtc_vblank_off(crtc); +} + +static void adp_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + u32 frame_num =3D 1; + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + struct drm_crtc_state *new_state =3D drm_atomic_get_new_crtc_state(state,= crtc); + u64 new_size =3D ALIGN(new_state->mode.hdisplay * + new_state->mode.vdisplay * 4, PAGE_SIZE); + + if (new_size !=3D adp->mask_buf_size) { + if (adp->mask_buf) + dma_free_coherent(crtc->dev->dev, adp->mask_buf_size, + adp->mask_buf, adp->mask_iova); + adp->mask_buf =3D NULL; + if (new_size !=3D 0) { + adp->mask_buf =3D dma_alloc_coherent(crtc->dev->dev, new_size, + &adp->mask_iova, GFP_KERNEL); + memset(adp->mask_buf, 0xFF, new_size); + writel(adp->mask_iova, adp->be + ADBE_MASK_BUF); + } + adp->mask_buf_size =3D new_size; + } + writel(ADBE_FIFO_SYNC | frame_num, adp->be + ADBE_FIFO); + //FIXME: use adbe flush interrupt + spin_lock_irq(&crtc->dev->event_lock); + if (crtc->state->event) { + drm_crtc_vblank_get(crtc); + adp->event =3D crtc->state->event; + } + crtc->state->event =3D NULL; + spin_unlock_irq(&crtc->dev->event_lock); +} + +static const struct drm_crtc_funcs adp_crtc_funcs =3D { + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .reset =3D drm_atomic_helper_crtc_reset, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, + .enable_vblank =3D adp_crtc_enable_vblank, + .disable_vblank =3D adp_crtc_disable_vblank, +}; + + +static const struct drm_crtc_helper_funcs adp_crtc_helper_funcs =3D { + .atomic_enable =3D adp_crtc_atomic_enable, + .atomic_disable =3D adp_crtc_atomic_disable, + .atomic_flush =3D adp_crtc_atomic_flush, +}; + +static int adp_setup_crtc(struct adp_drv_private *adp) +{ + struct drm_device *drm =3D &adp->drm; + struct adp_plane *primary; + int ret; + + primary =3D adp_plane_new(adp, 0); + if (IS_ERR(primary)) + return PTR_ERR(primary); + + ret =3D drm_crtc_init_with_planes(drm, &adp->crtc, &primary->base_plane, + NULL, &adp_crtc_funcs, NULL); + if (ret) + return ret; + + drm_crtc_helper_add(&adp->crtc, &adp_crtc_helper_funcs); + return 0; +} + +static int adp_get_modes(struct drm_connector *connector) +{ + struct adp_drv_private *adp =3D conn_to_adp(connector); + struct drm_display_mode *mode; + u32 size; + + size =3D readl(adp->fe + ADP_SCREEN_SIZE); + mode =3D drm_mode_create(connector->dev); + + mode->vdisplay =3D FIELD_GET(ADP_SCREEN_VSIZE, size); + mode->hdisplay =3D FIELD_GET(ADP_SCREEN_HSIZE, size); + mode->hsync_start =3D mode->hdisplay + 8; + mode->hsync_end =3D mode->hsync_start + 80; + mode->htotal =3D mode->hsync_end + 40; + mode->vsync_start =3D mode->vdisplay + 1; + mode->vsync_end =3D mode->vsync_start + 15; + mode->vtotal =3D mode->vsync_end + 6; + mode->clock =3D (mode->vtotal * mode->htotal * 60) / 1000; + mode->type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; + mode->flags =3D DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; + drm_mode_set_name(mode); + drm_mode_probed_add(connector, mode); + return 1; +} + +static int adp_detect_ctx(struct drm_connector *connector, + struct drm_modeset_acquire_ctx *ctx, + bool force) +{ + connector->display_info.non_desktop =3D true; + drm_object_property_set_value(&connector->base, + connector->dev->mode_config.non_desktop_property, + connector->display_info.non_desktop); + return connector_status_connected; +} + +static const struct drm_connector_funcs adp_connector_funcs =3D { + .fill_modes =3D drm_helper_probe_single_connector_modes, + .destroy =3D drm_connector_cleanup, + .reset =3D drm_atomic_helper_connector_reset, + .atomic_duplicate_state =3D drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_connector_destroy_state, +}; + +static const struct drm_connector_helper_funcs adp_connector_helper_funcs = =3D { + .get_modes =3D adp_get_modes, + .detect_ctx =3D adp_detect_ctx, +}; + +static const struct drm_mode_config_funcs adp_mode_config_funcs =3D { + .fb_create =3D drm_gem_fb_create_with_dirty, + .atomic_check =3D drm_atomic_helper_check, + .atomic_commit =3D drm_atomic_helper_commit, +}; + +static int adp_setup_mode_config(struct adp_drv_private *adp) +{ + struct drm_device *drm =3D &adp->drm; + int ret; + u32 size; + + ret =3D drmm_mode_config_init(drm); + if (ret) + return ret; + + /* + * Query screen size restrict the frame buffer size to the screen size + * aligned to the next multiple of 64. This is not necessary but can be + * used as simple check for non-desktop devices. + * Xorg's modesetting driver does not care about the connector + * "non-desktop" property. The max frame buffer width or height can be + * easily checked and a device can be reject if the max width/height is + * smaller than 120 for example. + * Any touchbar daemon is not limited by this small framebuffer size. + */ + size =3D readl(adp->fe + ADP_SCREEN_SIZE); + + drm->mode_config.min_width =3D 32; + drm->mode_config.min_height =3D 32; + drm->mode_config.max_width =3D ALIGN(FIELD_GET(ADP_SCREEN_HSIZE, size), 6= 4); + drm->mode_config.max_height =3D ALIGN(FIELD_GET(ADP_SCREEN_VSIZE, size), = 64); + drm->mode_config.preferred_depth =3D 24; + drm->mode_config.prefer_shadow =3D 0; + drm->mode_config.funcs =3D &adp_mode_config_funcs; + + ret =3D adp_setup_crtc(adp); + if (ret) { + drm_err(drm, "failed to create crtc"); + return ret; + } + + adp->encoder.possible_crtcs =3D ALL_CRTCS; + ret =3D drm_simple_encoder_init(drm, &adp->encoder, DRM_MODE_ENCODER_DSI); + if (ret) { + drm_err(drm, "failed to init encoder"); + return ret; + } + drm_connector_helper_add(&adp->connector, + &adp_connector_helper_funcs); + ret =3D drm_connector_init(drm, &adp->connector, &adp_connector_funcs, + DRM_MODE_CONNECTOR_DSI); + if (ret) + return ret; + + drm_connector_attach_encoder(&adp->connector, &adp->encoder); + + ret =3D drm_vblank_init(drm, drm->mode_config.num_crtc); + if (ret < 0) { + drm_err(drm, "failed to initialize vblank"); + return ret; + } + + drm_mode_config_reset(drm); + + return 0; +} + +static int adp_parse_of(struct platform_device *pdev, struct adp_drv_priva= te *adp) +{ + adp->be =3D devm_platform_ioremap_resource_byname(pdev, "be"); + if (IS_ERR(adp->be)) { + dev_err(&pdev->dev, "failed to map display backend mmio"); + return PTR_ERR(adp->be); + } + + adp->fe =3D devm_platform_ioremap_resource_byname(pdev, "fe"); + if (IS_ERR(adp->fe)) { + dev_err(&pdev->dev, "failed to map display pipe mmio"); + return PTR_ERR(adp->fe); + } + + adp->mipi =3D devm_platform_ioremap_resource_byname(pdev, "mipi"); + if (IS_ERR(adp->mipi)) { + dev_err(&pdev->dev, "failed to map mipi mmio"); + return PTR_ERR(adp->mipi); + } + + adp->be_irq =3D platform_get_irq_byname(pdev, "be"); + if (adp->be_irq < 0) { + dev_err(&pdev->dev, "failed to find be irq"); + return adp->be_irq; + } + + adp->fe_irq =3D platform_get_irq_byname(pdev, "fe"); + if (adp->fe_irq < 0) { + dev_err(&pdev->dev, "failed to find fe irq"); + return adp->fe_irq; + } + return 0; +} + + +static int adp_dsi_gen_pkt_hdr_write(struct adp_drv_private *adp, u32 hdr_= val) +{ + int ret; + u32 val, mask; + + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_CMD_FULL), 1000, + CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->drm.dev, "failed to get available command FIFO\n"); + return ret; + } + + writel(hdr_val, adp->mipi + DSI_GEN_HDR); + + mask =3D GEN_CMD_EMPTY | GEN_PLD_W_EMPTY; + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, (val & mask) =3D=3D mask, + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->drm.dev, "failed to write command FIFO\n"); + return ret; + } + + return 0; +} + +static int adp_dsi_write(struct adp_drv_private *adp, + const struct mipi_dsi_packet *packet) +{ + const u8 *tx_buf =3D packet->payload; + int len =3D packet->payload_length, pld_data_bytes =3D sizeof(u32), ret; + __le32 word; + u32 val; + + while (len) { + if (len < pld_data_bytes) { + word =3D 0; + memcpy(&word, tx_buf, len); + writel(le32_to_cpu(word), adp->mipi + DSI_GEN_PLD_DATA); + len =3D 0; + } else { + memcpy(&word, tx_buf, pld_data_bytes); + writel(le32_to_cpu(word), adp->mipi + DSI_GEN_PLD_DATA); + tx_buf +=3D pld_data_bytes; + len -=3D pld_data_bytes; + } + + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_PLD_W_FULL), 1000, + CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->drm.dev, + "failed to get available write payload FIFO\n"); + return ret; + } + } + + word =3D 0; + memcpy(&word, packet->header, sizeof(packet->header)); + return adp_dsi_gen_pkt_hdr_write(adp, le32_to_cpu(word)); +} + +static int adp_dsi_read(struct adp_drv_private *adp, + const struct mipi_dsi_msg *msg) +{ + int i, j, ret, len =3D msg->rx_len; + u8 *buf =3D msg->rx_buf; + u32 val; + + /* Wait end of the read operation */ + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_RD_CMD_BUSY), + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->drm.dev, "Timeout during read operation\n"); + return ret; + } + + for (i =3D 0; i < len; i +=3D 4) { + /* Read fifo must not be empty before all bytes are read */ + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_PLD_R_EMPTY), + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->drm.dev, "Read payload FIFO is empty\n"); + return ret; + } + + val =3D readl(adp->mipi + DSI_GEN_PLD_DATA); + for (j =3D 0; j < 4 && j + i < len; j++) + buf[i + j] =3D val >> (8 * j); + } + + return ret; +} + +static ssize_t adp_dsi_host_transfer(struct mipi_dsi_host *host, + const struct mipi_dsi_msg *msg) +{ + struct adp_drv_private *adp =3D mipi_to_adp(host); + struct mipi_dsi_packet packet; + int ret, nb_bytes; + + ret =3D mipi_dsi_create_packet(&packet, msg); + if (ret) { + dev_err(adp->drm.dev, "failed to create packet: %d\n", ret); + return ret; + } + + ret =3D adp_dsi_write(adp, &packet); + if (ret) + return ret; + + if (msg->rx_buf && msg->rx_len) { + ret =3D adp_dsi_read(adp, msg); + if (ret) + return ret; + nb_bytes =3D msg->rx_len; + } else { + nb_bytes =3D packet.size; + } + + return nb_bytes; +} + +static int adp_dsi_host_attach(struct mipi_dsi_host *host, + struct mipi_dsi_device *dev) +{ + return 0; +} + +static int adp_dsi_host_detach(struct mipi_dsi_host *host, + struct mipi_dsi_device *dev) +{ + return 0; +} + +static const struct mipi_dsi_host_ops adp_dsi_host_ops =3D { + .transfer =3D adp_dsi_host_transfer, + .attach =3D adp_dsi_host_attach, + .detach =3D adp_dsi_host_detach, +}; + +static irqreturn_t adp_fe_irq(int irq, void *arg) +{ + struct adp_drv_private *adp =3D (struct adp_drv_private *)arg; + u32 int_status; + u32 int_ctl; + + spin_lock(&adp->irq_lock); + + int_status =3D readl(adp->fe + ADP_INT_STATUS); + if (int_status & ADP_INT_STATUS_VBLANK) { + drm_crtc_handle_vblank(&adp->crtc); + spin_lock(&adp->crtc.dev->event_lock); + if (adp->event) { + int_ctl =3D readl(adp->fe + ADP_CTRL); + if ((int_ctl & 0xF00) =3D=3D 0x600) { + drm_crtc_send_vblank_event(&adp->crtc, adp->event); + adp->event =3D NULL; + drm_crtc_vblank_put(&adp->crtc); + } + } + spin_unlock(&adp->crtc.dev->event_lock); + } + + writel(int_status, adp->fe + ADP_INT_STATUS); + + spin_unlock(&adp->irq_lock); + + return IRQ_HANDLED; +} + +static int adp_probe(struct platform_device *pdev) +{ + struct adp_drv_private *adp; + int err; + + adp =3D devm_drm_dev_alloc(&pdev->dev, &adp_driver, struct adp_drv_privat= e, drm); + if (IS_ERR(adp)) + return PTR_ERR(adp); + + spin_lock_init(&adp->irq_lock); + + dev_set_drvdata(&pdev->dev, &adp->drm); + + err =3D adp_parse_of(pdev, adp); + if (err < 0) + return err; + + adp->dsi.dev =3D &pdev->dev; + adp->dsi.ops =3D &adp_dsi_host_ops; + err =3D mipi_dsi_host_register(&adp->dsi); + if (err < 0) + return err; + + adp_disable_vblank(adp); + writel(ADP_CTRL_FIFO_ON | ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); + + err =3D adp_setup_mode_config(adp); + if (err < 0) + return err; + + err =3D devm_request_irq(&pdev->dev, adp->fe_irq, adp_fe_irq, 0, + "adp-fe", adp); + if (err) + return err; + + err =3D drm_dev_register(&adp->drm, 0); + if (err) + return err; + return 0; +} + +static void adp_remove(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct drm_device *drm =3D dev_get_drvdata(dev); + struct adp_drv_private *adp =3D to_adp(drm); + + adp_disable_vblank(adp); + mipi_dsi_host_unregister(&adp->dsi); + drm_dev_unregister(drm); + dev_set_drvdata(dev, NULL); + drm_atomic_helper_shutdown(drm); +} + +static const struct of_device_id adp_of_match[] =3D { + { .compatible =3D "apple,h7-display-pipe", }, + { }, +}; +MODULE_DEVICE_TABLE(of, adp_of_match); + +static struct platform_driver adp_platform_driver =3D { + .driver =3D { + .name =3D "adp", + .of_match_table =3D adp_of_match, + }, + .probe =3D adp_probe, + .remove =3D adp_remove, +}; + +module_platform_driver(adp_platform_driver); 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Sun, 24 Nov 2024 22:29:41 +0000 (UTC) From: Sasha Finkelstein via B4 Relay Date: Sun, 24 Nov 2024 23:29:26 +0100 Subject: [PATCH 3/5] gpu: drm: adp: Add a backlight driver for the Summit LCD Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241124-adpdrm-v1-3-3191d8e6e49a@gmail.com> References: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> In-Reply-To: <20241124-adpdrm-v1-0-3191d8e6e49a@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sasha Finkelstein , Nick Chan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732487379; l=3305; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=sbnezbuFoF7i74RnvJBF1A8kSZMpFbcSuRY+EtYx+3c=; b=KmisXylwekMJhnG7GXCtk2uDcahe4QtLnC0hSFYM513rcUB/5aCzcquaCqlsygHwAwnzaTmyY f9xDvEydidsBO5WmK4DLmXuK0gRPNzgfqDNWb/xb/M94MTHeYrSgoE8 X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein This is the display panel used for the touchbar on laptops that have it. Co-developed-by: Nick Chan Signed-off-by: Nick Chan Signed-off-by: Sasha Finkelstein --- drivers/gpu/drm/adp/panel-summit.c | 108 +++++++++++++++++++++++++++++++++= ++++ 1 file changed, 108 insertions(+) diff --git a/drivers/gpu/drm/adp/panel-summit.c b/drivers/gpu/drm/adp/panel= -summit.c new file mode 100644 index 0000000000000000000000000000000000000000..2dcbddd925ce3863742aa601643= 69ba9db0bbfff --- /dev/null +++ b/drivers/gpu/drm/adp/panel-summit.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include