From nobody Sun Nov 24 09:52:21 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D18CA188703; Sat, 23 Nov 2024 07:01:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732345297; cv=none; b=gKpSc0Ep558iNLse5EydvZp8utsn85Aghjtz6VUU0xfnC8wwg4GqO2Zyo7zL9zpOvgr6iODaGkaQKMYRCIClZcu3n1pKlRe9aS6c8ymqaBwgEZgtc0p9nwZiL6MT3c0pEnsEzoC7xw0zDtCA043YQNaraozoNSPDeAMw05VeHiE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732345297; c=relaxed/simple; bh=bFvtANVq4M+PbLW5fVSl1IQBttbUhT3TGl28se1XnmQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QCyv5oID7IYA0KemXt6vlJrKGNZZ67EorjRGjbE41PgxphWrWRXftIr61LNGhbJPPakoDFMoqvor7SaDB1jowxKwH9A3D/A9k6bx0M7pNRWCox7ukPkAFVnJwKzUauVffRsSCdO2Tp8IHQfRqFcTTkyAKeTw57QkpKXcNXNiZ9g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iSbLIKiE; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iSbLIKiE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1732345295; x=1763881295; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bFvtANVq4M+PbLW5fVSl1IQBttbUhT3TGl28se1XnmQ=; b=iSbLIKiEdTw/t0klTcGxb9L0xMrgI09qsUoiRo8jzLg8efsJAMK/mFJa eXuvMPUgYRxxag5K4wmPjsB8pzsE5a9dv5qtOKqp3AAdFCSYU2EomIAYk GjMWi53kKpeZKBVA3Ci9fGKm0h7uJ8rLw6s2a1ulxJV6DdC+40+yPyYPu fSfCKZdjGsG2x0rRlgR9IsbEo8SElt4FjbqRAF753qXx0Fqj95jDHeHiB JIJ0DMBPB8LQDLCAdYxDznKZ9a3zgtDbRagJKgAeBiuF6kOpL9Ur9NYqy Wn9pPwJtK3GYme2Xy65qRvFTT1PwuIM06nh4+9PJIcsgtD7ZKO9h1HDx/ A==; X-CSE-ConnectionGUID: XKS9WAM5RlyC62yx2sWAiA== X-CSE-MsgGUID: ws3yTFySSDS5Lp1IfVc5Hw== X-IronPort-AV: E=McAfee;i="6700,10204,11264"; a="32435544" X-IronPort-AV: E=Sophos;i="6.12,178,1728975600"; d="scan'208";a="32435544" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2024 23:01:29 -0800 X-CSE-ConnectionGUID: 4uDe8fUhSDGkT2v19xKzeA== X-CSE-MsgGUID: bcrQTk/5RTy+gMcZzkadVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,178,1728975600"; d="scan'208";a="91573568" Received: from unknown (HELO JF5300-B11A338T.jf.intel.com) ([10.242.51.115]) by orviesa008.jf.intel.com with ESMTP; 22 Nov 2024 23:01:29 -0800 From: Kanchana P Sridhar To: linux-kernel@vger.kernel.org, linux-mm@kvack.org, hannes@cmpxchg.org, yosryahmed@google.com, nphamcs@gmail.com, chengming.zhou@linux.dev, usamaarif642@gmail.com, ryan.roberts@arm.com, ying.huang@intel.com, 21cnbao@gmail.com, akpm@linux-foundation.org, linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, clabbe@baylibre.com, ardb@kernel.org, ebiggers@google.com, surenb@google.com, kristen.c.accardi@intel.com Cc: wajdi.k.feghali@intel.com, vinodh.gopal@intel.com, kanchana.p.sridhar@intel.com Subject: [PATCH v4 08/10] crypto: iaa - Distribute compress jobs from all cores to all IAAs on a package. Date: Fri, 22 Nov 2024 23:01:25 -0800 Message-Id: <20241123070127.332773-9-kanchana.p.sridhar@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20241123070127.332773-1-kanchana.p.sridhar@intel.com> References: <20241123070127.332773-1-kanchana.p.sridhar@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This change enables processes running on any logical core on a package to use all the IAA devices enabled on that package for compress jobs. In other words, compressions originating from any process in a package will be distributed in round-robin manner to the available IAA devices on the same package. The main premise behind this change is to make sure that no compress engines on any IAA device are un-utilized/under-utilized/over-utilized. In other words, the compress engines on all IAA devices are considered a global resource for that package, thus maximizing compression throughput. This allows the use of all IAA devices present in a given package for (batched) compressions originating from zswap/zram, from all cores on this package. A new per-cpu "global_wq_table" implements this in the iaa_crypto driver. We can think of the global WQ per IAA as a WQ to which all cores on that package can submit compress jobs. To avail of this feature, the user must configure 2 WQs per IAA in order to enable distribution of compress jobs to multiple IAA devices. Each IAA will have 2 WQs: wq.0 (local WQ): Used for decompress jobs from cores mapped by the cpu_to_iaa() "even balancing of logical cores to IAA devices" algorithm. wq.1 (global WQ): Used for compress jobs from *all* logical cores on that package. The iaa_crypto driver will place all global WQs from all same-package IAA devices in the global_wq_table per cpu on that package. When the driver receives a compress job, it will lookup the "next" global WQ in the cpu's global_wq_table to submit the descriptor. The starting wq in the global_wq_table for each cpu is the global wq associated with the IAA nearest to it, so that we stagger the starting global wq for each process. This results in very uniform usage of all IAAs for compress jobs. Two new driver module parameters are added for this feature: g_wqs_per_iaa (default 0): /sys/bus/dsa/drivers/crypto/g_wqs_per_iaa This represents the number of global WQs that can be configured per IAA device. The recommended setting is 1 to enable the use of this feature once the user configures 2 WQs per IAA using higher level scripts as described in Documentation/driver-api/crypto/iaa/iaa-crypto.rst. g_consec_descs_per_gwq (default 1): /sys/bus/dsa/drivers/crypto/g_consec_descs_per_gwq This represents the number of consecutive compress jobs that will be submitted to the same global WQ (i.e. to the same IAA device) from a given core, before moving to the next global WQ. The default is 1, which is also the recommended setting to avail of this feature. The decompress jobs from any core will be sent to the "local" IAA, namely the one that the driver assigns with the cpu_to_iaa() mapping algorithm that evenly balances the assignment of logical cores to IAA devices on a package. On a 2-package Sapphire Rapids server where each package has 56 cores and 4 IAA devices, this is how the compress/decompress jobs will be mapped when the user configures 2 WQs per IAA device (which implies wq.1 will be added to the global WQ table for each logical core on that package): package(s): 2 package0 CPU(s): 0-55,112-167 package1 CPU(s): 56-111,168-223 Compress jobs: -------------- package 0: iaa_crypto will send compress jobs from all cpus (0-55,112-167) to all IAA devices on the package (iax1/iax3/iax5/iax7) in round-robin manner: iaa: iax1 iax3 iax5 iax7 package 1: iaa_crypto will send compress jobs from all cpus (56-111,168-223) to all IAA devices on the package (iax9/iax11/iax13/iax15) in round-robin manner: iaa: iax9 iax11 iax13 iax15 Decompress jobs: ---------------- package 0: cpu 0-13,112-125 14-27,126-139 28-41,140-153 42-55,154-167 iaa: iax1 iax3 iax5 iax7 package 1: cpu 56-69,168-181 70-83,182-195 84-97,196-209 98-111,210-223 iaa: iax9 iax11 iax13 iax15 Signed-off-by: Kanchana P Sridhar --- drivers/crypto/intel/iaa/iaa_crypto.h | 1 + drivers/crypto/intel/iaa/iaa_crypto_main.c | 385 ++++++++++++++++++++- 2 files changed, 378 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/intel/iaa/iaa_crypto.h b/drivers/crypto/intel/i= aa/iaa_crypto.h index ca317c5aaf27..ca7326d6e9bf 100644 --- a/drivers/crypto/intel/iaa/iaa_crypto.h +++ b/drivers/crypto/intel/iaa/iaa_crypto.h @@ -82,6 +82,7 @@ struct iaa_device { struct list_head wqs; =20 struct wq_table_entry *iaa_local_wqs; + struct wq_table_entry *iaa_global_wqs; =20 atomic64_t comp_calls; atomic64_t comp_bytes; diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/in= tel/iaa/iaa_crypto_main.c index 28f2f5617bf0..1cbf92d1b3e5 100644 --- a/drivers/crypto/intel/iaa/iaa_crypto_main.c +++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c @@ -42,6 +42,18 @@ static struct crypto_comp *deflate_generic_tfm; /* Per-cpu lookup table for balanced wqs */ static struct wq_table_entry __percpu *wq_table =3D NULL; =20 +static struct wq_table_entry **pkg_global_wq_tables =3D NULL; + +/* Per-cpu lookup table for global wqs shared by all cpus. */ +static struct wq_table_entry __percpu *global_wq_table =3D NULL; + +/* + * Per-cpu counter of consecutive descriptors allocated to + * the same wq in the global_wq_table, so that we know + * when to switch to the next wq in the global_wq_table. + */ +static int __percpu *num_consec_descs_per_wq =3D NULL; + /* Verify results of IAA compress or not */ static bool iaa_verify_compress =3D false; =20 @@ -79,6 +91,16 @@ static bool async_mode =3D true; /* Use interrupts */ static bool use_irq; =20 +/* Number of global wqs per iaa*/ +static int g_wqs_per_iaa =3D 0; + +/* + * Number of consecutive descriptors to allocate from a + * given global wq before switching to the next wq in + * the global_wq_table. + */ +static int g_consec_descs_per_gwq =3D 1; + static struct iaa_compression_mode *iaa_compression_modes[IAA_COMP_MODES_M= AX]; =20 LIST_HEAD(iaa_devices); @@ -180,6 +202,60 @@ static ssize_t sync_mode_store(struct device_driver *d= river, } static DRIVER_ATTR_RW(sync_mode); =20 +static ssize_t g_wqs_per_iaa_show(struct device_driver *driver, char *buf) +{ + return sprintf(buf, "%d\n", g_wqs_per_iaa); +} + +static ssize_t g_wqs_per_iaa_store(struct device_driver *driver, + const char *buf, size_t count) +{ + int ret =3D -EBUSY; + + mutex_lock(&iaa_devices_lock); + + if (iaa_crypto_enabled) + goto out; + + ret =3D kstrtoint(buf, 10, &g_wqs_per_iaa); + if (ret) + goto out; + + ret =3D count; +out: + mutex_unlock(&iaa_devices_lock); + + return ret; +} +static DRIVER_ATTR_RW(g_wqs_per_iaa); + +static ssize_t g_consec_descs_per_gwq_show(struct device_driver *driver, c= har *buf) +{ + return sprintf(buf, "%d\n", g_consec_descs_per_gwq); +} + +static ssize_t g_consec_descs_per_gwq_store(struct device_driver *driver, + const char *buf, size_t count) +{ + int ret =3D -EBUSY; + + mutex_lock(&iaa_devices_lock); + + if (iaa_crypto_enabled) + goto out; + + ret =3D kstrtoint(buf, 10, &g_consec_descs_per_gwq); + if (ret) + goto out; + + ret =3D count; +out: + mutex_unlock(&iaa_devices_lock); + + return ret; +} +static DRIVER_ATTR_RW(g_consec_descs_per_gwq); + /**************************** * Driver compression modes. ****************************/ @@ -465,7 +541,7 @@ static void remove_device_compression_modes(struct iaa_= device *iaa_device) ***********************************************************/ static struct iaa_device *iaa_device_alloc(struct idxd_device *idxd) { - struct wq_table_entry *local; + struct wq_table_entry *local, *global; struct iaa_device *iaa_device; =20 iaa_device =3D kzalloc(sizeof(*iaa_device), GFP_KERNEL); @@ -488,6 +564,20 @@ static struct iaa_device *iaa_device_alloc(struct idxd= _device *idxd) local->max_wqs =3D iaa_device->idxd->max_wqs; local->n_wqs =3D 0; =20 + /* IAA device's global wqs. */ + iaa_device->iaa_global_wqs =3D kzalloc(sizeof(struct wq_table_entry), GFP= _KERNEL); + if (!iaa_device->iaa_global_wqs) + goto err; + + global =3D iaa_device->iaa_global_wqs; + + global->wqs =3D kzalloc(iaa_device->idxd->max_wqs * sizeof(struct wq *), = GFP_KERNEL); + if (!global->wqs) + goto err; + + global->max_wqs =3D iaa_device->idxd->max_wqs; + global->n_wqs =3D 0; + INIT_LIST_HEAD(&iaa_device->wqs); =20 return iaa_device; @@ -499,6 +589,8 @@ static struct iaa_device *iaa_device_alloc(struct idxd_= device *idxd) kfree(iaa_device->iaa_local_wqs->wqs); kfree(iaa_device->iaa_local_wqs); } + if (iaa_device->iaa_global_wqs) + kfree(iaa_device->iaa_global_wqs); kfree(iaa_device); } =20 @@ -616,6 +708,12 @@ static void free_iaa_device(struct iaa_device *iaa_dev= ice) kfree(iaa_device->iaa_local_wqs); } =20 + if (iaa_device->iaa_global_wqs) { + if (iaa_device->iaa_global_wqs->wqs) + kfree(iaa_device->iaa_global_wqs->wqs); + kfree(iaa_device->iaa_global_wqs); + } + kfree(iaa_device); } =20 @@ -817,6 +915,58 @@ static inline int cpu_to_iaa(int cpu) return (nr_iaa - 1); } =20 +static void free_global_wq_table(void) +{ + if (global_wq_table) { + free_percpu(global_wq_table); + global_wq_table =3D NULL; + } + + if (num_consec_descs_per_wq) { + free_percpu(num_consec_descs_per_wq); + num_consec_descs_per_wq =3D NULL; + } + + pr_debug("freed global wq table\n"); +} + +static int pkg_global_wq_tables_alloc(void) +{ + int i, j; + + pkg_global_wq_tables =3D kzalloc(nr_packages * sizeof(*pkg_global_wq_tabl= es), GFP_KERNEL); + if (!pkg_global_wq_tables) + return -ENOMEM; + + for (i =3D 0; i < nr_packages; ++i) { + pkg_global_wq_tables[i] =3D kzalloc(sizeof(struct wq_table_entry), GFP_K= ERNEL); + + if (!pkg_global_wq_tables[i]) { + for (j =3D 0; j < i; ++j) + kfree(pkg_global_wq_tables[j]); + kfree(pkg_global_wq_tables); + pkg_global_wq_tables =3D NULL; + return -ENOMEM; + } + pkg_global_wq_tables[i]->wqs =3D NULL; + } + + return 0; +} + +static void pkg_global_wq_tables_dealloc(void) +{ + int i; + + for (i =3D 0; i < nr_packages; ++i) { + if (pkg_global_wq_tables[i]->wqs) + kfree(pkg_global_wq_tables[i]->wqs); + kfree(pkg_global_wq_tables[i]); + } + kfree(pkg_global_wq_tables); + pkg_global_wq_tables =3D NULL; +} + static int alloc_wq_table(int max_wqs) { struct wq_table_entry *entry; @@ -835,6 +985,35 @@ static int alloc_wq_table(int max_wqs) entry->cur_wq =3D 0; } =20 + global_wq_table =3D alloc_percpu(struct wq_table_entry); + if (!global_wq_table) + return 0; + + for (cpu =3D 0; cpu < nr_cpus; cpu++) { + entry =3D per_cpu_ptr(global_wq_table, cpu); + + entry->wqs =3D NULL; + entry->max_wqs =3D max_wqs; + entry->n_wqs =3D 0; + entry->cur_wq =3D 0; + } + + num_consec_descs_per_wq =3D alloc_percpu(int); + if (!num_consec_descs_per_wq) { + free_global_wq_table(); + return 0; + } + + for (cpu =3D 0; cpu < nr_cpus; cpu++) { + int *num_consec_descs =3D per_cpu_ptr(num_consec_descs_per_wq, cpu); + *num_consec_descs =3D 0; + } + + if (pkg_global_wq_tables_alloc()) { + free_global_wq_table(); + return 0; + } + pr_debug("initialized wq table\n"); =20 return 0; @@ -895,13 +1074,120 @@ static int wq_table_add_wqs(int iaa, int cpu) return ret; } =20 +static void pkg_global_wq_tables_reinit(void) +{ + int i, cur_iaa =3D 0, pkg =3D 0, nr_pkg_wqs =3D 0; + struct iaa_device *iaa_device; + struct wq_table_entry *global; + + if (!pkg_global_wq_tables) + return; + + /* Reallocate per-package wqs. */ + list_for_each_entry(iaa_device, &iaa_devices, list) { + global =3D iaa_device->iaa_global_wqs; + nr_pkg_wqs +=3D global->n_wqs; + + if (++cur_iaa =3D=3D nr_iaa_per_package) { + nr_pkg_wqs =3D nr_pkg_wqs ? max_t(int, iaa_device->idxd->max_wqs, nr_pk= g_wqs) : 0; + + if (pkg_global_wq_tables[pkg]->wqs) { + kfree(pkg_global_wq_tables[pkg]->wqs); + pkg_global_wq_tables[pkg]->wqs =3D NULL; + } + + if (nr_pkg_wqs) + pkg_global_wq_tables[pkg]->wqs =3D kzalloc(nr_pkg_wqs * + sizeof(struct wq *), + GFP_KERNEL); + + pkg_global_wq_tables[pkg]->n_wqs =3D 0; + pkg_global_wq_tables[pkg]->cur_wq =3D 0; + pkg_global_wq_tables[pkg]->max_wqs =3D nr_pkg_wqs; + + if (++pkg =3D=3D nr_packages) + break; + cur_iaa =3D 0; + nr_pkg_wqs =3D 0; + } + } + + pkg =3D 0; + cur_iaa =3D 0; + + /* Re-initialize per-package wqs. */ + list_for_each_entry(iaa_device, &iaa_devices, list) { + global =3D iaa_device->iaa_global_wqs; + + if (pkg_global_wq_tables[pkg]->wqs) + for (i =3D 0; i < global->n_wqs; ++i) + pkg_global_wq_tables[pkg]->wqs[pkg_global_wq_tables[pkg]->n_wqs++] =3D= global->wqs[i]; + + pr_debug("pkg_global_wq_tables[%d] has %d wqs", pkg, pkg_global_wq_table= s[pkg]->n_wqs); + + if (++cur_iaa =3D=3D nr_iaa_per_package) { + if (++pkg =3D=3D nr_packages) + break; + cur_iaa =3D 0; + } + } +} + +static void global_wq_table_add(int cpu, struct wq_table_entry *pkg_global= _wq_table) +{ + struct wq_table_entry *entry =3D per_cpu_ptr(global_wq_table, cpu); + + /* This could be NULL. */ + entry->wqs =3D pkg_global_wq_table->wqs; + entry->max_wqs =3D pkg_global_wq_table->max_wqs; + entry->n_wqs =3D pkg_global_wq_table->n_wqs; + entry->cur_wq =3D 0; + + if (entry->wqs) + pr_debug("%s: cpu %d: added %d iaa global wqs up to wq %d.%d\n", __func_= _, + cpu, entry->n_wqs, + entry->wqs[entry->n_wqs - 1]->idxd->id, + entry->wqs[entry->n_wqs - 1]->id); +} + +static void global_wq_table_set_start_wq(int cpu) +{ + struct wq_table_entry *entry =3D per_cpu_ptr(global_wq_table, cpu); + int start_wq =3D g_wqs_per_iaa * (cpu_to_iaa(cpu) % nr_iaa_per_package); + + if ((start_wq >=3D 0) && (start_wq < entry->n_wqs)) + entry->cur_wq =3D start_wq; +} + +static void global_wq_table_add_wqs(void) +{ + int cpu; + + if (!pkg_global_wq_tables) + return; + + for (cpu =3D 0; cpu < nr_cpus; cpu +=3D nr_cpus_per_package) { + /* cpu's on the same package get the same global_wq_table. */ + int package_id =3D topology_logical_package_id(cpu); + int pkg_cpu; + + for (pkg_cpu =3D cpu; pkg_cpu < cpu + nr_cpus_per_package; ++pkg_cpu) { + if (pkg_global_wq_tables[package_id]->n_wqs > 0) { + global_wq_table_add(pkg_cpu, pkg_global_wq_tables[package_id]); + global_wq_table_set_start_wq(pkg_cpu); + } + } + } +} + static int map_iaa_device_wqs(struct iaa_device *iaa_device) { - struct wq_table_entry *local; + struct wq_table_entry *local, *global; int ret =3D 0, n_wqs_added =3D 0; struct iaa_wq *iaa_wq; =20 local =3D iaa_device->iaa_local_wqs; + global =3D iaa_device->iaa_global_wqs; =20 list_for_each_entry(iaa_wq, &iaa_device->wqs, list) { if (iaa_wq->mapped && ++n_wqs_added) @@ -909,11 +1195,18 @@ static int map_iaa_device_wqs(struct iaa_device *iaa= _device) =20 pr_debug("iaa_device %px: processing wq %d.%d\n", iaa_device, iaa_device= ->idxd->id, iaa_wq->wq->id); =20 - if (WARN_ON(local->n_wqs =3D=3D local->max_wqs)) - break; + if ((!n_wqs_added || ((n_wqs_added + g_wqs_per_iaa) < iaa_device->n_wq))= && + (local->n_wqs < local->max_wqs)) { + + local->wqs[local->n_wqs++] =3D iaa_wq->wq; + pr_debug("iaa_device %px: added local wq %d.%d\n", iaa_device, iaa_devi= ce->idxd->id, iaa_wq->wq->id); + } else { + if (WARN_ON(global->n_wqs =3D=3D global->max_wqs)) + break; =20 - local->wqs[local->n_wqs++] =3D iaa_wq->wq; - pr_debug("iaa_device %px: added local wq %d.%d\n", iaa_device, iaa_devic= e->idxd->id, iaa_wq->wq->id); + global->wqs[global->n_wqs++] =3D iaa_wq->wq; + pr_debug("iaa_device %px: added global wq %d.%d\n", iaa_device, iaa_dev= ice->idxd->id, iaa_wq->wq->id); + } =20 iaa_wq->mapped =3D true; ++n_wqs_added; @@ -969,6 +1262,10 @@ static void rebalance_wq_table(void) } } =20 + if (iaa_crypto_enabled && pkg_global_wq_tables) { + pkg_global_wq_tables_reinit(); + global_wq_table_add_wqs(); + } pr_debug("Finished rebalance local wqs."); } =20 @@ -979,7 +1276,17 @@ static void free_wq_tables(void) wq_table =3D NULL; } =20 - pr_debug("freed local wq table\n"); + if (global_wq_table) { + free_percpu(global_wq_table); + global_wq_table =3D NULL; + } + + if (num_consec_descs_per_wq) { + free_percpu(num_consec_descs_per_wq); + num_consec_descs_per_wq =3D NULL; + } + + pr_debug("freed wq tables\n"); } =20 /*************************************************************** @@ -1002,6 +1309,35 @@ static struct idxd_wq *wq_table_next_wq(int cpu) return entry->wqs[entry->cur_wq]; } =20 +/* + * Caller should make sure to call only if the + * per_cpu_ptr "global_wq_table" is non-NULL + * and has at least one wq configured. + */ +static struct idxd_wq *global_wq_table_next_wq(int cpu) +{ + struct wq_table_entry *entry =3D per_cpu_ptr(global_wq_table, cpu); + int *num_consec_descs =3D per_cpu_ptr(num_consec_descs_per_wq, cpu); + + /* + * Fall-back to local IAA's wq if there were no global wqs configured + * for any IAA device, or if there were problems in setting up global + * wqs for this cpu's package. + */ + if (!entry->wqs) + return wq_table_next_wq(cpu); + + if ((*num_consec_descs) =3D=3D g_consec_descs_per_gwq) { + if (++entry->cur_wq >=3D entry->n_wqs) + entry->cur_wq =3D 0; + *num_consec_descs =3D 0; + } + + ++(*num_consec_descs); + + return entry->wqs[entry->cur_wq]; +} + /************************************************* * Core iaa_crypto compress/decompress functions. *************************************************/ @@ -1553,6 +1889,7 @@ static int iaa_comp_acompress(struct acomp_req *req) struct idxd_wq *wq; struct device *dev; int order =3D -1; + struct wq_table_entry *entry; =20 compression_ctx =3D crypto_tfm_ctx(tfm); =20 @@ -1571,8 +1908,15 @@ static int iaa_comp_acompress(struct acomp_req *req) disable_async =3D true; =20 cpu =3D get_cpu(); - wq =3D wq_table_next_wq(cpu); + entry =3D per_cpu_ptr(global_wq_table, cpu); + + if (!entry || !entry->wqs || entry->n_wqs =3D=3D 0) { + wq =3D wq_table_next_wq(cpu); + } else { + wq =3D global_wq_table_next_wq(cpu); + } put_cpu(); + if (!wq) { pr_debug("no wq configured for cpu=3D%d\n", cpu); return -ENODEV; @@ -2380,6 +2724,7 @@ static void iaa_crypto_remove(struct idxd_dev *idxd_d= ev) =20 if (nr_iaa =3D=3D 0) { iaa_crypto_enabled =3D false; + pkg_global_wq_tables_dealloc(); free_wq_tables(); BUG_ON(!list_empty(&iaa_devices)); INIT_LIST_HEAD(&iaa_devices); @@ -2449,6 +2794,20 @@ static int __init iaa_crypto_init_module(void) goto err_sync_attr_create; } =20 + ret =3D driver_create_file(&iaa_crypto_driver.drv, + &driver_attr_g_wqs_per_iaa); + if (ret) { + pr_debug("IAA g_wqs_per_iaa attr creation failed\n"); + goto err_g_wqs_per_iaa_attr_create; + } + + ret =3D driver_create_file(&iaa_crypto_driver.drv, + &driver_attr_g_consec_descs_per_gwq); + if (ret) { + pr_debug("IAA g_consec_descs_per_gwq attr creation failed\n"); + goto err_g_consec_descs_per_gwq_attr_create; + } + if (iaa_crypto_debugfs_init()) pr_warn("debugfs init failed, stats not available\n"); =20 @@ -2456,6 +2815,12 @@ static int __init iaa_crypto_init_module(void) out: return ret; =20 +err_g_consec_descs_per_gwq_attr_create: + driver_remove_file(&iaa_crypto_driver.drv, + &driver_attr_g_wqs_per_iaa); +err_g_wqs_per_iaa_attr_create: + driver_remove_file(&iaa_crypto_driver.drv, + &driver_attr_sync_mode); err_sync_attr_create: driver_remove_file(&iaa_crypto_driver.drv, &driver_attr_verify_compress); @@ -2479,6 +2844,10 @@ static void __exit iaa_crypto_cleanup_module(void) &driver_attr_sync_mode); driver_remove_file(&iaa_crypto_driver.drv, &driver_attr_verify_compress); + driver_remove_file(&iaa_crypto_driver.drv, + &driver_attr_g_wqs_per_iaa); + driver_remove_file(&iaa_crypto_driver.drv, + &driver_attr_g_consec_descs_per_gwq); idxd_driver_unregister(&iaa_crypto_driver); iaa_aecs_cleanup_fixed(); crypto_free_comp(deflate_generic_tfm); --=20 2.27.0