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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-71c0381c976sm494572a34.50.2024.11.22.09.40.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 09:40:13 -0800 (PST) From: David Lechner Date: Fri, 22 Nov 2024 11:39:52 -0600 Subject: [PATCH 1/2] iio: adc: ad7313: fix irq number stored in static info struct Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-1-d05c02324b73@baylibre.com> References: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-0-d05c02324b73@baylibre.com> In-Reply-To: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-0-d05c02324b73@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Ranquet , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , David Lechner X-Mailer: b4 0.14.1 Replace the int irq_line field in struct ad_sigma_delta_info with a bool get_irq_by_name flag. (The field is reordered for better struct packing.) This struct is intended to be used as static const data. Currently, in the ad7173 driver it is static, but not const and so each driver probe will write over the struct, which is a problem if there is more than one driver instance probing at the same time. Instead of storing the actual IRQ number in the struct, a flag is added to indicate that we need to get the IRQ number by name. Then the code is modified to check this flag when setting sigma_delta->irq_line in ad_sd_init(). fwnode_irq_get_byname() is moved to ad_sd_init() to be able to handle this change with the bonus that it can be shared with other drivers in the future. static struct ad_sigma_delta_info ad7173_sigma_delta_info can't be changed to const yet in this patch because there is still another bug where another field is being written to in the probe function. Fixes: 76a1e6a42802 ("iio: adc: ad7173: add AD7173 driver") Signed-off-by: David Lechner Reported-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7173.c | 7 +------ drivers/iio/adc/ad_sigma_delta.c | 14 +++++++++++--- include/linux/iio/adc/ad_sigma_delta.h | 5 +++-- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 29ff9c7036c0..5215584438bf 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -758,6 +758,7 @@ static struct ad_sigma_delta_info ad7173_sigma_delta_in= fo =3D { .disable_all =3D ad7173_disable_all, .disable_one =3D ad7173_disable_one, .set_mode =3D ad7173_set_mode, + .get_irq_by_name =3D true, .has_registers =3D true, .addr_shift =3D 0, .read_mask =3D BIT(6), @@ -1397,12 +1398,6 @@ static int ad7173_fw_parse_device_config(struct iio_= dev *indio_dev) return ret; } =20 - ret =3D fwnode_irq_get_byname(dev_fwnode(dev), "rdy"); - if (ret < 0) - return dev_err_probe(dev, ret, "Interrupt 'rdy' is required\n"); - - ad7173_sigma_delta_info.irq_line =3D ret; - return ad7173_fw_parse_channel_config(indio_dev); } =20 diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_de= lta.c index 2f3b61765055..af982f21adfa 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -653,6 +653,8 @@ EXPORT_SYMBOL_NS_GPL(devm_ad_sd_setup_buffer_and_trigge= r, IIO_AD_SIGMA_DELTA); int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_d= ev, struct spi_device *spi, const struct ad_sigma_delta_info *info) { + int ret; + sigma_delta->spi =3D spi; sigma_delta->info =3D info; =20 @@ -674,10 +676,16 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, st= ruct iio_dev *indio_dev, } } =20 - if (info->irq_line) - sigma_delta->irq_line =3D info->irq_line; - else + if (info->get_irq_by_name) { + ret =3D fwnode_irq_get_byname(dev_fwnode(&spi->dev), "rdy"); + if (ret < 0) + return dev_err_probe(&spi->dev, ret, + "Interrupt 'rdy' is required\n"); + + sigma_delta->irq_line =3D ret; + } else { sigma_delta->irq_line =3D spi->irq; + } =20 iio_device_set_drvdata(indio_dev, sigma_delta); =20 diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc= /ad_sigma_delta.h index f8c1d2505940..2d8bc5de8332 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -43,6 +43,8 @@ struct iio_dev; * the value required for the driver to identify the channel. * @postprocess_sample: Is called for each sampled data word, can be used = to * modify or drop the sample data, it, may be NULL. + * @get_irq_by_name: Usually, the RDY IRQ is the first one and therefore = =3D=3D + * spi->irq. If not, set this to true to get the IRQ by name. * @has_registers: true if the device has writable and readable registers,= false * if there is just one read-only sample data shift register. * @addr_shift: Shift of the register address in the communications regist= er. @@ -52,7 +54,6 @@ struct iio_dev; * be used. * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots - * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used */ struct ad_sigma_delta_info { int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); @@ -61,6 +62,7 @@ struct ad_sigma_delta_info { int (*disable_all)(struct ad_sigma_delta *); int (*disable_one)(struct ad_sigma_delta *, unsigned int chan); int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sampl= e); + bool get_irq_by_name; bool has_registers; unsigned int addr_shift; unsigned int read_mask; @@ -68,7 +70,6 @@ struct ad_sigma_delta_info { unsigned int data_reg; unsigned long irq_flags; unsigned int num_slots; - int irq_line; }; =20 /** --=20 2.43.0 From nobody Mon Feb 9 16:52:54 2026 Received: from mail-ot1-f48.google.com (mail-ot1-f48.google.com [209.85.210.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C80761DFD81 for ; Fri, 22 Nov 2024 17:40:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732297221; cv=none; b=KgQuXH/m0wptIAdaR2R4wtc6a/jDsLXr//T2U0FercfPhQ15WBCsoL0KybGa2cnNiP7Grc0IjorWSmeRVKXjrAF4atjpCRX7E+cQUuHqpCanwU/iqfCFLxHfsbTN9JPVR4Rvb94SQPeq/8oq/z/mO+5qkBhADYzXeh5ShDic8nE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732297221; c=relaxed/simple; bh=SCfy0dApgGX+lpHvDT1/XuRFRQohNG3DK0neA2CKyeM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=a/cqReos2kG/WGKyYNgwxBFNlYDmJqTmzT/RnQq4SvCV17eFhVN0dpr6l7b4nl4/nmvR44+/n5q9OLdqy9trWfLv53NVfYSmc7mgLcHmCg7m1xZ9Bw9Y5ORmD8i1vWVIjYO4qMc3Va8paBkkpPYN2PPm3p5xdPZ64rQWGkaEmqc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=l9Td/uRz; arc=none smtp.client-ip=209.85.210.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="l9Td/uRz" Received: by mail-ot1-f48.google.com with SMTP id 46e09a7af769-71807ad76a8so1203768a34.0 for ; Fri, 22 Nov 2024 09:40:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1732297216; x=1732902016; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8g2971JtnzakT9wizgzatOYjfeGd7svZ1JYymTP3R20=; b=l9Td/uRz/GlbOeClCnMwJS/mtRFzhaqMHBnvLahsoJj6mBJMu0ffUaB6vNUaP/pp3y lN0tGyUtY2SmGUsg9+dH9z4ixTK+ZSify21SSCOjRemor+hlXtAZUZUKRvGyeDZZ5TOa KGTKmJLf8eYDemIpX8Rf5rE5aYOQgH8Wtkp6y0QTBEnjxP70ZTDYhv5qIHzaRVDmDX5w dY9c8N2NS5ZDZJeH89sWVkwfN7mA7/J+mb+AM3+ASh3r6MgqoWaKJSQkT6Le2bh3ekC6 peGjUbb4MBxJ25/nIRyPt1utlHyLYY1hUaIpuS5HyA+r0cn2HUrv4bud4/H6629pzSJ6 mi9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732297216; x=1732902016; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8g2971JtnzakT9wizgzatOYjfeGd7svZ1JYymTP3R20=; b=tCTV1EoqOryHzxmyjz6cPcm6TUPYnhvGoAEmcckhE5VAPzDT8gTE5hcMXjV1+1cXDp hKuY922gSkhGWGKT7PVQbgFA4uOKBxY9wTU6yedAFRGNdXtyLNUtcu5pzztxTcAZlkCW xfnfUj6wx/LsE2xNHRCSVNyAoPrsaEo2ME4v/6nM0+9syEQmsD9s9chLFbxiVfymAAzq lKxPyFTaatJUE1x8kjIInQ+3IGLkIjpZpS4/vnZRP0k5bv3E+7eyKujrl6iUD4Ubcpxe rv4Inh5fwEjYBL0U6uTLrAdWB4IcP5DqJ/kMTLQcVJyI2VdoRT7E+F9wOocoVVy8RK9d OgQw== X-Forwarded-Encrypted: i=1; AJvYcCUeE4TaHB6NFaENCpubGS6e+tfO0G3Ksawh1BwCyh0BRexDPy+/TOKNb5+0cC3W3OEl/9S29bNNBgNnqqs=@vger.kernel.org X-Gm-Message-State: AOJu0Yw69QHalRT49+tLmIn71MexcCr3Kf7T8TFeczGb3RZk+NrQImDG Wm5gG+dhQhekjXaHi17sil+pyBZxFuiX6ilA0nKcR8BNKbGS0dT+lJ07NNDatwDuztHvGIg7csB y X-Gm-Gg: ASbGnctQlEeqjyle59bdZ/lEIaV5mBF1kKFVUPwa6Q2Asm03AWPqr3mO6U3JHTOkfwU 0BkyQzmGjmPX9tDkQ4xUhzDUtHcI37Jz9zhC48dyl8EVUmoTI/jUrhJHb3qBPhFM/IQcgMxyAnO Rg5pM/ZasL4dFtACHyvRyBHc9RZv5MKU0qQmoH/697f0QqMJASoOMhqmP4DNjOdCn6/Ry69ZnS9 6nzOCIR+i27ezxynyjzq1oVffeBIC9PCUmso3KqUbD9iygFDKKF34QWMFWkCnfKHP30qKC1HyIF dzHcag== X-Google-Smtp-Source: AGHT+IH5I32inTVM2hFsmDF4gYIw+2BugAKmtZa29eyRhS+bMhKLQsivsxU2d1tSVp0EUGffei4JHg== X-Received: by 2002:a05:6830:1110:b0:718:b83:8f7e with SMTP id 46e09a7af769-71c04cea89dmr3455090a34.24.1732297214492; Fri, 22 Nov 2024 09:40:14 -0800 (PST) Received: from [127.0.1.1] (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-71c0381c976sm494572a34.50.2024.11.22.09.40.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 09:40:14 -0800 (PST) From: David Lechner Date: Fri, 22 Nov 2024 11:39:53 -0600 Subject: [PATCH 2/2] iio: adc: ad7173: make struct ad_sigma_delta_info ad7173_sigma_delta_info const Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-2-d05c02324b73@baylibre.com> References: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-0-d05c02324b73@baylibre.com> In-Reply-To: <20241122-iio-adc-ad7313-fix-non-const-info-struct-v1-0-d05c02324b73@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Ranquet , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , David Lechner X-Mailer: b4 0.14.1 Make struct ad_sigma_delta_info ad7173_sigma_delta_info static const. This structure is shared by all instances of the driver, so it can't be safely modified by one instance without affecting all other instances. The num_slots field was being modified, so we need to make two copies of the structure, one for each possible value of num_slots. Then we add a field to the chip-specific info struct to point to the correct copy of the struct ad_sigma_delta_info depending on the chip's capabilities. In order to do this, all of the chip-specific info structs have to be moved after the struct ad_sigma_delta_info definitions. Fixes: 76a1e6a42802 ("iio: adc: ad7173: add AD7173 driver") Signed-off-by: David Lechner Reported-by: Uwe Kleine-K=C3=B6nig --- drivers/iio/adc/ad7173.c | 469 +++++++++++++++++++++++++------------------= ---- 1 file changed, 249 insertions(+), 220 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 5215584438bf..ab2a7a16c477 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -166,6 +166,7 @@ struct ad7173_device_info { unsigned int clock; unsigned int id; char *name; + const struct ad_sigma_delta_info *sd_info; bool has_current_inputs; bool has_vincom_input; bool has_temp; @@ -257,223 +258,6 @@ static unsigned int ad4111_current_channel_config[] = =3D { 0x18B, /* 12:IIN3+ 11:IIN3=E2=88=92 */ }; =20 -static const struct ad7173_device_info ad4111_device_info =3D { - .name =3D "ad4111", - .id =3D AD4111_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_temp =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4112_device_info =3D { - .name =3D "ad4112", - .id =3D AD4112_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4113_device_info =3D { - .name =3D "ad4113", - .id =3D AD4113_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .data_reg_only_16bit =3D true, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4114_device_info =3D { - .name =3D "ad4114", - .id =3D AD4114_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4115_device_info =3D { - .name =3D "ad4115", - .id =3D AD4115_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 8 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4115_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4116_device_info =3D { - .name =3D "ad4116", - .id =3D AD4116_ID, - .num_voltage_in_div =3D 11, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 4 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4116_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_2_device_info =3D { - .name =3D "ad7172-2", - .id =3D AD7172_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_4_device_info =3D { - .name =3D "ad7172-4", - .id =3D AD7172_4_ID, - .num_voltage_in =3D 9, - .num_channels =3D 8, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_input_buf =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7173_8_device_info =3D { - .name =3D "ad7173-8", - .id =3D AD7173_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_2_device_info =3D { - .name =3D "ad7175-2", - .id =3D AD7175_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_8_device_info =3D { - .name =3D "ad7175-8", - .id =3D AD7175_8_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7176_2_device_info =3D { - .name =3D "ad7176-2", - .id =3D AD7176_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_int_ref =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7177_2_device_info =3D { - .name =3D "ad7177-2", - .id =3D AD7177_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .odr_start_value =3D AD7177_ODR_START_VALUE, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - static const char *const ad7173_ref_sel_str[] =3D { [AD7173_SETUP_REF_SEL_EXT_REF] =3D "vref", [AD7173_SETUP_REF_SEL_EXT_REF2] =3D "vref2", @@ -752,7 +536,7 @@ static int ad7173_disable_one(struct ad_sigma_delta *sd= , unsigned int chan) return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0); } =20 -static struct ad_sigma_delta_info ad7173_sigma_delta_info =3D { +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_4_slots = =3D { .set_channel =3D ad7173_set_channel, .append_status =3D ad7173_append_status, .disable_all =3D ad7173_disable_all, @@ -764,6 +548,252 @@ static struct ad_sigma_delta_info ad7173_sigma_delta_= info =3D { .read_mask =3D BIT(6), .status_ch_mask =3D GENMASK(3, 0), .data_reg =3D AD7173_REG_DATA, + .num_slots =3D 4, +}; + +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_8_slots = =3D { + .set_channel =3D ad7173_set_channel, + .append_status =3D ad7173_append_status, + .disable_all =3D ad7173_disable_all, + .disable_one =3D ad7173_disable_one, + .set_mode =3D ad7173_set_mode, + .get_irq_by_name =3D true, + .has_registers =3D true, + .addr_shift =3D 0, + .read_mask =3D BIT(6), + .status_ch_mask =3D GENMASK(3, 0), + .data_reg =3D AD7173_REG_DATA, + .num_slots =3D 8, +}; + +static const struct ad7173_device_info ad4111_device_info =3D { + .name =3D "ad4111", + .id =3D AD4111_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_temp =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4112_device_info =3D { + .name =3D "ad4112", + .id =3D AD4112_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4113_device_info =3D { + .name =3D "ad4113", + .id =3D AD4113_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .data_reg_only_16bit =3D true, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4114_device_info =3D { + .name =3D "ad4114", + .id =3D AD4114_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4115_device_info =3D { + .name =3D "ad4115", + .id =3D AD4115_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 8 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4115_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4116_device_info =3D { + .name =3D "ad4116", + .id =3D AD4116_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 11, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 4 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4116_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_2_device_info =3D { + .name =3D "ad7172-2", + .id =3D AD7172_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_4_device_info =3D { + .name =3D "ad7172-4", + .id =3D AD7172_4_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 9, + .num_channels =3D 8, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_input_buf =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7173_8_device_info =3D { + .name =3D "ad7173-8", + .id =3D AD7173_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_2_device_info =3D { + .name =3D "ad7175-2", + .id =3D AD7175_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_8_device_info =3D { + .name =3D "ad7175-8", + .id =3D AD7175_8_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7176_2_device_info =3D { + .name =3D "ad7176-2", + .id =3D AD7176_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_int_ref =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7177_2_device_info =3D { + .name =3D "ad7177-2", + .id =3D AD7177_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .odr_start_value =3D AD7177_ODR_START_VALUE, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), }; =20 static int ad7173_setup(struct iio_dev *indio_dev) @@ -1429,8 +1459,7 @@ static int ad7173_probe(struct spi_device *spi) spi->mode =3D SPI_MODE_3; spi_setup(spi); =20 - ad7173_sigma_delta_info.num_slots =3D st->info->num_configs; - ret =3D ad_sd_init(&st->sd, indio_dev, spi, &ad7173_sigma_delta_info); + ret =3D ad_sd_init(&st->sd, indio_dev, spi, st->info->sd_info); if (ret) return ret; =20 --=20 2.43.0