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Signed-off-by: Raviteja Laggyshetty --- .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yam= l b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 21dae0b92819..042ca44c32ec 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -34,6 +34,10 @@ properties: - qcom,sm8250-epss-l3 - qcom,sm8350-epss-l3 - const: qcom,epss-l3 + - items: + - enum: + - qcom,sa8775p-epss-l3 + - const: qcom,epss-l3-perf =20 reg: maxItems: 1 --=20 2.39.2 From nobody Sat Nov 23 22:30:07 2024 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B61601CFED1; Thu, 21 Nov 2024 11:30:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P SoCs. Signed-off-by: Raviteja Laggyshetty --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qc= om/sa8775p.dtsi index 9f315a51a7c1..dd7207eb3616 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -4282,6 +4283,15 @@ rpmhpd_opp_turbo_l1: opp-9 { }; }; =20 + epss_l3_cl0: interconnect@18590000 { + compatible =3D "qcom,sa8775p-epss-l3", + "qcom,epss-l3-perf"; + reg =3D <0x0 0x18590000 0x0 0x1000>; + clocks =3D <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names =3D "xo", "alternate"; + #interconnect-cells =3D <1>; + }; + cpufreq_hw: cpufreq@18591000 { compatible =3D "qcom,sa8775p-cpufreq-epss", "qcom,cpufreq-epss"; @@ -4295,6 +4305,15 @@ cpufreq_hw: cpufreq@18591000 { #freq-domain-cells =3D <1>; }; =20 + epss_l3_cl1: interconnect@18592000 { + compatible =3D "qcom,sa8775p-epss-l3", + "qcom,epss-l3-perf"; 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charset="utf-8" Add Epoch Subsystem (EPSS) L3 interconnect provider on SA8775P SoCs with multiple device support. Signed-off-by: Raviteja Laggyshetty --- drivers/interconnect/qcom/osm-l3.c | 85 ++++++++++++++++++++++-------- 1 file changed, 63 insertions(+), 22 deletions(-) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom= /osm-l3.c index 6a656ed44d49..a9405b7d251b 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -1,16 +1,19 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ =20 #include #include #include +#include #include #include #include #include #include +#include #include =20 #include @@ -34,9 +37,14 @@ =20 #define OSM_L3_MAX_LINKS 1 =20 +#define OSM_L3_NODE_ID_START 10000 +#define OSM_NODE_NAME_SUFFIX_SIZE 10 + #define to_osm_l3_provider(_provider) \ container_of(_provider, struct qcom_osm_l3_icc_provider, provider) =20 +static DEFINE_IDA(osm_l3_id); + struct qcom_osm_l3_icc_provider { void __iomem *base; unsigned int max_state; @@ -55,46 +63,40 @@ struct qcom_osm_l3_icc_provider { */ struct qcom_osm_l3_node { const char *name; - u16 links[OSM_L3_MAX_LINKS]; + const char *links[OSM_L3_MAX_LINKS]; u16 id; u16 num_links; u16 buswidth; }; =20 struct qcom_osm_l3_desc { - const struct qcom_osm_l3_node * const *nodes; + struct qcom_osm_l3_node * const *nodes; size_t num_nodes; unsigned int lut_row_size; unsigned int reg_freq_lut; unsigned int reg_perf_state; }; =20 -enum { - OSM_L3_MASTER_NODE =3D 10000, - OSM_L3_SLAVE_NODE, -}; - -#define DEFINE_QNODE(_name, _id, _buswidth, ...) \ - static const struct qcom_osm_l3_node _name =3D { \ +#define DEFINE_QNODE(_name, _buswidth, ...) \ + static struct qcom_osm_l3_node _name =3D { \ .name =3D #_name, \ - .id =3D _id, \ .buswidth =3D _buswidth, \ .num_links =3D COUNT_ARGS(__VA_ARGS__), \ - .links =3D { __VA_ARGS__ }, \ + __VA_OPT__(.links =3D { #__VA_ARGS__ }) \ } =20 -DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE); -DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16); +DEFINE_QNODE(osm_l3_master, 16, osm_l3_slave); +DEFINE_QNODE(osm_l3_slave, 16); =20 -static const struct qcom_osm_l3_node * const osm_l3_nodes[] =3D { +static struct qcom_osm_l3_node * const osm_l3_nodes[] =3D { [MASTER_OSM_L3_APPS] =3D &osm_l3_master, [SLAVE_OSM_L3] =3D &osm_l3_slave, }; =20 -DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE); -DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32); +DEFINE_QNODE(epss_l3_master, 32, epss_l3_slave); +DEFINE_QNODE(epss_l3_slave, 32); =20 -static const struct qcom_osm_l3_node * const epss_l3_nodes[] =3D { +static struct qcom_osm_l3_node * const epss_l3_nodes[] =3D { [MASTER_EPSS_L3_APPS] =3D &epss_l3_master, [SLAVE_EPSS_L3_SHARED] =3D &epss_l3_slave, }; @@ -123,6 +125,19 @@ static const struct qcom_osm_l3_desc epss_l3_l3_vote = =3D { .reg_perf_state =3D EPSS_REG_L3_VOTE, }; =20 +static u16 get_node_id_by_name(const char *node_name, + const struct qcom_osm_l3_desc *desc) +{ + struct qcom_osm_l3_node *const *nodes =3D desc->nodes; + int i; + + for (i =3D 0; i < desc->num_nodes; i++) { + if (!strcmp(nodes[i]->name, node_name)) + return nodes[i]->id; + } + return 0; +} + static int qcom_osm_l3_set(struct icc_node *src, struct icc_node *dst) { struct qcom_osm_l3_icc_provider *qp; @@ -164,10 +179,11 @@ static int qcom_osm_l3_probe(struct platform_device *= pdev) const struct qcom_osm_l3_desc *desc; struct icc_onecell_data *data; struct icc_provider *provider; - const struct qcom_osm_l3_node * const *qnodes; + struct qcom_osm_l3_node * const *qnodes; struct icc_node *node; size_t num_nodes; struct clk *clk; + u64 addr; int ret; =20 clk =3D clk_get(&pdev->dev, "xo"); @@ -188,6 +204,10 @@ static int qcom_osm_l3_probe(struct platform_device *p= dev) if (!qp) return -ENOMEM; =20 + ret =3D of_property_read_reg(pdev->dev.of_node, 0, &addr, NULL); + if (ret) + return ret; + qp->base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(qp->base)) return PTR_ERR(qp->base); @@ -242,8 +262,13 @@ static int qcom_osm_l3_probe(struct platform_device *p= dev) =20 icc_provider_init(provider); =20 + /* Allocate unique id for qnodes */ + for (i =3D 0; i < num_nodes; i++) + qnodes[i]->id =3D ida_alloc_min(&osm_l3_id, OSM_L3_NODE_ID_START, GFP_KE= RNEL); + for (i =3D 0; i < num_nodes; i++) { - size_t j; + char *node_name; + size_t j, len; =20 node =3D icc_node_create(qnodes[i]->id); if (IS_ERR(node)) { @@ -251,13 +276,29 @@ static int qcom_osm_l3_probe(struct platform_device *= pdev) goto err; } =20 - node->name =3D qnodes[i]->name; + /* len =3D strlen(node->name) + @ + 8 (base-address) + NULL */ + len =3D strlen(qnodes[i]->name) + OSM_NODE_NAME_SUFFIX_SIZE; + node_name =3D devm_kzalloc(&pdev->dev, len, GFP_KERNEL); + if (!node_name) { + ret =3D -ENOMEM; + goto err; + } + + snprintf(node_name, len, "%s@%08llx", qnodes[i]->name, addr); + node->name =3D node_name; + /* Cast away const and add it back in qcom_osm_l3_set() */ node->data =3D (void *)qnodes[i]; icc_node_add(node, provider); =20 - for (j =3D 0; j < qnodes[i]->num_links; j++) - icc_link_create(node, qnodes[i]->links[j]); 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charset="utf-8" The EPSS instance in SA8775P uses PERF_STATE register instead of REG_L3_VOTE to scale L3 clocks. Along with SoC specific compatible, add new generic compatible "qcom,epss-l3-perf" for PERF_STATE register based L3 scaling. Signed-off-by: Raviteja Laggyshetty --- drivers/interconnect/qcom/osm-l3.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom= /osm-l3.c index a9405b7d251b..285afaa1f61e 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -318,6 +318,7 @@ static int qcom_osm_l3_probe(struct platform_device *pd= ev) =20 static const struct of_device_id osm_l3_of_match[] =3D { { .compatible =3D "qcom,epss-l3", .data =3D &epss_l3_l3_vote }, + { .compatible =3D "qcom,epss-l3-perf", .data =3D &epss_l3_perf_state }, { .compatible =3D "qcom,osm-l3", .data =3D &osm_l3 }, { .compatible =3D "qcom,sc7180-osm-l3", .data =3D &osm_l3 }, { .compatible =3D "qcom,sc7280-epss-l3", .data =3D &epss_l3_perf_state }, @@ -325,6 +326,7 @@ static const struct of_device_id osm_l3_of_match[] =3D { { .compatible =3D "qcom,sm8150-osm-l3", .data =3D &osm_l3 }, { .compatible =3D "qcom,sc8180x-osm-l3", .data =3D &osm_l3 }, { .compatible =3D "qcom,sm8250-epss-l3", .data =3D &epss_l3_perf_state }, + { .compatible =3D "qcom,sa8775p-epss-l3", .data =3D &epss_l3_perf_state }, { } }; MODULE_DEVICE_TABLE(of, osm_l3_of_match); --=20 2.39.2