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[185.246.87.17]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38254910796sm4598065f8f.47.2024.11.21.02.18.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Nov 2024 02:18:32 -0800 (PST) From: Guillaume Stols Date: Thu, 21 Nov 2024 10:18:31 +0000 Subject: [PATCH 9/9] iio: adc: ad7606: Add support for writing registers when using backend Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241121-ad7606_add_iio_backend_software_mode-v1-9-8a693a5e3fa9@baylibre.com> References: <20241121-ad7606_add_iio_backend_software_mode-v1-0-8a693a5e3fa9@baylibre.com> In-Reply-To: <20241121-ad7606_add_iio_backend_software_mode-v1-0-8a693a5e3fa9@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Nuno Sa , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , devicetree@vger.kernel.org, dlechner@baylibre.com, jstephan@baylibre.com, aardelean@baylibre.com, adureghello@baylibre.com, Guillaume Stols X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732184304; l=4035; i=gstols@baylibre.com; s=20240417; h=from:subject:message-id; bh=tdpf/A32vha/ko+aQ4RiDlCU44C08sRlPZcE4GA5DLw=; b=IG8R0F6BS7ExulQfzVIBxrGS6fS4qof4AM1NKLiCQyCH0n6OvosUfzcczsrHesp1cJt3Lyfo+ apRxWf5SaiKAiTV14WHE7FXNgmJPpz53QR3HGCdb4Gc/yULdOclYON/ X-Developer-Key: i=gstols@baylibre.com; a=ed25519; pk=XvMm5WHuV67sGYOJZqIYzXndbaJOlNd8Q6li6vnb4Cs= Adds the logic for effectively enabling the software mode for the iio-backend, i.e enabling the software mode channel configuration and implementing the register writing functions. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.h | 15 ++++++++++++ drivers/iio/adc/ad7606_par.c | 58 ++++++++++++++++++++++++++++++++++++++++= +++- 2 files changed, 72 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 74896d9f1929..a54dc110839f 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -96,6 +96,21 @@ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 0, 0, 16) =20 +#define AD7606_BI_SW_CHANNEL(num) \ + AD760X_CHANNEL(num, \ + /* mask separate */ \ + BIT(IIO_CHAN_INFO_SCALE), \ + /* mask type */ \ + 0, \ + /* mask all */ \ + BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + /* mask separate available */ \ + BIT(IIO_CHAN_INFO_SCALE), \ + /* mask all available */ \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + 16) + struct ad7606_state; =20 typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev, diff --git a/drivers/iio/adc/ad7606_par.c b/drivers/iio/adc/ad7606_par.c index a25182a3daa7..0c1177f436f3 100644 --- a/drivers/iio/adc/ad7606_par.c +++ b/drivers/iio/adc/ad7606_par.c @@ -13,12 +13,14 @@ #include #include #include +#include #include =20 #include #include =20 #include "ad7606.h" +#include "ad7606_bi.h" =20 static const struct iio_chan_spec ad7606b_bi_channels[] =3D { AD7606_BI_CHANNEL(0), @@ -31,6 +33,17 @@ static const struct iio_chan_spec ad7606b_bi_channels[] = =3D { AD7606_BI_CHANNEL(7), }; =20 +static const struct iio_chan_spec ad7606b_bi_sw_channels[] =3D { + AD7606_BI_SW_CHANNEL(0), + AD7606_BI_SW_CHANNEL(1), + AD7606_BI_SW_CHANNEL(2), + AD7606_BI_SW_CHANNEL(3), + AD7606_BI_SW_CHANNEL(4), + AD7606_BI_SW_CHANNEL(5), + AD7606_BI_SW_CHANNEL(6), + AD7606_BI_SW_CHANNEL(7), +}; + static int ad7606_bi_update_scan_mode(struct iio_dev *indio_dev, const uns= igned long *scan_mask) { struct ad7606_state *st =3D iio_priv(indio_dev); @@ -70,7 +83,7 @@ static int ad7606_bi_setup_iio_backend(struct device *dev= , struct iio_dev *indio if (ret) return ret; =20 - ret =3D devm_iio_backend_enable(dev, st->back); + ret =3D devm_iio_backend_enable(st->dev, st->back); if (ret) return ret; =20 @@ -86,9 +99,52 @@ static int ad7606_bi_setup_iio_backend(struct device *de= v, struct iio_dev *indio return 0; } =20 +static int ad7606_bi_reg_read(struct iio_dev *indio_dev, unsigned int addr) +{ + struct ad7606_state *st =3D iio_priv(indio_dev); + int val, ret; + struct ad7606_platform_data *pdata =3D st->dev->platform_data; + + iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { + ret =3D pdata->bus_reg_read(st->back, + addr, + &val); + } + if (ret < 0) + return ret; + + return val; +} + +static int ad7606_bi_reg_write(struct iio_dev *indio_dev, + unsigned int addr, + unsigned int val) +{ + struct ad7606_state *st =3D iio_priv(indio_dev); + struct ad7606_platform_data *pdata =3D st->dev->platform_data; + int ret; + + iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { + ret =3D pdata->bus_reg_write(st->back, + addr, + val); + } + return ret; +} + +static int ad7606_bi_sw_mode_config(struct iio_dev *indio_dev) +{ + indio_dev->channels =3D ad7606b_bi_sw_channels; + + return 0; +} + static const struct ad7606_bus_ops ad7606_bi_bops =3D { .iio_backend_config =3D ad7606_bi_setup_iio_backend, .update_scan_mode =3D ad7606_bi_update_scan_mode, + .reg_read =3D ad7606_bi_reg_read, + .reg_write =3D ad7606_bi_reg_write, + .sw_mode_config =3D ad7606_bi_sw_mode_config, }; =20 static int ad7606_par16_read_block(struct device *dev, --=20 2.34.1