From nobody Sun Nov 24 17:41:29 2024 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A0831DE2C3; Wed, 20 Nov 2024 14:49:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732114166; cv=none; b=tGd24/fuJD9sLfl58ZWfqYrOKAOwqjGZGkJZHJ53Ac4g9XFqtIq+aefJYMHozmQ4T9iyMARlTWk/aI+xB/JrDZrRAMSdigkdWYzVpynqSna6UMVVG/7KfFDw3ruiGgiTN6PkRdBnhzLB7U8vbAXruL4+dmbC1DLSxPPWc9AECpE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732114166; c=relaxed/simple; bh=x28STAYFolWfEoZ22/KnQCtaHiStAuNaFgZEgFxEUwU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=bBpWHgg13CtjoEL6LqiWlG2CKMnD1QSvF+RLzcaCS3/cpeEWnbbB+pZj/R/ZqSDKdCqhQGrpqYlCVrbThKp6PjYiX75sEW1MDMoVJ4IWHhiiIDB5M0tzhssxJUofyafIfjLL7rWT8UMkSJFt88amxg6VpXSowSB/UaTHH/Xvt1A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=fwGIJxkB; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="fwGIJxkB" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AK9FL5j003946; Wed, 20 Nov 2024 14:49:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= B2yagOTuat//51o0fk/IwmqkCygqht3psurGMbuF0eI=; b=fwGIJxkB6J6ipDQe 77ai76LbOXUCXTitRNURDw98KX4sFktDYakOxhnG56i1Dfi/Zp1AX3v98EemQwCy 53gBmtMIizixsWXUSnhGki/aefb509l+soODXcb7tQlNsZ/1trgQpUsOAS5bpHRa h9F7p34QhrLQZdih5VKElV2RVjPF7GcaaTeqKFxFU4PDssfGqxdb8Uu92HLLjocf tGAzuevoZ+d7za5mTMzAv81802aVacUKdZjulXpWR9Y9FCLWcyby+EGW2pKAQQ87 U4/6qRpWQT3cfQZGo8wtrbZ322gM96JtlpHVGr+exfCP2rGEnLIDpMXIGWDiUxM9 XtEurw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 431ce38x80-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 Nov 2024 14:49:00 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AKEn0iO027643 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 20 Nov 2024 14:49:00 GMT Received: from hu-dikshita-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 20 Nov 2024 06:48:54 -0800 From: Dikshita Agarwal Date: Wed, 20 Nov 2024 20:16:16 +0530 Subject: [PATCH v6 26/28] media: iris: add check to allow sub states transitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241120-qcom-video-iris-v6-26-a8cf6704e992@quicinc.com> References: <20241120-qcom-video-iris-v6-0-a8cf6704e992@quicinc.com> In-Reply-To: <20241120-qcom-video-iris-v6-0-a8cf6704e992@quicinc.com> To: Vikash Garodia , Abhinav Kumar , Mauro Carvalho Chehab , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Philipp Zabel CC: Hans Verkuil , Sebastian Fricke , Bryan O'Donoghue , Dmitry Baryshkov , Neil Armstrong , Nicolas Dufresne , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jianhua Lu , , , , , "Dikshita Agarwal" , Vedang Nagar X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732113983; l=5132; i=quic_dikshita@quicinc.com; s=20240917; h=from:subject:message-id; bh=pH2n+gEdApaTchQwHQ0q0A+CBGKgbQ24Pvt9VdnZh4o=; b=6WTdcCKgmoMSDarQ7hTk4J/X4tyuCFW0ysaoMqDBAokhhSHNjVEKsehkJ+NtXo/N7dKukBI/3 pv032wX5E72CEY9yF+dSNhyGDgFkwOQRMefm+B/f+uCuxQC4STVsc92 X-Developer-Key: i=quic_dikshita@quicinc.com; a=ed25519; pk=EEvKY6Ar1OI5SWf44FJ1Ebo1KuQEVbbf5UNPO+UHVhM= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YkBbwzinLOum9ckiZjKGZKqsyOuXZ3Xa X-Proofpoint-ORIG-GUID: YkBbwzinLOum9ckiZjKGZKqsyOuXZ3Xa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 bulkscore=0 mlxscore=0 adultscore=0 spamscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411200098 From: Vedang Nagar Based on state machine design, add allow checks to transition from one sub-state to another sub-states. Signed-off-by: Vedang Nagar Signed-off-by: Dikshita Agarwal --- .../platform/qcom/iris/iris_hfi_gen1_command.c | 12 ++++++- drivers/media/platform/qcom/iris/iris_state.c | 40 ++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_state.h | 3 ++ 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index e1fbbb3c196d..64f887d9a17d 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -135,6 +135,9 @@ static int iris_hfi_gen1_session_start(struct iris_inst= *inst, u32 plane) if (!V4L2_TYPE_IS_OUTPUT(plane)) return 0; =20 + if (inst->sub_state & IRIS_INST_SUB_LOAD_RESOURCES) + return 0; + reinit_completion(&inst->completion); iris_hfi_gen1_packet_session_cmd(inst, &packet, HFI_CMD_SESSION_LOAD_RESO= URCES); =20 @@ -153,7 +156,11 @@ static int iris_hfi_gen1_session_start(struct iris_ins= t *inst, u32 plane) if (ret) return ret; =20 - return iris_wait_for_session_response(inst, false); + ret =3D iris_wait_for_session_response(inst, false); + if (ret) + return ret; + + return iris_inst_change_sub_state(inst, 0, IRIS_INST_SUB_LOAD_RESOURCES); } =20 static int iris_hfi_gen1_session_stop(struct iris_inst *inst, u32 plane) @@ -180,6 +187,9 @@ static int iris_hfi_gen1_session_stop(struct iris_inst = *inst, u32 plane) ret =3D iris_hfi_queue_cmd_write(core, &pkt, pkt.shdr.hdr.size); if (!ret) ret =3D iris_wait_for_session_response(inst, false); + + iris_inst_change_sub_state(inst, IRIS_INST_SUB_LOAD_RESOURCES, 0); + iris_helper_buffers_done(inst, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, VB2_BUF_STATE_ERROR); iris_helper_buffers_done(inst, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, diff --git a/drivers/media/platform/qcom/iris/iris_state.c b/drivers/media/= platform/qcom/iris/iris_state.c index f12306e735ec..5976e926c83d 100644 --- a/drivers/media/platform/qcom/iris/iris_state.c +++ b/drivers/media/platform/qcom/iris/iris_state.c @@ -105,6 +105,43 @@ int iris_inst_state_change_streamoff(struct iris_inst = *inst, u32 plane) return iris_inst_change_state(inst, new_state); } =20 +static bool iris_inst_allow_sub_state(struct iris_inst *inst, enum iris_in= st_sub_state sub_state) +{ + if (!sub_state) + return true; + + switch (inst->state) { + case IRIS_INST_INIT: + if (sub_state & IRIS_INST_SUB_LOAD_RESOURCES) + return true; + return false; + case IRIS_INST_INPUT_STREAMING: + if (sub_state & (IRIS_INST_SUB_FIRST_IPSC | IRIS_INST_SUB_DRC | + IRIS_INST_SUB_DRAIN | IRIS_INST_SUB_INPUT_PAUSE)) + return true; + return false; + case IRIS_INST_OUTPUT_STREAMING: + if (sub_state & (IRIS_INST_SUB_DRC_LAST | + IRIS_INST_SUB_DRAIN_LAST | IRIS_INST_SUB_OUTPUT_PAUSE)) + return true; + return false; + case IRIS_INST_STREAMING: + if (sub_state & (IRIS_INST_SUB_DRC | IRIS_INST_SUB_DRAIN | + IRIS_INST_SUB_DRC_LAST | IRIS_INST_SUB_DRAIN_LAST | + IRIS_INST_SUB_INPUT_PAUSE | IRIS_INST_SUB_OUTPUT_PAUSE)) + return true; + return false; + case IRIS_INST_DEINIT: + if (sub_state & (IRIS_INST_SUB_DRC | IRIS_INST_SUB_DRAIN | + IRIS_INST_SUB_DRC_LAST | IRIS_INST_SUB_DRAIN_LAST | + IRIS_INST_SUB_INPUT_PAUSE | IRIS_INST_SUB_OUTPUT_PAUSE)) + return true; + return false; + default: + return false; + } +} + int iris_inst_change_sub_state(struct iris_inst *inst, enum iris_inst_sub_state clear_sub_state, enum iris_inst_sub_state set_sub_state) @@ -124,6 +161,9 @@ int iris_inst_change_sub_state(struct iris_inst *inst, =20 prev_sub_state =3D inst->sub_state; =20 + if (!iris_inst_allow_sub_state(inst, set_sub_state)) + return -EINVAL; + inst->sub_state |=3D set_sub_state; inst->sub_state &=3D ~clear_sub_state; =20 diff --git a/drivers/media/platform/qcom/iris/iris_state.h b/drivers/media/= platform/qcom/iris/iris_state.h index bf645f6f879c..4bb37423ed05 100644 --- a/drivers/media/platform/qcom/iris/iris_state.h +++ b/drivers/media/platform/qcom/iris/iris_state.h @@ -113,6 +113,8 @@ enum iris_inst_state { * IRIS_INST_SUB_OUTPUT_PAUSE: last buffer is received form firmware as pa= rt * of drc sequence. This indicates that * firmware is paused to process any further o= utput frames. + * IRIS_INST_SUB_LOAD_RESOURCES: indicates all the resources have been loa= ded by the + * firmware and it is ready for processing. */ enum iris_inst_sub_state { IRIS_INST_SUB_FIRST_IPSC =3D BIT(0), @@ -122,6 +124,7 @@ enum iris_inst_sub_state { IRIS_INST_SUB_DRAIN_LAST =3D BIT(4), IRIS_INST_SUB_INPUT_PAUSE =3D BIT(5), IRIS_INST_SUB_OUTPUT_PAUSE =3D BIT(6), + IRIS_INST_SUB_LOAD_RESOURCES =3D BIT(7), }; =20 int iris_inst_change_state(struct iris_inst *inst, --=20 2.34.1