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Tue, 19 Nov 2024 09:21:43 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AJ9LTaX028936 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 09:21:29 GMT Received: from hu-mdalam-blr.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 19 Nov 2024 01:21:25 -0800 From: Md Sadre Alam To: , , , , , , CC: , , , Subject: [PATCH 2/2] mtd: rawnand: qcom: Fix onfi param page read Date: Tue, 19 Nov 2024 14:50:58 +0530 Message-ID: <20241119092058.480363-3-quic_mdalam@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241119092058.480363-1-quic_mdalam@quicinc.com> References: <20241119092058.480363-1-quic_mdalam@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2XijrQ2wGzC3PcOGEb6lF0m9fvjjayQS X-Proofpoint-GUID: 2XijrQ2wGzC3PcOGEb6lF0m9fvjjayQS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 mlxlogscore=999 clxscore=1015 suspectscore=0 adultscore=0 priorityscore=1501 phishscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190067 Content-Type: text/plain; charset="utf-8" For QPIC V2 onwards there is a separate register to read last code word "QPIC_NAND_READ_LOCATION_LAST_CW_n". qcom_param_page_type_exec() is used to read only one code word If we will configure number of code words to 1 in QPIC_NAND_DEV0_CFG0 register then QPIC controller thinks its reading the last code word, since we are having separate register to read the last code word, we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n" register to fetch data from QPIC buffer to system memory. Also there is minimum size to fetch the data from device to QPIC buffer is 512-bytes. If size is less than 512-bytes the data will not be protected by ECC as per QPIC standard. So while reading onfi parameter page from NAND device setting nandc->buf_count =3D 512. Fixes: 89550beb098e ("mtd: rawnand: qcom: Implement exec_op()") Signed-off-by: Md Sadre Alam --- drivers/mtd/nand/raw/qcom_nandc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_= nandc.c index 34ee8555fb8a..6487f2126833 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -2859,7 +2859,12 @@ static int qcom_param_page_type_exec(struct nand_chi= p *chip, const struct nand_ const struct nand_op_instr *instr =3D NULL; unsigned int op_id =3D 0; unsigned int len =3D 0; - int ret; + int ret, reg_base; + + reg_base =3D NAND_READ_LOCATION_0; + + if (nandc->props->qpic_v2) + reg_base =3D NAND_READ_LOCATION_LAST_CW_0; =20 ret =3D qcom_parse_instructions(chip, subop, &q_op); if (ret) @@ -2911,14 +2916,17 @@ static int qcom_param_page_type_exec(struct nand_ch= ip *chip, const struct nand_ op_id =3D q_op.data_instr_idx; len =3D nand_subop_get_data_len(subop, op_id); =20 - nandc_set_read_loc(chip, 0, 0, 0, len, 1); + if (nandc->props->qpic_v2) + nandc_set_read_loc_last(chip, reg_base, 0, len, 1); + else + nandc_set_read_loc_first(chip, reg_base, 0, len, 1); =20 if (!nandc->props->qpic_v2) { write_reg_dma(nandc, NAND_DEV_CMD_VLD, 1, 0); write_reg_dma(nandc, NAND_DEV_CMD1, 1, NAND_BAM_NEXT_SGL); } =20 - nandc->buf_count =3D len; + nandc->buf_count =3D 512; memset(nandc->data_buffer, 0xff, nandc->buf_count); =20 config_nand_single_cw_page_read(chip, false, 0); --=20 2.34.1