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charset="utf-8" From: Yijie Yang In order to support multiple revisions of the qcs8300-ride board, create a .dtsi containing the common parts and split out the ethernet bits into the actual board file as they will change in revision 2. Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 411 ++---------------- .../{qcs8300-ride.dts =3D> qcs8300-ride.dtsi} | 19 +- 2 files changed, 33 insertions(+), 397 deletions(-) rewrite arch/arm64/boot/dts/qcom/qcs8300-ride.dts (96%) copy arch/arm64/boot/dts/qcom/{qcs8300-ride.dts =3D> qcs8300-ride.dtsi} (9= 4%) diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dt= s/qcom/qcs8300-ride.dts dissimilarity index 96% index b1c9f2cb9749..9b9922f1fcc6 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -1,379 +1,32 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -/dts-v1/; - -#include -#include - -#include "qcs8300.dtsi" -/ { - model =3D "Qualcomm Technologies, Inc. QCS8300 Ride"; - compatible =3D "qcom,qcs8300-ride", "qcom,qcs8300"; - chassis-type =3D "embedded"; - - aliases { - serial0 =3D &uart7; - }; - - chosen { - stdout-path =3D "serial0:115200n8"; - }; - - clocks { - xo_board_clk: xo-board-clk { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <38400000>; - }; - - sleep_clk: sleep-clk { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <32000>; - }; - }; -}; - -&apps_rsc { - regulators-0 { - compatible =3D "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id =3D "a"; - - vreg_s4a: smps4 { - regulator-name =3D "vreg_s4a"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - }; - - vreg_s9a: smps9 { - regulator-name =3D "vreg_s9a"; - regulator-min-microvolt =3D <1352000>; - regulator-max-microvolt =3D <1352000>; - regulator-initial-mode =3D ; - }; - - vreg_l3a: ldo3 { - regulator-name =3D "vreg_l3a"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l4a: ldo4 { - regulator-name =3D "vreg_l4a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l5a: ldo5 { - regulator-name =3D "vreg_l5a"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l6a: ldo6 { - regulator-name =3D "vreg_l6a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l7a: ldo7 { - regulator-name =3D "vreg_l7a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l8a: ldo8 { - regulator-name =3D "vreg_l8a"; - regulator-min-microvolt =3D <2504000>; - regulator-max-microvolt =3D <2960000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l9a: ldo9 { - regulator-name =3D "vreg_l9a"; - regulator-min-microvolt =3D <2970000>; - regulator-max-microvolt =3D <3072000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - }; - - regulators-1 { - compatible =3D "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id =3D "c"; - - vreg_s5c: smps5 { - regulator-name =3D "vreg_s5c"; - regulator-min-microvolt =3D <1104000>; - regulator-max-microvolt =3D <1104000>; - regulator-initial-mode =3D ; - }; - - vreg_l1c: ldo1 { - regulator-name =3D "vreg_l1c"; - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <500000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l2c: ldo2 { - regulator-name =3D "vreg_l2c"; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <904000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l4c: ldo4 { - regulator-name =3D "vreg_l4c"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l6c: ldo6 { - regulator-name =3D "vreg_l6c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l7c: ldo7 { - regulator-name =3D "vreg_l7c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l8c: ldo8 { - regulator-name =3D "vreg_l8c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l9c: ldo9 { - regulator-name =3D "vreg_l9c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - }; -}; - -ðernet0 { - phy-mode =3D "sgmii"; - phy-handle =3D <&sgmii_phy0>; - - pinctrl-0 =3D <ðernet0_default>; - pinctrl-names =3D "default"; - - snps,mtl-rx-config =3D <&mtl_rx_setup>; - snps,mtl-tx-config =3D <&mtl_tx_setup>; - snps,ps-speed =3D <1000>; - - status =3D "okay"; - - mdio { - compatible =3D "snps,dwmac-mdio"; - #address-cells =3D <1>; - #size-cells =3D <0>; - - sgmii_phy0: phy@8 { - compatible =3D "ethernet-phy-id0141.0dd4"; - reg =3D <0x8>; - device_type =3D "ethernet-phy"; - interrupts-extended =3D <&tlmm 4 IRQ_TYPE_EDGE_FALLING>; - reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; - reset-assert-us =3D <11000>; - reset-deassert-us =3D <70000>; - }; - }; - - mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use =3D <4>; - snps,rx-sched-sp; - - queue0 { - snps,dcb-algorithm; - snps,map-to-dma-channel =3D <0x0>; - snps,route-up; - snps,priority =3D <0x1>; - }; - - queue1 { - snps,dcb-algorithm; - snps,map-to-dma-channel =3D <0x1>; - snps,route-ptp; - }; - - queue2 { - snps,avb-algorithm; - snps,map-to-dma-channel =3D <0x2>; - snps,route-avcp; - }; - - queue3 { - snps,avb-algorithm; - snps,map-to-dma-channel =3D <0x3>; - snps,priority =3D <0xc>; - }; - }; - - mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use =3D <4>; - snps,tx-sched-sp; - - queue0 { - snps,dcb-algorithm; - }; - - queue1 { - snps,dcb-algorithm; - }; - - queue2 { - snps,avb-algorithm; - snps,send_slope =3D <0x1000>; - snps,idle_slope =3D <0x1000>; - snps,high_credit =3D <0x3e800>; - snps,low_credit =3D <0xffc18000>; - }; - - queue3 { - snps,avb-algorithm; - snps,send_slope =3D <0x1000>; - snps,idle_slope =3D <0x1000>; - snps,high_credit =3D <0x3e800>; - snps,low_credit =3D <0xffc18000>; - }; - }; -}; - -&gcc { - clocks =3D <&rpmhcc RPMH_CXO_CLK>, - <&sleep_clk>, - <0>, - <0>, - <0>, - <0>, - <0>, - <0>, - <0>, - <0>; -}; - -&qupv3_id_0 { - status =3D "okay"; -}; - -&remoteproc_adsp { - firmware-name =3D "qcom/qcs8300/adsp.mbn"; - status =3D "okay"; -}; - -&remoteproc_cdsp { - firmware-name =3D "qcom/qcs8300/cdsp0.mbn"; - status =3D "okay"; -}; - -&remoteproc_gpdsp { - firmware-name =3D "qcom/qcs8300/gpdsp0.mbn"; - status =3D "okay"; -}; - -&rpmhcc { - clocks =3D <&xo_board_clk>; - clock-names =3D "xo"; -}; - -&serdes0 { - phy-supply =3D <&vreg_l5a>; - status =3D "okay"; -}; - -&tlmm { - ethernet0_default: ethernet0-default-state { - ethernet0_mdc: ethernet0-mdc-pins { - pins =3D "gpio5"; - function =3D "emac0_mdc"; - drive-strength =3D <16>; - bias-pull-up; - }; - - ethernet0_mdio: ethernet0-mdio-pins { - pins =3D "gpio6"; - function =3D "emac0_mdio"; - drive-strength =3D <16>; - bias-pull-up; - }; - }; -}; - -&uart7 { - status =3D "okay"; -}; - -&ufs_mem_hc { - reset-gpios =3D <&tlmm 133 GPIO_ACTIVE_LOW>; - vcc-supply =3D <&vreg_l8a>; - vcc-max-microamp =3D <1100000>; - vccq-supply =3D <&vreg_l4c>; - vccq-max-microamp =3D <1200000>; - status =3D "okay"; -}; - -&ufs_mem_phy { - vdda-phy-supply =3D <&vreg_l4a>; - vdda-pll-supply =3D <&vreg_l5a>; - status =3D "okay"; -}; +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "qcs8300-ride.dtsi" +/ { + model =3D "Qualcomm Technologies, Inc. QCS8300 Ride"; + compatible =3D "qcom,qcs8300-ride", "qcom,qcs8300"; + chassis-type =3D "embedded"; +}; + +ðernet0 { + phy-mode =3D "sgmii"; +}; + +&mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + sgmii_phy0: phy@8 { + compatible =3D "ethernet-phy-id0141.0dd4"; + reg =3D <0x8>; + device_type =3D "ethernet-phy"; + interrupts-extended =3D <&tlmm 4 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <11000>; + reset-deassert-us =3D <70000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dt= s/qcom/qcs8300-ride.dtsi similarity index 94% copy from arch/arm64/boot/dts/qcom/qcs8300-ride.dts copy to arch/arm64/boot/dts/qcom/qcs8300-ride.dtsi index b1c9f2cb9749..e02347c2adf4 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dtsi @@ -3,17 +3,11 @@ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ =20 -/dts-v1/; - #include #include =20 #include "qcs8300.dtsi" / { - model =3D "Qualcomm Technologies, Inc. QCS8300 Ride"; - compatible =3D "qcom,qcs8300-ride", "qcom,qcs8300"; - chassis-type =3D "embedded"; - aliases { serial0 =3D &uart7; }; @@ -211,7 +205,6 @@ vreg_l9c: ldo9 { }; =20 ðernet0 { - phy-mode =3D "sgmii"; phy-handle =3D <&sgmii_phy0>; =20 pinctrl-0 =3D <ðernet0_default>; @@ -223,20 +216,10 @@ ðernet0 { =20 status =3D "okay"; =20 - mdio { + mdio: mdio { compatible =3D "snps,dwmac-mdio"; #address-cells =3D <1>; #size-cells =3D <0>; - - sgmii_phy0: phy@8 { - compatible =3D "ethernet-phy-id0141.0dd4"; - reg =3D <0x8>; - device_type =3D "ethernet-phy"; - interrupts-extended =3D <&tlmm 4 IRQ_TYPE_EDGE_FALLING>; - reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; - reset-assert-us =3D <11000>; - reset-deassert-us =3D <70000>; - }; }; =20 mtl_rx_setup: rx-queues-config { --=20 2.34.1