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[93.34.91.161]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-382377822ffsm1302814f8f.82.2024.11.16.02.57.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Nov 2024 02:57:41 -0800 (PST) From: Christian Marangi To: Michael Turquette , Stephen Boyd , Lorenzo Bianconi , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Cc: Christian Marangi , stable@vger.kernel.org Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581 Date: Sat, 16 Nov 2024 11:56:53 +0100 Message-ID: <20241116105710.19748-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Documentation for EN7581 had a typo and still referenced the EN7523 BUS base source frequency. This was in conflict with a different page in the Documentration that state that the BUS runs at 300MHz (600MHz source with divisor set to 2) and the actual watchdog that tick at half the BUS clock (150MHz). This was verified with the watchdog by timing the seconds that the system takes to reboot (due too watchdog) and by operating on different values of the BUS divisor. The correct values for source of BUS clock are 600MHz and 540MHz. This was also confirmed by Airoha. Cc: stable@vger.kernel.org Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support") Signed-off-by: Christian Marangi Acked-by: Lorenzo Bianconi --- drivers/clk/clk-en7523.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c index e52c5460e927..239cb04d9ae3 100644 --- a/drivers/clk/clk-en7523.c +++ b/drivers/clk/clk-en7523.c @@ -87,6 +87,7 @@ static const u32 slic_base[] =3D { 100000000, 3125000 }; static const u32 npu_base[] =3D { 333000000, 400000000, 500000000 }; /* EN7581 */ static const u32 emi7581_base[] =3D { 540000000, 480000000, 400000000, 300= 000000 }; +static const u32 bus7581_base[] =3D { 600000000, 540000000 }; static const u32 npu7581_base[] =3D { 800000000, 750000000, 720000000, 600= 000000 }; static const u32 crypto_base[] =3D { 540000000, 480000000 }; =20 @@ -222,8 +223,8 @@ static const struct en_clk_desc en7581_base_clks[] =3D { .base_reg =3D REG_BUS_CLK_DIV_SEL, .base_bits =3D 1, .base_shift =3D 8, - .base_values =3D bus_base, - .n_base_values =3D ARRAY_SIZE(bus_base), + .base_values =3D bus7581_base, + .n_base_values =3D ARRAY_SIZE(bus7581_base), =20 .div_bits =3D 3, .div_shift =3D 0, --=20 2.45.2