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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ff69b158fdsm2289301fa.102.2024.11.16.02.56.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Nov 2024 02:56:10 -0800 (PST) From: Marcus Folkesson Date: Sat, 16 Nov 2024 11:55:55 +0100 Subject: [PATCH v4] mtd: spi-nor: atmel: add at25sf321 entry Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241116-spi-nor-v4-1-3de8ac6fd0be@gmail.com> X-B4-Tracking: v=1; b=H4sIADp6OGcC/2XMTQ6CMBCG4auYrq3ptPzVlfcwLqAdYBKhpDWNh nB3CxuILr/JPO/MAnrCwK6nmXmMFMiNaWTnEzN9PXbIyabNpJAZCKh4mIiPznNrpC50ZbEWLUv fk8eW3lvp/ki7p/By/rOFI6zX/0YEDtyWMm/aphSA5tYNNT0vxg1sbUR5cFLvTiaHUBRGaSEQ9 K9TuwPId6eS0wpNXmVQlqY5umVZvjtp4J0OAQAA X-Change-ID: 20241018-spi-nor-dc29698dea0f To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea Cc: linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Marcus Folkesson X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4883; i=marcus.folkesson@gmail.com; h=from:subject:message-id; bh=S9eRxq402eK4I35Xnjw+5DdjS0TnqMYqf/6CHY6wIAM=; b=owEBbQKS/ZANAwAIAYiATm9ZXVIyAcsmYgBnOHpEhuDfKZJq5pNn5HGrppcMqMIFW/mvGNTVD 6wy2OGQw5GJAjMEAAEIAB0WIQQFUaLotmy1TWTBLGWIgE5vWV1SMgUCZzh6RAAKCRCIgE5vWV1S Ms4dEACJPrCLNfXlv8LSAo2ITG/27aqRj1Dux1Af4VpYRkhUvt7tAHQ9ZPBbd/IxFZbzbjiXOe2 67z7quG11la+0eif5vghMRHIQFD9TlBXnwzH8bANPMkLhCTfa9FAsHIWSaJroDVW3fpIPcLbi/O ecnaCH40s1oJ0nsJmmVtir90GeVptGAbsNsh5HuG+8fJGO95vDooMZZyoDlKLoC/0UPehbJELo9 Yev671hIVjlvmvn9InEj8QGXqs3PJOIZ01D23+KCkwttEhOr22KvaSMaaSPeXY7os1SJ/RkCqJf lUHsMU8prc+FRvDnIL/HPE8J0uqw2bkxoIONyrfF9oWchX+LS8vvjJACL2YlBLUdVpyJ3hACc3Y FPnXy0jLYW+CiOhMcXXlDYFnYlf/GC5tDjXhRl7/l3qhx6TQa8QI/E5J+teoybwCZG2rWW59DjO /eREh2oqhXqn5+vr1NT2Go+tU7av3I652UYE3bwO8MzhB2t+Uy1FB1LsNNj+653EdkokOTU0tcz E1bgcZHoEKq1jnV+m/54Q2guLBPTfFF5miRTdvnU/ksFaR+ck22xUonbrDKMdKMBMu9JzfO7rS6 Wte/dEC4HAIiyqxYJu6lcXZtoSlr5mItkXATxUVFXViFVJvCLQnVHkGt6hIxdzBAh+3EULZTcoq SwNMGlX1HPU5RJw== X-Developer-Key: i=marcus.folkesson@gmail.com; a=openpgp; fpr=AB91D46C7E0F6E6FB2AB640EC0FE25D598F6C127 Add entry for the at25sf321 32Mbit SPI flash. This flash is populated on a custom board and was tested at 10MHz frequency using the "ti,da830-spi" SPI controller. Link: https://www.renesas.com/en/document/dst/at25sf321-datasheet?r=3D16088= 01 Reviewed-by: Michael Walle Signed-off-by: Marcus Folkesson --- root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/partname at25sf321 root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/jedec_id 1f8701 root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/manufacturer atmel root# cat /sys/kernel/debug/spi-nor/spi1.1/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-1S (fast read) opcode 0x0b mode cycles 0 dummy cycles 8 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 4 dummy cycles 0 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 root# mtd_debug info /dev/mtd6 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_BIT_WRITEABLE mtd.size =3D 65536 (64K) mtd.erasesize =3D 4096 (4K) mtd.writesize =3D 1=20 mtd.oobsize =3D 0=20 regions =3D 0 SINGLE =3D=3D=3D=3D=3D=3D spi-rx-bus-width =3D <1>; spi-tx-bus-width =3D <1>; root# cat /sys/kernel/debug/spi-nor/spi1.1/params name at25sf321 id 1f 87 01 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_16BIT_SR opcodes read 0x0b dummy cycles 8 erase 0x20 program 0x02 8D extension none protocols read 1S-1S-1S write 1S-1S-1S register 1S-1S-1S erase commands 20 (4.00 KiB) [0] d8 (64.0 KiB) [1] c7 (4.00 MiB) sector map region (in hex) | erase mask | flags ------------------+------------+---------- 00000000-003fffff | [01 ] | DUAL =3D=3D=3D=3D=3D=3D spi-rx-bus-width =3D <2>; spi-tx-bus-width =3D <2>; root# cat /sys/kernel/debug/spi-nor/spi1.1/params=20 name at25sf321 id 1f 87 01 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_16BIT_SR | SOFT_RESET opcodes read 0x0b dummy cycles 8 erase 0x20 program 0x02 8D extension repeat protocols read 1S-1S-1S write 1S-1S-1S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | flags ------------------+------------+---------- 00000000-003fffff | [ 123] |=20 QUAD =3D=3D=3D=3D=3D=3D spi-rx-bus-width =3D <4>; spi-tx-bus-width =3D <4>; root# cat /sys/kernel/debug/spi-nor/spi1.1/params name at25sf321 id 1f 87 01 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_16BIT_SR | SOFT_RESET opcodes read 0x0b dummy cycles 8 erase 0x20 program 0x02 8D extension repeat protocols read 1S-1S-1S write 1S-1S-1S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | flags ------------------+------------+---------- 00000000-003fffff | [ 123] | --- Changes in v4: - Join line for link in description - Removed .name as the ID is reused by different chips - Link to v3: https://lore.kernel.org/r/20241115-spi-nor-v3-1-93ec584177cb@= gmail.com Changes in v3: - Add SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags - Link to v2: https://lore.kernel.org/r/20241029-spi-nor-v2-1-e166c3900e19@= gmail.com Changes in v2: - Change from at25sf321b to at25sf321 - Link to v1: https://lore.kernel.org/r/20241018-spi-nor-v1-1-d725bfb701ec@= gmail.com --- drivers/mtd/spi-nor/atmel.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 45d1153a04a07b7c61f46b117311b24ab695038f..82c592f0a1e156e6871785d58b6= 70f76a0c03911 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -238,6 +238,10 @@ static const struct flash_info atmel_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x87, 0x01), + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, }; =20 --- base-commit: 200289db261f0c8131a5756133e9d30966289c3b change-id: 20241018-spi-nor-dc29698dea0f Best regards, --=20 Marcus Folkesson