From nobody Fri Nov 22 18:19:32 2024 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA42F1D45E0 for ; Fri, 15 Nov 2024 15:11:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731683520; cv=none; b=suOx/6I09B4KaXMGHZmchMbDE8vkvtO6QSYBpeCM0tGCizyePxqjSpV6dfEtDLJPLn2Gtd5zNekZy37eQd6nzPg2qP9JtJK3/Smws1MlT8e2KOtLXGctEu7Xs6O3fB8UenEubgBQ9AOUhIpMbjfs/BiioKfZNf6EQa/eX5lXKcM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731683520; c=relaxed/simple; bh=HX+LVhGFkYeb6oiozhEiBvYJkDe8skxutlXeFq+9158=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=Ua3HGJkFQ6I6VsoR+koOLFaENei9+oWGPicp6XhfyCJgkznWLeaK9ecXkFhWCKgII6iuBAjPn33Dod9aTaKzX5J3/MjsHUZvWkUxOXqZznAXsEJ8HcBYtuSMJMTQixh0jj+ynBqztiGGn279Ih70NPS/M2+aOEyT2m7kMnSAt7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=2oiJfz2P; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="2oiJfz2P" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:Message-ID:Date: Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=nk174AGwbrN2iQ6lu65t+DAZ0jlZZM5p3WBAEQT210c=; b=2oiJfz2PsPaSVvAFd/OOAOWE9i 04gX2fak00SItozpZvfRKoQVQPDAg+TqJPLjy3Yf35Q/4wumcBHRVS5dkoQULujJU4Ligq/XI5H1H MfWmVd+Nk58nZjqvJUp4ooBzGefeQPkx2Qf1S+fhSNyd2S3T7/NY16r/pYe6gSyMkgd05QvCVHCfZ /CWAK2cC6vcUez7l7Uvi0T4fhZapXNnXdM9kRAkTsEsPuV/KTQp1sxmtLW3WcRkmzAKAg8yoMQ6sq No1uZbmGJwUDon5wSTkVfwAyLTofPYWsgWWAeW/CBByIsft0295JLpJioFTu6c4+c8R6XT1e5Lslu eAo6tqSw==; Received: from i53875a30.versanet.de ([83.135.90.48] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tBxz5-0002mM-O9; Fri, 15 Nov 2024 16:11:43 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@theobroma-systems.com, hjc@rock-chips.com, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, sebastian.reichel@collabora.com, Heiko Stuebner , Quentin Schulz , Andy Yan Subject: [PATCH v2] drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification Date: Fri, 15 Nov 2024 16:11:31 +0100 Message-ID: <20241115151131.416830-1-heiko@sntech.de> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The clock is in Hz while the value checked against is in kHz, so actual frequencies will never be able to be below to max value. Fix this by specifying the max-value in Hz too. Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") Signed-off-by: Heiko Stuebner Reviewed-by: Quentin Schulz Acked-by: Andy Yan --- changes in v2: - drop the separate vp3-config patch, as vp3 will always get the leftover resources, so _should_ be fine (Andy) - fix error output to also report Hz for the value in Hz (Quentin) - add received Reviews+Acks drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm= /rockchip/rockchip_drm_vop2.c index 9ad025aa9ab0..0c8ec7220fbe 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1864,9 +1864,9 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_= video_port *vp, int id, else dclk_out_rate =3D v_pixclk >> 2; =20 - dclk_rate =3D rk3588_calc_dclk(dclk_out_rate, 600000); + dclk_rate =3D rk3588_calc_dclk(dclk_out_rate, 600000000); if (!dclk_rate) { - drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld K= HZ\n", + drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld H= z\n", dclk_out_rate); return 0; } @@ -1881,9 +1881,9 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_= video_port *vp, int id, * dclk_rate =3D N * dclk_core_rate N =3D (1,2,4 ), * we get a little factor here */ - dclk_rate =3D rk3588_calc_dclk(dclk_out_rate, 600000); + dclk_rate =3D rk3588_calc_dclk(dclk_out_rate, 600000000); if (!dclk_rate) { - drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n", + drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld Hz\n", dclk_out_rate); return 0; } --=20 2.45.2