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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-71a780ea62esm748978a34.5.2024.11.15.12.19.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Nov 2024 12:19:03 -0800 (PST) From: David Lechner Date: Fri, 15 Nov 2024 14:18:49 -0600 Subject: [PATCH v5 10/16] iio: buffer-dmaengine: add devm_iio_dmaengine_buffer_setup_ext2() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-dlech-mainline-spi-engine-offload-2-v5-10-bea815bd5ea5@baylibre.com> References: <20241115-dlech-mainline-spi-engine-offload-2-v5-0-bea815bd5ea5@baylibre.com> In-Reply-To: <20241115-dlech-mainline-spi-engine-offload-2-v5-0-bea815bd5ea5@baylibre.com> To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Nuno_S=C3=A1?= Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-pwm@vger.kernel.org, David Lechner X-Mailer: b4 0.14.1 Add a new devm_iio_dmaengine_buffer_setup_ext2() function to handle cases where the DMA channel is managed by the caller rather than being requested and released by the iio_dmaengine module. Signed-off-by: David Lechner --- v5 changes: none v4 changes: * This replaces "iio: buffer-dmaengine: generalize requesting DMA channel" --- drivers/iio/buffer/industrialio-buffer-dmaengine.c | 107 +++++++++++++++--= ---- include/linux/iio/buffer-dmaengine.h | 5 + 2 files changed, 81 insertions(+), 31 deletions(-) diff --git a/drivers/iio/buffer/industrialio-buffer-dmaengine.c b/drivers/i= io/buffer/industrialio-buffer-dmaengine.c index 054af21dfa65..602cb2e147a6 100644 --- a/drivers/iio/buffer/industrialio-buffer-dmaengine.c +++ b/drivers/iio/buffer/industrialio-buffer-dmaengine.c @@ -33,6 +33,7 @@ struct dmaengine_buffer { struct iio_dma_buffer_queue queue; =20 struct dma_chan *chan; + bool owns_chan; struct list_head active; =20 size_t align; @@ -216,28 +217,23 @@ static const struct iio_dev_attr *iio_dmaengine_buffe= r_attrs[] =3D { * Once done using the buffer iio_dmaengine_buffer_free() should be used to * release it. */ -static struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev, - const char *channel) +static struct iio_buffer *iio_dmaengine_buffer_alloc(struct dma_chan *chan, + bool owns_chan) { struct dmaengine_buffer *dmaengine_buffer; unsigned int width, src_width, dest_width; struct dma_slave_caps caps; - struct dma_chan *chan; int ret; =20 dmaengine_buffer =3D kzalloc(sizeof(*dmaengine_buffer), GFP_KERNEL); - if (!dmaengine_buffer) - return ERR_PTR(-ENOMEM); - - chan =3D dma_request_chan(dev, channel); - if (IS_ERR(chan)) { - ret =3D PTR_ERR(chan); - goto err_free; + if (!dmaengine_buffer) { + ret =3D -ENOMEM; + goto err_release; } =20 ret =3D dma_get_slave_caps(chan, &caps); if (ret < 0) - goto err_release; + goto err_free; =20 /* Needs to be aligned to the maximum of the minimums */ if (caps.src_addr_widths) @@ -252,6 +248,7 @@ static struct iio_buffer *iio_dmaengine_buffer_alloc(st= ruct device *dev, =20 INIT_LIST_HEAD(&dmaengine_buffer->active); dmaengine_buffer->chan =3D chan; + dmaengine_buffer->owns_chan =3D owns_chan; dmaengine_buffer->align =3D width; dmaengine_buffer->max_size =3D dma_get_max_seg_size(chan->device->dev); =20 @@ -263,10 +260,12 @@ static struct iio_buffer *iio_dmaengine_buffer_alloc(= struct device *dev, =20 return &dmaengine_buffer->queue.buffer; =20 -err_release: - dma_release_channel(chan); err_free: kfree(dmaengine_buffer); +err_release: + if (owns_chan) + dma_release_channel(chan); + return ERR_PTR(ret); } =20 @@ -282,12 +281,38 @@ void iio_dmaengine_buffer_free(struct iio_buffer *buf= fer) iio_buffer_to_dmaengine_buffer(buffer); =20 iio_dma_buffer_exit(&dmaengine_buffer->queue); - dma_release_channel(dmaengine_buffer->chan); - iio_buffer_put(buffer); + + if (dmaengine_buffer->owns_chan) + dma_release_channel(dmaengine_buffer->chan); } EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_free, IIO_DMAENGINE_BUFFER); =20 +static struct iio_buffer +*__iio_dmaengine_buffer_setup_ext(struct iio_dev *indio_dev, + struct dma_chan *chan, bool owns_chan, + enum iio_buffer_direction dir) +{ + struct iio_buffer *buffer; + int ret; + + buffer =3D iio_dmaengine_buffer_alloc(chan, owns_chan); + if (IS_ERR(buffer)) + return ERR_CAST(buffer); + + indio_dev->modes |=3D INDIO_BUFFER_HARDWARE; + + buffer->direction =3D dir; + + ret =3D iio_device_attach_buffer(indio_dev, buffer); + if (ret) { + iio_dmaengine_buffer_free(buffer); + return ERR_PTR(ret); + } + + return buffer; +} + /** * iio_dmaengine_buffer_setup_ext() - Setup a DMA buffer for an IIO device * @dev: DMA channel consumer device @@ -308,24 +333,13 @@ struct iio_buffer *iio_dmaengine_buffer_setup_ext(str= uct device *dev, const char *channel, enum iio_buffer_direction dir) { - struct iio_buffer *buffer; - int ret; - - buffer =3D iio_dmaengine_buffer_alloc(dev, channel); - if (IS_ERR(buffer)) - return ERR_CAST(buffer); - - indio_dev->modes |=3D INDIO_BUFFER_HARDWARE; - - buffer->direction =3D dir; + struct dma_chan *chan; =20 - ret =3D iio_device_attach_buffer(indio_dev, buffer); - if (ret) { - iio_dmaengine_buffer_free(buffer); - return ERR_PTR(ret); - } + chan =3D dma_request_chan(dev, channel); + if (IS_ERR(chan)) + return ERR_CAST(chan); =20 - return buffer; + return __iio_dmaengine_buffer_setup_ext(indio_dev, chan, true, dir); } EXPORT_SYMBOL_NS_GPL(iio_dmaengine_buffer_setup_ext, IIO_DMAENGINE_BUFFER); =20 @@ -362,6 +376,37 @@ int devm_iio_dmaengine_buffer_setup_ext(struct device = *dev, } EXPORT_SYMBOL_NS_GPL(devm_iio_dmaengine_buffer_setup_ext, IIO_DMAENGINE_BU= FFER); =20 +/** + * devm_iio_dmaengine_buffer_setup_ext2() - Setup a DMA buffer for an IIO = device + * @dev: Device for devm ownership + * @indio_dev: IIO device to which to attach this buffer. + * @chan: DMA channel + * @dir: Direction of buffer (in or out) + * + * This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc() + * and attaches it to an IIO device with iio_device_attach_buffer(). + * It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes o= f the + * IIO device. + * + * This is the same as devm_iio_dmaengine_buffer_setup_ext() except that t= he + * caller manages requesting and releasing the DMA channel. + */ +int devm_iio_dmaengine_buffer_setup_ext2(struct device *dev, + struct iio_dev *indio_dev, + struct dma_chan *chan, + enum iio_buffer_direction dir) +{ + struct iio_buffer *buffer; + + buffer =3D __iio_dmaengine_buffer_setup_ext(indio_dev, chan, false, dir); + if (IS_ERR(buffer)) + return PTR_ERR(buffer); + + return devm_add_action_or_reset(dev, __devm_iio_dmaengine_buffer_free, + buffer); +} +EXPORT_SYMBOL_NS_GPL(devm_iio_dmaengine_buffer_setup_ext2, IIO_DMAENGINE_B= UFFER); + MODULE_AUTHOR("Lars-Peter Clausen "); MODULE_DESCRIPTION("DMA buffer for the IIO framework"); MODULE_LICENSE("GPL"); diff --git a/include/linux/iio/buffer-dmaengine.h b/include/linux/iio/buffe= r-dmaengine.h index 81d9a19aeb91..7bdb979b59f2 100644 --- a/include/linux/iio/buffer-dmaengine.h +++ b/include/linux/iio/buffer-dmaengine.h @@ -11,6 +11,7 @@ =20 struct iio_dev; struct device; +struct dma_chan; =20 void iio_dmaengine_buffer_free(struct iio_buffer *buffer); struct iio_buffer *iio_dmaengine_buffer_setup_ext(struct device *dev, @@ -26,6 +27,10 @@ int devm_iio_dmaengine_buffer_setup_ext(struct device *d= ev, struct iio_dev *indio_dev, const char *channel, enum iio_buffer_direction dir); +int devm_iio_dmaengine_buffer_setup_ext2(struct device *dev, + struct iio_dev *indio_dev, + struct dma_chan *chan, + enum iio_buffer_direction dir); =20 #define devm_iio_dmaengine_buffer_setup(dev, indio_dev, channel) \ devm_iio_dmaengine_buffer_setup_ext(dev, indio_dev, channel, \ --=20 2.43.0