From nobody Fri Nov 22 17:01:29 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E1EB1D4613; Fri, 15 Nov 2024 15:30:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684620; cv=none; b=uS5iylRImmXKwUIXZZqZE6uJJKFVGZQN934vV1LVwJRVPJS4M0nDcog+JUtFrlG5+FA9/7msjJBSU2oDUpObCmMVC8RDbRd33FzRywxpj8ObW41MbPXC3JUD9QqBjLS6mkB8jm9lzphC0GGi+Xu04ZzP5BkbMM/IwmZxU7CAzok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684620; c=relaxed/simple; bh=bb+PGPq+w9RrNa7FSPZJkEbu0nmc/XNXBgM+pNMhYMs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BM47SI6wdOFI+0lt+Y3MD6H+y2k4BUTdazoDQg7z8ZS6gYUBPMTS8YLdXwdgTW3fM0UqHkmKJLjvLKJj8GXTETSEzNm3rFQZF+lDri6ENTcJ6tQRsjctgUF2pHatCeCqJrw06777FAZn6aI2mAWcsD8chzMF7BzfR0jiltwrCo4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Pw+404mj; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Pw+404mj" Received: by mail.gandi.net (Postfix) with ESMTPSA id 2FD936000F; Fri, 15 Nov 2024 15:30:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731684609; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DsKZnU2R0DNxhIwwppCQVHZ0ePkW/J1Qsk/fOA0a7eo=; b=Pw+404mjCpeqzDrtxRgE1v4GNkZQjer90K7sSyb6iorHWAl5lg/phojX45fqdniWEBblGT gYcSEeVRLH3zeTpRv7ScqtC0wv1J9409RYay9UoDH+4VYCNgLjyF5XPc5/DHsOYrohDRkS s63N7pN2rkRL98sjKrdPx/j6asCoE6xksXKxeaBlgbrPdb4iQggGb78x5mnkXKR6fZ3dND HwWyNZS/uuMEpof9vPJAa2C2+xa6vrSD1MbaMoEogYdBhEfPBCLWZXnJWSjbHn/IPqcqnH /u+V2C42wVv1GMgDdb3/9wJA4NBgenLHg9i4ZAOSNFYPhUPQXkGORrI6KUgKKw== From: Gregory CLEMENT Date: Fri, 15 Nov 2024 16:29:54 +0100 Subject: [PATCH 1/5] dt-bindings: mips: Document mti,mips-cm Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-cluster-hci-broken-v1-1-00636800611d@bootlin.com> References: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> In-Reply-To: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com From: Jiaxun Yang Add devicetree binding documentation for MIPS Coherence Manager. gc: reg is no more mandatory Signed-off-by: Jiaxun Yang Signed-off-by: Gregory CLEMENT --- .../devicetree/bindings/mips/mti,mips-cm.yaml | 37 ++++++++++++++++++= ++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Docu= mentation/devicetree/bindings/mips/mti,mips-cm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..03a5ba5624a429c428ee2afca73= b3e29127e02f9 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/mti,mips-cm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPS Coherence Manager + +description: | + Defines a location of the MIPS Coherence Manager registers. + +maintainers: + - Jiaxun Yang + +properties: + compatible: + const: mti,mips-cm + + reg: + description: + Base address and size of an unoccupied region in system's MMIO addre= ss + space, which will be used to map the MIPS CM global control registers + block. It is conventionally decided by the system integrator. + maxItems: 1 + +required: + - compatible + +additionalProperties: false + +examples: + - | + coherency-manager@1fbf8000 { + compatible =3D "mti,mips-cm"; + reg =3D <0x1bde8000 0x8000>; + }; +... --=20 2.45.2 From nobody Fri Nov 22 17:01:29 2024 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 659AB1D5AC6; Fri, 15 Nov 2024 15:30:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684619; cv=none; b=tRzumOsxfNaJL4RFBVECPU+mY175CQ0d/ugAB8Mr7R5a/aDgqmoOb5ThHYqhF3ruptAWujrhIP+wCG/bzTIOUtv4vitRRYcM8IocZwqGquGVFGMtUSe4n2gK57lZVg1k+P2k6aRL1MUnipJpVMM1ekHazOf1Ihw6PgusTvhdj6w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684619; c=relaxed/simple; bh=kS6DOja/4ELW/nUhIstcM/vOr39mWgDpFzL1QVfznyA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SfsSpZjzUTmhIMqf1yfw8gG5UxFpNjgl8Ykmm4xWl/4k0FN0TOzINlAeACWzEhZAjuhqYKmaxDJbNvNH6MXBvX/P+3x0ZYwX/yp21HY4h/aaxTMEovlzN6+2qM+MBIX7mWBPNyhGhhnyqOuU28xmvePOrlh1ZdQQhdT1/g2JGno= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=A/fk73Y5; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="A/fk73Y5" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0CA5520003; Fri, 15 Nov 2024 15:30:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731684610; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=G6MVqAwHyuCR7GxoWX3UQdg+1GAIfRhIWW5eEMXkd5s=; b=A/fk73Y5+ir8yNfy5zRpPSwtCpphGFXToySIOIa0BL8lv4RoITNDaZrxkAAi/+ppLEFXa+ N6ZcJgKkTore/Qz/fLeU4Awfq4sgFTidQCZOyb+DDfK4wffyJS05Uqsx91Sp22cYfFuiVa KqQEVEAVoTI96Dybfi+nLgAKhxPusuGdHHRm3n8XF8X+BCxj7k3RR4IBg3RGVoV9bq3dTG 9MpGb5KiVtdD89ePLlyrRObIj06YhPsgaz91c214IvF1gPNiTlvNvC+7lsEDgAejTwfWMR LeXtZaz/X30rnssecXW6jqKQrl9CyUMDTDroR+6laWGIQQHZgvEIL3Kak8YF7Q== From: Gregory CLEMENT Date: Fri, 15 Nov 2024 16:29:55 +0100 Subject: [PATCH 2/5] dt-bindings: mips: mips-cm: Add property for broken HCI information Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-cluster-hci-broken-v1-2-00636800611d@bootlin.com> References: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> In-Reply-To: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com Some CM3.5 reports show that Hardware Cache Initialization is complete, but in reality it's not the case. They also incorrectly indicate that Hardware Cache Initialization is supported. This optional property allows warning about this broken feature that cannot be detected at runtime. Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/mips/mti,mips-cm.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Docu= mentation/devicetree/bindings/mips/mti,mips-cm.yaml index 03a5ba5624a429c428ee2afca73b3e29127e02f9..eab31a1022c8cbdee8608111051= 6579ebe99e640 100644 --- a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -23,6 +23,12 @@ properties: block. It is conventionally decided by the system integrator. maxItems: 1 =20 + cm3-l2-config-hci-broken: + type: boolean + description: + If present, indicates that the HCI (Hardware Cache Initialization) + information for the L2 cache in multi-cluster configuration is broke= n. + required: - compatible =20 --=20 2.45.2 From nobody Fri Nov 22 17:01:29 2024 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A402E1D5CC2; Fri, 15 Nov 2024 15:30:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684621; cv=none; b=cfhV/Z+N7GyrFo3lWPwzm1+WwJSTE66+EmSmAXCClDl7jR0ogOQfjU25DHtngoYGHZgOjTIVpa3ofQqxdl5K4MR8xqtfu2+Ua4AEoEyythrLeGXpvPywYFWoC3DSUtkKlBYkbLjOsdqBQPnu+ON/hOmWIEynlaLqwcZv4eRUk7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684621; c=relaxed/simple; bh=daQgb2jNqZ0GK6GEn3Eju5Fx9agidHuO7KfcxhggVCE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OcKnYpXgZc3FyUf/VtcMKfsTCZ749W0/fPGA/U43EfuZv9j1Z24UsXy/Zgaq/D5i0MIpCedchtSjlDn1ZgmmBH9w03z9Stp+F1DBzjIdprop8yhvmh0wqV31sn+b8bAsqq/n9ifiyiIKYVnmAhW/QCW7HKltiYJr+BMCgG99a+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iacbYRlF; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iacbYRlF" Received: by mail.gandi.net (Postfix) with ESMTPSA id CD176FF80E; Fri, 15 Nov 2024 15:30:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731684611; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=buYxr7CUXzzx6XiXeAQUm7dN0AlNmhzNEVEstIlPdwg=; b=iacbYRlFP80sXwQPPMFx9wQmlO3bNzwKVLaBg1KKUkAgZJw+N8UXDgPYBD1oq8eWLiYuvg NH7b4PQoknlZuGAK5sZZN4EPwV8sZq8qJ5Tw1+iXhgbbmDqHjjpqH15KnhuSqmZM9Ho7SM qEbnLTaoyf6DXqjJKsiJAjnMcfq2VWgihEgMpLDzzK1WjyLdcX37l0mUzE6KZKNZcJivO0 NCMYmc5hg8qQ/rUsioOAEQu622onrXGrM7DQCBTLlMX71ImA88M5e2MOQBX6V0WbiA11hE puRwZpjcSm5373XA5/FYg4Pj35Cy9X3x5f2xHu82DKvLFpBYg+s4H2tUXDok1g== From: Gregory CLEMENT Date: Fri, 15 Nov 2024 16:29:56 +0100 Subject: [PATCH 3/5] MIPS: cm: Detect CM quirks from device tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-cluster-hci-broken-v1-3-00636800611d@bootlin.com> References: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> In-Reply-To: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com Some information that should be retrieved at runtime for the Coherence Manager can be either absent or wrong. This patch allows checking if some of this information is available from the device tree and updates the internal variable accordingly. For now, only the HCI broken-related property is being retrieved. Signed-off-by: Gregory CLEMENT --- arch/mips/include/asm/mips-cm.h | 22 ++++++++++++++++++++++ arch/mips/kernel/mips-cm.c | 16 ++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-c= m.h index 1afa85db1fb37d1017fbe7d6b7a2b7d2470e8257..3bfe0633b57639bfb05b7692e4b= b83ba7c0b2523 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -59,6 +59,16 @@ extern phys_addr_t mips_cm_l2sync_phys_base(void); */ extern int mips_cm_is64; =20 +/* + * mips_cm_is_l2_hci_broken - determine if HCI is broken + * + * Some CM reports show that Hardware Cache Initialization is + * complete, but in reality it's not the case. They also incorrectly + * indicate that Hardware Cache Initialization is supported. This + * flags allows warning about this broken feature. + */ +extern bool mips_cm_is_l2_hci_broken; + /** * mips_cm_error_report - Report CM cache errors */ @@ -97,6 +107,18 @@ static inline bool mips_cm_present(void) #endif } =20 +/** + * mips_cm_update_property - update property from the device tree + * + * Retrieve the properties from the device tree if a CM node exist and + * update the internal variable based on this. + */ +#ifdef CONFIG_MIPS_CM +extern void mips_cm_update_property(void); +#else +static void mips_cm_update_property(void) {} +#endif + /** * mips_cm_has_l2sync - determine whether an L2-only sync region is present * diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c index 9854bc2b6895d4db67d216586f65e4810661d29b..a2010b4d54c93175b63763bd563= 9c12e4583f58f 100644 --- a/arch/mips/kernel/mips-cm.c +++ b/arch/mips/kernel/mips-cm.c @@ -5,6 +5,7 @@ */ =20 #include +#include #include #include =20 @@ -14,6 +15,7 @@ void __iomem *mips_gcr_base; void __iomem *mips_cm_l2sync_base; int mips_cm_is64; +bool mips_cm_is_l2_hci_broken; =20 static char *cm2_tr[8] =3D { "mem", "gcr", "gic", "mmio", @@ -237,6 +239,20 @@ static void mips_cm_probe_l2sync(void) mips_cm_l2sync_base =3D ioremap(addr, MIPS_CM_L2SYNC_SIZE); } =20 +void mips_cm_update_property(void) +{ + struct device_node *cm_node; + + cm_node =3D of_find_compatible_node(of_root, NULL, "mti,mips-cm"); + if (!cm_node) + return; + if (of_property_read_bool(cm_node, "cm3-l2-config-hci-broken")) { + pr_info("HCI (Hardware Cache Init for the L2 cache) in GCR_L2_RAM_CONFIG= from the CM3 is broken"); + mips_cm_is_l2_hci_broken =3D true; + } + of_node_put(cm_node); +} + int mips_cm_probe(void) { phys_addr_t addr; --=20 2.45.2 From nobody Fri Nov 22 17:01:29 2024 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25F0D1D5174; Fri, 15 Nov 2024 15:30:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="GiV48AWL" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7F145240014; Fri, 15 Nov 2024 15:30:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731684612; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BSEqBmSqmyvDs47D4eD55kQ405suvhvrk4+/jN9RG4w=; b=GiV48AWL4UuUGjZnNMrBERZFtXYN3VZV7kgBvPwVQQM18y8IKnDaJmqMaOjMKxfTfJrGv/ OIaiwBZNOi8TgcmFOduZ3xhkbs33GurZpBYQgsrESiwyRaFNXIu6JKuTWk6AIK3Pq7su/p aMVaMFanaWND/kwX0os+CXekclk4zs8ycJYvaT7YSu2Kxra7Mar1CZ+h14vNx9+QIb/iN/ kpUJXBe0uawMFFwikFC1GrkimJEkWr2s5OCiFTG7RSuo1/ydN2MMrbmW7V1lFyL4l+We9t epV/T4jBTtAImkWmmJ1jeJe1OUgc5ZziDGO5QgazIf+6VoBAsP6KqUTOWlgcBg== From: Gregory CLEMENT Date: Fri, 15 Nov 2024 16:29:57 +0100 Subject: [PATCH 4/5] MIPS: CPS: Support broken HCI for multicluster Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-cluster-hci-broken-v1-4-00636800611d@bootlin.com> References: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> In-Reply-To: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com Some CM3.5 devices incorrectly report that hardware cache initialization has completed, and also claim to support hardware cache initialization when they don't actually do so. This commit fixes this issue by retrieving the correct information from the device tree and allowing the system to bypass the hardware cache initialization step. Instead, it relies on manual operation. As a result, multi-user support is now possible for these CPUs. Signed-off-by: Gregory CLEMENT --- arch/mips/kernel/smp-cps.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index b20ea4048429e1aab2bffbada793ee594bee1e05..e85bd087467e8caf0640ad247ee= 5f8eb65107591 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -333,6 +333,9 @@ static void __init cps_prepare_cpus(unsigned int max_cp= us) sizeof(*mips_cps_cluster_bootcfg), GFP_KERNEL); =20 + if (nclusters > 1) + mips_cm_update_property(); + for (cl =3D 0; cl < nclusters; cl++) { /* Allocate core boot configuration structs */ ncores =3D mips_cps_numcores(cl); @@ -394,7 +397,7 @@ static void init_cluster_l2(void) { u32 l2_cfg, l2sm_cop, result; =20 - while (1) { + while (!mips_cm_is_l2_hci_broken) { l2_cfg =3D read_gcr_redir_l2_ram_config(); =20 /* If HCI is not supported, use the state machine below */ --=20 2.45.2 From nobody Fri Nov 22 17:01:29 2024 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6990E1DFDB1; Fri, 15 Nov 2024 15:30:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684623; cv=none; b=X8tvEKUeiuGLYY42w8cgk2e5DOkzeV+rbcYphvUnW8U6zJN5TUzX39xzN7RA5HxX1n8vkNwiQufemR8mB2X+XCEiOAy5Bo3KfrgadU9LdbtT4WJyYvkIHzxkxBBKPNWe0HlCoNfEyFG3fHg7IPpaJxOecFbZW/tqPWtwWpefxnw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731684623; c=relaxed/simple; bh=rcLw8UU9Jp5A5RZQ8av4V49LPxylNIxppm2k4MDo8m0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qRXObV26EomXG6gGpKmIB5fgQoYnHQwKP4VZb8ZVwNi5an6GO6gxsyYeR7Y68Cqa74xwQesAfPabBFgS24kZiNm+yOFzpYLyfHZftmir9KNKgyy4TYezSoI20W1IDcYrJUXMEXT3FqJ+DHtiij5at+u9Z77DAminvhGksxgn6ko= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=L69+Ttyz; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="L69+Ttyz" Received: by mail.gandi.net (Postfix) with ESMTPSA id 4CB7320008; Fri, 15 Nov 2024 15:30:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731684612; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Pceyd0h6XHg/DFWUpf8mY+3nyC6bAPKNaNi+3u32HGA=; b=L69+TtyzVjGtce4XBia4Pini3CIbBOAXNIBQ/hldCEnREU7zmG9y5FQcIhbtfM1dbV7Y3w YAZPMWsObh2fJ1qXEsJ2/9avTMgzO1lr1ZOJHcv2hr+M8OK42QPtil20RaFqTxk+HvMsZh BVArkUF6agclX+UF9HKXVDgTrF8+ywUCz6x/EuzQTHHkfzl8OjslluI6AVaXYOViRbhjP9 hywpKAO8a1b7cLGoKzC1afGKePPLqP64CVkyvcaFNgPIc0ALa/Ji367fZK79Kw1RUhCL/N eHqzmnP3Z11+CI69xPhvhZUs8GNfvaeMQFHB6O2I8VXKnMcq8zeosfQjxWegrA== From: Gregory CLEMENT Date: Fri, 15 Nov 2024 16:29:58 +0100 Subject: [PATCH 5/5] MIPS: mobileye: dts: eyeq6h: Enable cluster support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241115-cluster-hci-broken-v1-5-00636800611d@bootlin.com> References: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> In-Reply-To: <20241115-cluster-hci-broken-v1-0-00636800611d@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com The CM3.5 device used in EyeQ6H SoCs incorrectly reports the status for Hardware Cache Initialization (HCI). This commit adds a property to acknowledge this issue, which enables the use of the second CPU cluster. Signed-off-by: Gregory CLEMENT --- arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/m= obileye/eyeq6h.dtsi index 1db3c3cda2e395025075387bcb66ea0737fd37f6..0195b5e5227c60031607a1707f1= 52910ab610d4c 100644 --- a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi @@ -32,6 +32,11 @@ cpu_intc: interrupt-controller { #interrupt-cells =3D <1>; }; =20 + coherency-manager { + compatible =3D "mti,mips-cm"; + cm3-l2-config-hci-broken; + }; + soc: soc { compatible =3D "simple-bus"; #address-cells =3D <2>; --=20 2.45.2