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Thu, 14 Nov 2024 15:12:37 +0000 From: Bhavin Sharma To: alexander.deucher@amd.com, alex.hung@amd.com Cc: Bhavin Sharma , Harry Wentland , Leo Li , Rodrigo Siqueira , =?UTF-8?q?Christian=20K=C3=B6nig?= , Xinhui Pan , David Airlie , Simona Vetter , Kenneth Feng , Wenjing Liu , Chris Park , Roman Li , Leo Ma , Ryan Seto , Jose Fernandez , Ilya Bakoulin , Aurabindo Pillai , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] drm/amd/display: remove redundant is_dsc_possible check Date: Thu, 14 Nov 2024 20:41:11 +0530 Message-ID: <20241114151150.19576-2-bhavin.sharma@siliconsignals.io> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241114151150.19576-1-bhavin.sharma@siliconsignals.io> References: <20241114151150.19576-1-bhavin.sharma@siliconsignals.io> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: PN3PR01CA0092.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:9b::10) To PN3P287MB1171.INDP287.PROD.OUTLOOK.COM (2603:1096:c01:1a1::5) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PN3P287MB1171:EE_|PN3P287MB1340:EE_ X-MS-Office365-Filtering-Correlation-Id: c3b72bba-51eb-4bae-0903-08dd04bec625 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|376014|366016|7416014|38350700014; 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charset="utf-8" Since is_dsc_possible is already checked just above, there's no need to check it again before filling out the DSC settings. Signed-off-by: Bhavin Sharma --- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/= amd/display/dc/dsc/dc_dsc.c index ebd5df1a36e8..85f6f8e43947 100644 --- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c @@ -1093,14 +1093,11 @@ static bool setup_dsc_config( if (!is_dsc_possible) goto done; =20 - // Final decission: can we do DSC or not? - if (is_dsc_possible) { - // Fill out the rest of DSC settings - dsc_cfg->block_pred_enable =3D dsc_common_caps.is_block_pred_supported; - dsc_cfg->linebuf_depth =3D dsc_common_caps.lb_bit_depth; - dsc_cfg->version_minor =3D (dsc_common_caps.dsc_version & 0xf0) >> 4; - dsc_cfg->is_dp =3D dsc_sink_caps->is_dp; - } + // Fill out the rest of DSC settings + dsc_cfg->block_pred_enable =3D dsc_common_caps.is_block_pred_supported; + dsc_cfg->linebuf_depth =3D dsc_common_caps.lb_bit_depth; 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charset="utf-8" The check for tools_size being non-zero is redundant as tools_size is explicitly set to a non-zero value (0x19000). Removing the if condition simplifies the code without altering functionality. Signed-off-by: Bhavin Sharma --- .../amd/pm/powerplay/smumgr/vega12_smumgr.c | 24 +++++++++---------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega12_smumgr.c b/driv= ers/gpu/drm/amd/pm/powerplay/smumgr/vega12_smumgr.c index b52ce135d84d..d3ff6a831ed5 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega12_smumgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega12_smumgr.c @@ -257,20 +257,18 @@ static int vega12_smu_init(struct pp_hwmgr *hwmgr) priv->smu_tables.entry[TABLE_WATERMARKS].size =3D sizeof(Watermarks_t); =20 tools_size =3D 0x19000; - if (tools_size) { - ret =3D amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, - tools_size, - PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - &priv->smu_tables.entry[TABLE_PMSTATUSLOG].handle, - &priv->smu_tables.entry[TABLE_PMSTATUSLOG].mc_addr, - &priv->smu_tables.entry[TABLE_PMSTATUSLOG].table); - if (ret) - goto err1; + ret =3D amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, + tools_size, + PAGE_SIZE, + AMDGPU_GEM_DOMAIN_VRAM, + &priv->smu_tables.entry[TABLE_PMSTATUSLOG].handle, + &priv->smu_tables.entry[TABLE_PMSTATUSLOG].mc_addr, + &priv->smu_tables.entry[TABLE_PMSTATUSLOG].table); + if (ret) + goto err1; =20 - priv->smu_tables.entry[TABLE_PMSTATUSLOG].version =3D 0x01; - priv->smu_tables.entry[TABLE_PMSTATUSLOG].size =3D tools_size; - } + priv->smu_tables.entry[TABLE_PMSTATUSLOG].version =3D 0x01; + priv->smu_tables.entry[TABLE_PMSTATUSLOG].size =3D tools_size; =20 /* allocate space for AVFS Fuse table */ ret =3D amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, --=20 2.43.0