From nobody Mon Feb 9 05:22:24 2026 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90D3B2B9B7 for ; Thu, 14 Nov 2024 14:12:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731593533; cv=none; b=lr1RXbTvDMfnOpMERL5nPAI5aS/kaKjXroDWTiDeeOBgjuVnpz0KlO0bjoopgGZRzQ/1BOSYqbBMibpjI35XacFGHKeNNvkZBqUoGYVJVBiOML6onb18/dpOHODslWE9SCh8RdOLBzfe1xOzrE96Hs++OQ0hKfo4nYhg61mWOqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731593533; c=relaxed/simple; bh=LwUmILZYGqBC1ty7aDqKeWmMyQdpmD7IZZIgQtO5IcI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=txmVg2GL5QXoEI0HdTapUvQ1u4l30zwUeHlTe8rwXZZVaNtGmjXlCWSZ0WrUiDZm7eMJulT6dXyt21BdAnyqc+88QYtZzddVSRbs9NJvcOP4E/p/AQBynXzvd+vk/gV65qLbmhSNQIKurJuqxdst/WnKfVc7gV70dZQO2dqpPmY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Xq2B432T7z21l8v; Thu, 14 Nov 2024 22:10:52 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 2DDBF1A016C; Thu, 14 Nov 2024 22:12:08 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Thu, 14 Nov 2024 22:12:07 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v9 2/4] arch_topology: Support SMT control for OF based system Date: Thu, 14 Nov 2024 22:11:25 +0800 Message-ID: <20241114141127.23232-3-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20241114141127.23232-1-yangyicong@huawei.com> References: <20241114141127.23232-1-yangyicong@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) Content-Type: text/plain; charset="utf-8" From: Yicong Yang On building the topology from the devicetree, we've already gotten the SMT thread number of each core. Update the largest SMT thread number and enable the SMT control by the end of topology parsing. The core's SMT control provides two interface to the users [1]: 1) enable/disable SMT by writing on/off 2) enable/disable SMT by writing thread number 1/max_thread_number If a system have more than one SMT thread number the 2) may not handle it well, since there're multiple thread numbers in the system and 2) only accept 1/max_thread_number. So issue a warning to notify the users if such system detected. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Signed-off-by: Yicong Yang --- drivers/base/arch_topology.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 3ebe77566788..31e0291ee660 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -506,6 +507,10 @@ core_initcall(free_raw_capacity); #endif =20 #if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) + +/* Maximum SMT thread number detected used to enable the SMT control */ +static unsigned int max_smt_thread_num; + /* * This function returns the logic cpu number of the node. * There are basically three kinds of return values: @@ -565,6 +570,17 @@ static int __init parse_core(struct device_node *core,= int package_id, i++; } while (1); =20 + /* + * If max_smt_thread_num has been initialized and doesn't match + * the thread number of this entry, then the system has + * heterogeneous SMT topology. + */ + if (max_smt_thread_num && max_smt_thread_num !=3D i) + pr_warn_once("Heterogeneous SMT topology is partly supported by SMT cont= rol\n"); + + if (max_smt_thread_num < i) + max_smt_thread_num =3D i; + cpu =3D get_cpu_for_node(core); if (cpu >=3D 0) { if (!leaf) { @@ -677,6 +693,14 @@ static int __init parse_socket(struct device_node *soc= ket) if (!has_socket) ret =3D parse_cluster(socket, 0, -1, 0); =20 + /* + * Notify the CPU framework of the SMT support. A thread number of 1 + * can be handled by the framework so we don't need to check + * max_smt_thread_num to see we support SMT or not. + */ + if (max_smt_thread_num) + cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num); + return ret; } =20 --=20 2.24.0