From nobody Sat Nov 23 04:53:51 2024 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 780F31799B for ; Thu, 14 Nov 2024 14:01:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.248.80.70 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731592864; cv=none; b=JwUHqNVTaj/wlh5QLvawIAEnXfDyJkdOhkkVQmUgiXdYd5ZsUhc0mP/bixKBOkP18ahk94JyRahmtVM9ciWGb6o9BXdUHk7o5yhxe5O5r8VrfSg/o/M7DBtB4aywDKmkt0BYWp1aqEvRqc2Fj8MP6dfNNJopiUBVamzyu5htB5E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731592864; c=relaxed/simple; bh=SrZ4Sljd9url0qeaurkyD0bI6USgZYsbUiA4Kym2zlA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pCEuJL/NEVY1G3AkVuv5UCosorhN2pCXqiEKT/eGR2hfHzYS/2Mao/d2JfAEyK8ahvwAQRAQUIBLbWfuoeVnG8oPomUeZh2FciTMYBWha+SND9v6XDSQFoJl5KTJrP77FqG8xZjLlzLXnTVOTD1SBpfm7gQf65/AQEEUD7y2khE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=andestech.com; spf=pass smtp.mailfrom=andestech.com; arc=none smtp.client-ip=60.248.80.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=andestech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=andestech.com Received: from mail.andestech.com (ATCPCS34.andestech.com [10.0.1.134]) by Atcsqr.andestech.com with ESMTPS id 4AEE0j1S035776 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Thu, 14 Nov 2024 22:00:45 +0800 (+08) (envelope-from cl634@andestech.com) Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS34.andestech.com (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 14 Nov 2024 22:00:46 +0800 From: CL Wang To: , , , , CC: , Subject: [PATCH V4 RESEND 2/3] dt-bindings: rtc: Add support for ATCRTC100 RTC Date: Thu, 14 Nov 2024 22:00:22 +0800 Message-ID: <20241114140023.3534980-3-cl634@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241114140023.3534980-1-cl634@andestech.com> References: <20241114140023.3534980-1-cl634@andestech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: ATCPCS33.andestech.com (10.0.1.100) To ATCPCS34.andestech.com (10.0.1.134) X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL: Atcsqr.andestech.com 4AEE0j1S035776 Content-Type: text/plain; charset="utf-8" Document Device Tree bindings for the Andes ATCRTC100 Real-Time Clock. Signed-off-by: CL Wang Reviewed-by: Conor Dooley --- Changes for v2: - First version of devicetree bindings for the Andes ATCRTC100 Real-Time C= lock. Changes for v3: - Used compatible as the filename. - Placed allOf after maintainers. - Replaced additionalProperties: false with unevaluatedProperties: false. - Added descriptions for interrupts. Changes for v4: - Removed wakeup-source attribute. --- .../bindings/rtc/andestech,atcrtc100.yaml | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/andestech,atcrtc1= 00.yaml diff --git a/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml= b/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml new file mode 100644 index 000000000000..ec0a736793c7 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/andestech,atcrtc100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andes ATCRTC100 Real-Time Clock + +maintainers: + - CL Wang + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - andestech,atcrtc100 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Periodic timekeeping interrupt + - description: RTC alarm interrupt + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + + rtc@f0300000 { + compatible =3D "andestech,atcrtc100"; + reg =3D <0xf0300000 0x100>; + interrupts =3D <1 IRQ_TYPE_LEVEL_HIGH>, <2 IRQ_TYPE_LEVEL_HIGH>; + }; --=20 2.34.1