From nobody Sat Nov 23 12:55:54 2024 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9E861F8F06 for ; Wed, 13 Nov 2024 09:49:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731491389; cv=none; b=H2p58CJUrIQDF/rxB5+QBO5xbsVVvGklYEni0+BCNhx4LIk+SkBWzzuakstNdwx5Rf+snatDxhcACEoCeWaayD2Oq7dfc8ZwDuk0F3EqdUnZbH2L+e3rQWFIdMwZDXUzFTOV1iR2YauJ8FV7CZuQ1N3f7BT3NFqbD5nZ+9NQt48= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731491389; c=relaxed/simple; bh=jq/HxwUks//QkKP3ZJZNN0GtGvXs1KXTbgyq1k0z2kU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ExxmiNlQ6QrmW0EgV7yng5jHs9qCVBBzqzLAyRPqO9HO8hxrPFQFYlENj0FC2yn42gtwKnG9l5b/MgoVJP0Axq+zt5akSv2AuBgleBf0dN9YIeNcpv6jKpv3KLtSh97hUN5YoPv+mEWCFiwT9HqxyrvLPSPKjttpsS2CuDatUww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pdPkcgsN; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pdPkcgsN" Received: by mail.gandi.net (Postfix) with ESMTPA id 63B31C0005; Wed, 13 Nov 2024 09:49:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1731491385; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ONE5RIDa+M5HrCVn5iTpaeEU6VZHpy9NTdUHLDL3hak=; b=pdPkcgsNZr9bGMJRCtJGG6Kp9JOneqiNmeOHO3VmnQwisps53nzoczoic5DMXpqBw+a02h TVI3z1jLaK56EReo3fgnPg7YN2kgc4wL/W/zRjuOpb427i+FiDpEmdRpH9h2E72co2OGN4 WtT1uTc4IHf0Xpn8ZsoWsRQBdWq3lmH4q8j7O3kcuJHzVrY3K1tEAsm6ND8nZQ+bBWc0R4 nFQe6sDNjmxjisT94Dq19Dra0FtCQwiakMODZXcKzNaDzidcK1rXOmFRxvTRfBO3uIEvsK 0R6sX/vctlZXoK6kMjTAAkGeLBJ54biRThG4GRxZUq8PZd0X7DMKqfXgOwMebA== From: Bastien Curutchet To: Santosh Shilimkar , Krzysztof Kozlowski , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Thomas Petazzoni , Herve Codina , Christopher Cordahi , Bastien Curutchet Subject: [PATCH v3 6/7] mtd: rawnand: davinci: Add clock resource Date: Wed, 13 Nov 2024 10:49:37 +0100 Message-ID: <20241113094938.44817-7-bastien.curutchet@bootlin.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241113094938.44817-1-bastien.curutchet@bootlin.com> References: <20241113094938.44817-1-bastien.curutchet@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: bastien.curutchet@bootlin.com Content-Type: text/plain; charset="utf-8" NAND controller has a reference clock inherited from the AEMIF (cf. Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt) This clock isn't used yet by the driver. Add a struct clock in the struct davinci_nand_info so it can be used to compute timings. Signed-off-by: Bastien Curutchet --- drivers/mtd/nand/raw/davinci_nand.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/dav= inci_nand.c index 3c0efbdd789e..563045c7ce08 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -10,6 +10,7 @@ * Dirk Behme */ =20 +#include #include #include #include @@ -117,6 +118,8 @@ struct davinci_nand_info { uint32_t mask_cle; =20 uint32_t core_chipsel; + + struct clk *clk; }; =20 static DEFINE_SPINLOCK(davinci_nand_lock); @@ -822,6 +825,10 @@ static int nand_davinci_probe(struct platform_device *= pdev) return -EADDRNOTAVAIL; } =20 + info->clk =3D devm_clk_get_enabled(&pdev->dev, "aemif"); + if (IS_ERR(info->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), "failed to get cloc= k"); + info->pdev =3D pdev; info->base =3D base; info->vaddr =3D vaddr; --=20 2.47.0