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Wysocki" , Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Connor Abbott , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2636; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=kMBG33vo/TOc40mVibFxMI9MiLmVj3cBO8HFx/GtxHk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnNMpTcwoQUrggwwkSabiH780z4dLQruvKpbpj5wzd 0mOSAUaJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZzTKUwAKCRB33NvayMhJ0X1cEA DGx+C8XLcffS07rX1a8GXBneILAAMZxTwADCFG8e6JtNnZJzswZECobDf5cWxYmi/C8Ij3dTMUoxi7 syAUirUd2CoEZktqnJb+IIrk5Nc5CVZgXadx9sOF4hhiugjGRx2pLAX7FdNgnmGv3OCB2V+xBnuqe0 edTVHyWGTgJNKU5NfaVtSn97nUP/yxiIEe5TQrPMusBP+Ie51VLWSWi8k8SMPAxqdl+W9GQCc7IWD+ p1FCczczdWc4unE6ESpnun7+8g4BW4BS3ljwI89F+RGflAbZGmC6637h3eDaWwWTuxUAcqKrrx9udh giHoGNA1gtQOgl1XdRCxtUuqI7UfraelG7A7W5MG4+q1pcrq1Q3Vf2ZClYB0RNmjRXCndvJnlqreIc qz5YdSE70DEOswjgK5ARYKB3qwAlbH4fd/WXjTdvRAevhrD4jTDRHgNewt4HB55tXMzX4NhusIPN59 3kytBZETZKY4s8bEMwqX9wbtqcJAfpo9zXeUbLPJhc86YcTB1nRVvOJhBqIYraHR3874gLux8rh+X/ t0Oy9Dl4fFkrljtnQLwsPXKBgHbsUVUreMVldOqRouxm9BiHZS9fd3v6IPMeRzVVZNpZuKb5NrM3tC ef+s5JR48ONwzDM4frKGp4/QvFJACLv631/+MUQzN+7/rnZ51AIXn68bUbcw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Each GPU OPP requires a specific peak DDR bandwidth, let's add those to each OPP and also the related interconnect path. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 01ac3769ffa62ffb83c5c51878e2823e1982eb67..331c5140c16bf013190d6da136c= 0920009d2646b 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2636,6 +2636,9 @@ gpu: gpu@3d00000 { qcom,gmu =3D <&gmu>; #cooling-cells =3D <2>; =20 + interconnects =3D <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names =3D "gfx-mem"; + status =3D "disabled"; =20 zap-shader { @@ -2649,56 +2652,67 @@ gpu_opp_table: opp-table { opp-231000000 { opp-hz =3D /bits/ 64 <231000000>; opp-level =3D ; + opp-peak-kBps =3D <2136718>; }; =20 opp-310000000 { opp-hz =3D /bits/ 64 <310000000>; opp-level =3D ; + opp-peak-kBps =3D <6074218>; }; =20 opp-366000000 { opp-hz =3D /bits/ 64 <366000000>; opp-level =3D ; + opp-peak-kBps =3D <6074218>; }; =20 opp-422000000 { opp-hz =3D /bits/ 64 <422000000>; opp-level =3D ; + opp-peak-kBps =3D <8171875>; }; =20 opp-500000000 { opp-hz =3D /bits/ 64 <500000000>; opp-level =3D ; + opp-peak-kBps =3D <8171875>; }; =20 opp-578000000 { opp-hz =3D /bits/ 64 <578000000>; opp-level =3D ; + opp-peak-kBps =3D <12449218>; }; =20 opp-629000000 { opp-hz =3D /bits/ 64 <629000000>; opp-level =3D ; + opp-peak-kBps =3D <12449218>; }; =20 opp-680000000 { opp-hz =3D /bits/ 64 <680000000>; opp-level =3D ; + opp-peak-kBps =3D <16500000>; }; =20 opp-720000000 { opp-hz =3D /bits/ 64 <720000000>; opp-level =3D ; + opp-peak-kBps =3D <16500000>; }; =20 opp-770000000 { opp-hz =3D /bits/ 64 <770000000>; opp-level =3D ; + opp-peak-kBps =3D <16500000>; }; =20 opp-834000000 { opp-hz =3D /bits/ 64 <834000000>; opp-level =3D ; + opp-peak-kBps =3D <16500000>; }; }; }; --=20 2.34.1