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([145.224.90.214]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432bbf436ffsm142270955e9.44.2024.11.12.02.38.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 02:38:09 -0800 (PST) From: James Clark To: suzuki.poulose@arm.com, oliver.upton@linux.dev, coresight@lists.linaro.org, kvmarm@lists.linux.dev Cc: James Clark , Marc Zyngier , Joey Gouly , Zenghui Yu , Catalin Marinas , Will Deacon , Mike Leach , Alexander Shishkin , Mark Rutland , Mark Brown , Anshuman Khandual , Shiqi Liu , James Morse , Fuad Tabba , Raghavendra Rao Ananta , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 05/12] KVM: arm64: Move SPE and TRBE flags to host data Date: Tue, 12 Nov 2024 10:37:04 +0000 Message-Id: <20241112103717.589952-6-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241112103717.589952-1-james.clark@linaro.org> References: <20241112103717.589952-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" They don't change, are per-CPU and don't need to be on the vcpu, so initialize them one time only. Another benefit is this is done before the host is deprivileged so can be trusted by pKVM. Rename SAVE to HAS which is slightly more accurate because saving only happens when it exists _and_ is enabled. Signed-off-by: James Clark --- arch/arm64/include/asm/kvm_host.h | 21 +++++++----- arch/arm64/kvm/arm.c | 3 -- arch/arm64/kvm/debug.c | 52 +++++++++++------------------- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 8 ++--- 4 files changed, 36 insertions(+), 48 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm= _host.h index 34aa59f498c4..61ff34e1ffef 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -638,6 +638,11 @@ struct kvm_host_data { FP_STATE_GUEST_OWNED, } fp_owner; =20 + struct { + /* Host CPU features, set at init */ + u8 feats; + } flags; + /* * host_debug_state contains the host registers which are * saved and restored during world switches. @@ -908,10 +913,6 @@ struct kvm_vcpu_arch { #define EXCEPT_AA64_EL2_SERR __vcpu_except_flags(7) /* Guest debug is live */ #define DEBUG_DIRTY __kvm_single_flag(iflags, BIT(4)) -/* Save SPE context if active */ -#define DEBUG_STATE_SAVE_SPE __kvm_single_flag(iflags, BIT(5)) -/* Save TRBE context if active */ -#define DEBUG_STATE_SAVE_TRBE __kvm_single_flag(iflags, BIT(6)) =20 /* SVE enabled for host EL0 */ #define HOST_SVE_ENABLED __kvm_single_flag(sflags, BIT(0)) @@ -930,6 +931,14 @@ struct kvm_vcpu_arch { /* WFI instruction trapped */ #define IN_WFI __kvm_single_flag(sflags, BIT(7)) =20 +#define host_data_get_flag(...) __kvm_get_flag((*host_data_ptr(flags)), __= VA_ARGS__) +#define host_data_set_flag(...) __kvm_set_flag((*host_data_ptr(flags)), __= VA_ARGS__) +#define host_data_clear_flag(...) __kvm_clear_flag((*host_data_ptr(flags))= , __VA_ARGS__) + +/* Save SPE context if active */ +#define HOST_FEAT_HAS_SPE __kvm_single_flag(feats, BIT(0)) +/* Save TRBE context if active */ +#define HOST_FEAT_HAS_TRBE __kvm_single_flag(feats, BIT(1)) =20 /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ @@ -1367,10 +1376,6 @@ static inline bool kvm_pmu_counter_deferred(struct p= erf_event_attr *attr) return (!has_vhe() && attr->exclude_host); } =20 -/* Flags for host debug state */ -void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); -void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); - #ifdef CONFIG_KVM void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr); void kvm_clr_pmu_events(u64 clr); diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index a102c3aebdbc..2a54baca3144 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -617,15 +617,12 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cp= u) =20 vcpu_set_pauth_traps(vcpu); =20 - kvm_arch_vcpu_load_debug_state_flags(vcpu); - if (!cpumask_test_cpu(cpu, vcpu->kvm->arch.supported_cpus)) vcpu_set_on_unsupported_cpu(vcpu); } =20 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) { - kvm_arch_vcpu_put_debug_state_flags(vcpu); kvm_arch_vcpu_put_fp(vcpu); if (has_vhe()) kvm_vcpu_put_vhe(vcpu); diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c index ce8886122ed3..cf5558806687 100644 --- a/arch/arm64/kvm/debug.c +++ b/arch/arm64/kvm/debug.c @@ -68,16 +68,31 @@ static void restore_guest_debug_regs(struct kvm_vcpu *v= cpu) /** * kvm_arm_init_debug - grab what we need for debug * - * Currently the sole task of this function is to retrieve the initial - * value of mdcr_el2 so we can preserve MDCR_EL2.HPMN which has - * presumably been set-up by some knowledgeable bootcode. - * * It is called once per-cpu during CPU hyp initialisation. */ =20 void kvm_arm_init_debug(void) { + u64 dfr0 =3D read_sysreg(id_aa64dfr0_el1); + + /* + * Retrieve the initial value of mdcr_el2 so we can preserve MDCR_EL2.HPM= N which + * has presumably been set-up by some knowledgeable bootcode. + */ __this_cpu_write(mdcr_el2, kvm_call_hyp_ret(__kvm_get_mdcr_el2)); + + /* + * If SPE is present on this CPU and is available at current EL, + * we may need to check if the host state needs to be saved. + */ + if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHI= FT) && + !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(PMBIDR_EL1_P_SHIFT))) + host_data_set_flag(HOST_FEAT_HAS_SPE); + + /* Check if we have TRBE implemented and available at the host */ + if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffe= r_SHIFT) && + !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P)) + host_data_set_flag(HOST_FEAT_HAS_TRBE); } =20 /** @@ -314,32 +329,3 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) } } } - -void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu) -{ - u64 dfr0; - - /* For VHE, there is nothing to do */ - if (has_vhe()) - return; - - dfr0 =3D read_sysreg(id_aa64dfr0_el1); - /* - * If SPE is present on this CPU and is available at current EL, - * we may need to check if the host state needs to be saved. - */ - if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHI= FT) && - !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(PMBIDR_EL1_P_SHIFT))) - vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_SPE); - - /* Check if we have TRBE implemented and available at the host */ - if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffe= r_SHIFT) && - !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P)) - vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE); -} - -void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu) -{ - vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE); - vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE); -} diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/d= ebug-sr.c index 53efda0235cf..89f44a51a172 100644 --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c @@ -82,10 +82,10 @@ static void __debug_restore_trace(u64 trfcr_el1) void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) { /* Disable and flush SPE data generation */ - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE)) + if (host_data_get_flag(HOST_FEAT_HAS_SPE)) __debug_save_spe(host_data_ptr(host_debug_state.pmscr_el1)); /* Disable and flush Self-Hosted Trace generation */ - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE)) + if (host_data_get_flag(HOST_FEAT_HAS_TRBE)) __debug_save_trace(host_data_ptr(host_debug_state.trfcr_el1)); } =20 @@ -96,9 +96,9 @@ void __debug_switch_to_guest(struct kvm_vcpu *vcpu) =20 void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu) { - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE)) + if (host_data_get_flag(HOST_FEAT_HAS_SPE)) __debug_restore_spe(*host_data_ptr(host_debug_state.pmscr_el1)); - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE)) + if (host_data_get_flag(HOST_FEAT_HAS_TRBE)) __debug_restore_trace(*host_data_ptr(host_debug_state.trfcr_el1)); } =20 --=20 2.34.1