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charset="utf-8" The PCF2127, PCF2129, and PCA2129 RTCs have the battery switch-over function enabled by default. However, the newer PCF2131 RTC has the opposite default behavior, requiring explicit enablement for battery backup. Add support for the `nxp,battery-backed` device tree property to enable bat= tery switch-over in standard mode for the rtc-pcf2127 driver. If this property i= s set and no battery switch-over mode is already configured, the driver will enab= le standard mode; otherwise, existing configurations remain unchanged. Signed-off-by: Philipp Rosenberger --- drivers/rtc/rtc-pcf2127.c | 76 +++++++++++++++++++++++++++++++-------- 1 file changed, 61 insertions(+), 15 deletions(-) diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 9c04c4e1a49c..c80e31fec134 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c @@ -48,6 +48,7 @@ #define PCF2127_BIT_CTRL3_BLF BIT(2) #define PCF2127_BIT_CTRL3_BF BIT(3) #define PCF2127_BIT_CTRL3_BTSE BIT(4) +#define PCF2127_BIT_CTRL3_PWRMNG_MASK (BIT(5) | BIT(6) | BIT(7)) /* Time and date registers */ #define PCF2127_REG_TIME_BASE 0x03 #define PCF2127_BIT_SC_OSF BIT(7) @@ -529,6 +530,64 @@ static int pcf2127_watchdog_init(struct device *dev, s= truct pcf2127 *pcf2127) return devm_watchdog_register_device(dev, &pcf2127->wdd); } =20 +static int pcf2127_battery_init(struct device *dev, struct pcf2127 *pcf212= 7) +{ + unsigned int ctrl3; + unsigned int pwrmng; + int ret; + + /* + * Disable battery low/switch-over timestamp and interrupts. + * Clear battery interrupt flags which can block new trigger events. + * Note: This is the default chip behaviour but added to ensure + * correct tamper timestamp and interrupt function. + */ + ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, + PCF2127_BIT_CTRL3_BTSE | + PCF2127_BIT_CTRL3_BIE | + PCF2127_BIT_CTRL3_BLIE, 0); + if (ret) { + dev_err(dev, "%s: interrupt config (ctrl3) failed\n", + __func__); + return ret; + } + + if (!device_property_read_bool(dev, "nxp,battery-backed")) + return 0; + + ret =3D regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &ctrl3); + if (ret) { + dev_err(dev, "%s: read ctrl3 faild\n", __func__); + return ret; + } + + /* + * Don't touch the PWRNMNG bits if any kind of battery switch-over is + * enabled. The PWRMNG values 0-2 use the battery switch-over standard + * mode, while values 3-5 use direct switching mode. + * Only values 6 and 7 have the battery switch-over function disabled. + */ + pwrmng =3D (PCF2127_BIT_CTRL3_PWRMNG_MASK & ctrl3) >> 5; + if (pwrmng < 6) + return 0; + + /* + * Enable battery switch-over function in standard mode. + * Enable battery low detection function. + * Enable extra power fail detection function (PCF2127 only). + */ + ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, + PCF2127_BIT_CTRL3_PWRMNG_MASK, 0); + if (ret) { + dev_err(dev, + "%s: battery switch-over config (ctrl3) failed\n", + __func__); + return ret; + } + + return 0; +} + /* Alarm */ static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *a= lrm) { @@ -1224,22 +1283,9 @@ static int pcf2127_probe(struct device *dev, struct = regmap *regmap, } =20 pcf2127_watchdog_init(dev, pcf2127); - - /* - * Disable battery low/switch-over timestamp and interrupts. - * Clear battery interrupt flags which can block new trigger events. - * Note: This is the default chip behaviour but added to ensure - * correct tamper timestamp and interrupt function. - */ - ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, - PCF2127_BIT_CTRL3_BTSE | - PCF2127_BIT_CTRL3_BIE | - PCF2127_BIT_CTRL3_BLIE, 0); - if (ret) { - dev_err(dev, "%s: interrupt config (ctrl3) failed\n", - __func__); + ret =3D pcf2127_battery_init(dev, pcf2127); + if (ret < 0) return ret; - } =20 /* * Enable timestamp functions 1 to 4. --=20 2.39.5