From nobody Wed Nov 27 14:14:24 2024 Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC301178368; Mon, 11 Nov 2024 10:28:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=52.119.213.154 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731320888; cv=none; b=XUpDQ5GU1bvcawIQ+iFWKgekX0CltWU/4es4Mx7Fqup7nXppwUXIRnloTqVQ/Hqwb8Ciz9WzEmYoQoUyQ6OnGAFIh5/4JMIAPlKy3ylsW0SCwdQNQr2lHYCtEJspxuxYHLmE1pSkaCAqq0oLjeHTBw2ccuAP8e5Y6giiQ+8y6Mc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731320888; c=relaxed/simple; bh=GD5IsYBKTiz4Z1QzF8LVQyJSN0feigK4eOc9wytQvIo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=iMqejLhZrWszqo93gEkdnLdJjoWfEn2ptG7sVyezHDfjA0T8lPiGOKeEC8v6tmCRhJcXhMH/8h48nuMlEVhUi24b1aJ7oInJw0YEDDM+wVBn8UQtZWZPBKrWMLdlAQJKykSxi7z/K9hiJOMgwnTSXpGciR/MZ63gNaURsy8BpQ8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com; spf=pass smtp.mailfrom=amazon.co.uk; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b=OeMbE1lE; arc=none smtp.client-ip=52.119.213.154 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amazon.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amazon.co.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amazon.com header.i=@amazon.com header.b="OeMbE1lE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1731320887; x=1762856887; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5Q7+V4G2MQKE1pau0JUgvLtcM7o6WBQ/lfgj7RvUT2U=; b=OeMbE1lEtWsOnBq2PhRBeh2NEFypVuKG8a+0I8EvqGiD9DGoCxDGM7xe slA8zJ4jLb4YzphW4KEhBEoFol/VsAjgJhq/uLTEKfxd/6vXH5Gityrin kISILl6OFWyF4VlAalkYnNMma4nH5/Xfz+aTO8ulxLLOcbuth/xo+bEpC 8=; X-IronPort-AV: E=Sophos;i="6.12,144,1728950400"; d="scan'208";a="246306638" Received: from iad6-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.124.125.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2024 10:28:04 +0000 Received: from EX19MTAUEB001.ant.amazon.com [10.0.29.78:55436] by smtpin.naws.us-east-1.prod.farcaster.email.amazon.dev [10.0.51.204:2525] with esmtp (Farcaster) id c7d76f09-9c9a-4297-9403-479df8ae7196; Mon, 11 Nov 2024 10:28:04 +0000 (UTC) X-Farcaster-Flow-ID: c7d76f09-9c9a-4297-9403-479df8ae7196 Received: from EX19D008UEC003.ant.amazon.com (10.252.135.194) by EX19MTAUEB001.ant.amazon.com (10.252.135.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Mon, 11 Nov 2024 10:28:03 +0000 Received: from EX19MTAUWC002.ant.amazon.com (10.250.64.143) by EX19D008UEC003.ant.amazon.com (10.252.135.194) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Mon, 11 Nov 2024 10:28:03 +0000 Received: from email-imr-corp-prod-iad-all-1b-3ae3de11.us-east-1.amazon.com (10.25.36.210) by mail-relay.amazon.com (10.250.64.149) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34 via Frontend Transport; Mon, 11 Nov 2024 10:28:03 +0000 Received: from dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com (dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com [10.253.74.38]) by email-imr-corp-prod-iad-all-1b-3ae3de11.us-east-1.amazon.com (Postfix) with ESMTPS id 8804CA065E; Mon, 11 Nov 2024 10:28:01 +0000 (UTC) From: Ivan Orlov To: , , , , , , CC: Ivan Orlov , , , , , , , Subject: [PATCH v2 1/6] KVM: x86: Add function for vectoring error generation Date: Mon, 11 Nov 2024 10:27:44 +0000 Message-ID: <20241111102749.82761-2-iorlov@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20241111102749.82761-1-iorlov@amazon.com> References: <20241111102749.82761-1-iorlov@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extract VMX code for unhandleable VM-Exit during vectoring into vendor-agnostic function so that boiler-plate code can be shared by SVM. Report an actual GPA for EPT misconfig or invalid GPA for any other exit code in internal.data[3]. Signed-off-by: Ivan Orlov --- V1 -> V2: - Return GPA for any exit reason, using reported GPA when it is valid or INVALID_GPA otherwise. - Rename the error preparation function - Fix indentation arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/vmx/vmx.c | 16 ++++------------ arch/x86/kvm/x86.c | 22 ++++++++++++++++++++++ 3 files changed, 28 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 6d9f763a7bb9..eb413079b7c6 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -2060,6 +2060,8 @@ void __kvm_prepare_emulation_failure_exit(struct kvm_= vcpu *vcpu, u64 *data, u8 ndata); void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); =20 +void kvm_prepare_event_vectoring_exit(struct kvm_vcpu *vcpu, gpa_t gpa); + void kvm_enable_efer_bits(u64); bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index f6900bec4874..f92740e7e107 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -6452,6 +6452,7 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, f= astpath_t exit_fastpath) union vmx_exit_reason exit_reason =3D vmx->exit_reason; u32 vectoring_info =3D vmx->idt_vectoring_info; u16 exit_handler_index; + gpa_t gpa; =20 /* * Flush logged GPAs PML buffer, this will make dirty_bitmap more @@ -6550,19 +6551,10 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu,= fastpath_t exit_fastpath) exit_reason.basic !=3D EXIT_REASON_APIC_ACCESS && exit_reason.basic !=3D EXIT_REASON_TASK_SWITCH && exit_reason.basic !=3D EXIT_REASON_NOTIFY)) { - int ndata =3D 3; + gpa =3D exit_reason.basic =3D=3D EXIT_REASON_EPT_MISCONFIG + ? vmcs_read64(GUEST_PHYSICAL_ADDRESS) : INVALID_GPA; =20 - vcpu->run->exit_reason =3D KVM_EXIT_INTERNAL_ERROR; - vcpu->run->internal.suberror =3D KVM_INTERNAL_ERROR_DELIVERY_EV; - vcpu->run->internal.data[0] =3D vectoring_info; - vcpu->run->internal.data[1] =3D exit_reason.full; - vcpu->run->internal.data[2] =3D vmx_get_exit_qual(vcpu); - if (exit_reason.basic =3D=3D EXIT_REASON_EPT_MISCONFIG) { - vcpu->run->internal.data[ndata++] =3D - vmcs_read64(GUEST_PHYSICAL_ADDRESS); - } - vcpu->run->internal.data[ndata++] =3D vcpu->arch.last_vmentry_cpu; - vcpu->run->internal.ndata =3D ndata; + kvm_prepare_event_vectoring_exit(vcpu, gpa); return 0; } =20 diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 83fe0a78146f..e338d583f48f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -8828,6 +8828,28 @@ void kvm_prepare_emulation_failure_exit(struct kvm_v= cpu *vcpu) } EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit); =20 +void kvm_prepare_event_vectoring_exit(struct kvm_vcpu *vcpu, gpa_t gpa) +{ + u32 reason, intr_info, error_code; + struct kvm_run *run =3D vcpu->run; + u64 info1, info2; + int ndata =3D 0; + + kvm_x86_call(get_exit_info)(vcpu, &reason, &info1, &info2, + &intr_info, &error_code); + + run->internal.data[ndata++] =3D info2; + run->internal.data[ndata++] =3D reason; + run->internal.data[ndata++] =3D info1; + run->internal.data[ndata++] =3D (u64)gpa; + run->internal.data[ndata++] =3D vcpu->arch.last_vmentry_cpu; + + run->exit_reason =3D KVM_EXIT_INTERNAL_ERROR; + run->internal.suberror =3D KVM_INTERNAL_ERROR_DELIVERY_EV; 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Mon, 11 Nov 2024 10:28:05 +0000 Received: from EX19MTAUWB002.ant.amazon.com (10.250.64.231) by EX19D008UEA004.ant.amazon.com (10.252.134.191) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34; Mon, 11 Nov 2024 10:28:04 +0000 Received: from email-imr-corp-prod-iad-all-1b-3ae3de11.us-east-1.amazon.com (10.25.36.214) by mail-relay.amazon.com (10.250.64.228) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.1258.34 via Frontend Transport; Mon, 11 Nov 2024 10:28:04 +0000 Received: from dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com (dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com [10.253.74.38]) by email-imr-corp-prod-iad-all-1b-3ae3de11.us-east-1.amazon.com (Postfix) with ESMTPS id E159AA04F9; Mon, 11 Nov 2024 10:28:02 +0000 (UTC) From: Ivan Orlov To: , , , , , , CC: Ivan Orlov , , , , , , , Subject: [PATCH v2 2/6] KVM: x86: Add emulation status for vectoring during MMIO Date: Mon, 11 Nov 2024 10:27:45 +0000 Message-ID: <20241111102749.82761-3-iorlov@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20241111102749.82761-1-iorlov@amazon.com> References: <20241111102749.82761-1-iorlov@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add emulation status for vectoring error due to MMIO. Such a situation can occur if guest sets the IDT descriptor base to point to MMIO region, and triggers an exception after that. Exit to userspace with event delivery error when MMIO happens during vectoring. Signed-off-by: Ivan Orlov --- V1 -> V2: - This patch wasn't included in V1. arch/x86/kvm/kvm_emulate.h | 2 ++ arch/x86/kvm/x86.c | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/arch/x86/kvm/kvm_emulate.h b/arch/x86/kvm/kvm_emulate.h index 55a18e2f2dcd..f856bc979bdb 100644 --- a/arch/x86/kvm/kvm_emulate.h +++ b/arch/x86/kvm/kvm_emulate.h @@ -88,6 +88,8 @@ struct x86_instruction_info { #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ +/* Vectroing requires MMIO and can't be emulated */ +#define X86EMUL_UNHANDLEABLE_VECTORING_IO 7 =20 /* x86-specific emulation flags */ #define X86EMUL_F_WRITE BIT(0) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index e338d583f48f..4ba371040685 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -9122,6 +9122,11 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, g= pa_t cr2_or_gpa, if (r =3D=3D X86EMUL_RETRY_INSTR || r =3D=3D X86EMUL_PROPAGATE_FAULT) return 1; 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charset="utf-8" Move unhandleable vmexit due to MMIO during vectoring error detection into check_emulate_instruction. Implement a function which checks if emul_type indicates MMIO so it can be used for both VMX and SVM. Fix the comment about EMULTYPE_PF as this flag doesn't necessarily mean MMIO anymore: it can also be set due to the write protection violation. Signed-off-by: Ivan Orlov --- V1 -> V2: - Detect the unhandleable vectoring error in vmx_check_emulate_instruction instead of handling it in the common MMU code (which is specific for cached MMIO) arch/x86/include/asm/kvm_host.h | 10 ++++++++-- arch/x86/kvm/vmx/vmx.c | 25 ++++++++++++------------- 2 files changed, 20 insertions(+), 15 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index eb413079b7c6..3de9702a9135 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -2017,8 +2017,8 @@ u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); * VMware backdoor emulation handles select instructions * and reinjects the #GP for all other cases. * - * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in = which - * case the CR2/GPA value pass on the stack is valid. + * EMULTYPE_PF - Set when an intercepted #PF triggers the emulation, in wh= ich case + * the CR2/GPA value pass on the stack is valid. * * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update inter= ruptibility * state and inject single-step #DBs after skipping @@ -2053,6 +2053,12 @@ u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7) #define EMULTYPE_WRITE_PF_TO_SP (1 << 8) =20 +static inline bool kvm_is_emul_type_mmio(int emul_type) +{ + return (emul_type & EMULTYPE_PF) && + !(emul_type & EMULTYPE_WRITE_PF_TO_SP); +} + int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, void *insn, int insn_len); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index f92740e7e107..a10f35d9704b 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1693,6 +1693,8 @@ static int vmx_rtit_ctl_check(struct kvm_vcpu *vcpu, = u64 data) int vmx_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type, void *insn, int insn_len) { + bool is_vect; + /* * Emulation of instructions in SGX enclaves is impossible as RIP does * not point at the failing instruction, and even if it did, the code @@ -1704,6 +1706,13 @@ int vmx_check_emulate_instruction(struct kvm_vcpu *v= cpu, int emul_type, kvm_queue_exception(vcpu, UD_VECTOR); return X86EMUL_PROPAGATE_FAULT; } + + is_vect =3D to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK; + + /* Emulation is not possible when MMIO happens during event vectoring. */ + if (kvm_is_emul_type_mmio(emul_type) && is_vect) + return X86EMUL_UNHANDLEABLE_VECTORING_IO; + return X86EMUL_CONTINUE; } =20 @@ -6452,7 +6461,6 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, f= astpath_t exit_fastpath) union vmx_exit_reason exit_reason =3D vmx->exit_reason; u32 vectoring_info =3D vmx->idt_vectoring_info; u16 exit_handler_index; - gpa_t gpa; =20 /* * Flush logged GPAs PML buffer, this will make dirty_bitmap more @@ -6537,24 +6545,15 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu,= fastpath_t exit_fastpath) return 0; } =20 - /* - * Note: - * Do not try to fix EXIT_REASON_EPT_MISCONFIG if it caused by - * delivery event since it indicates guest is accessing MMIO. - * The vm-exit can be triggered again after return to guest that - * will cause infinite loop. - */ if ((vectoring_info & VECTORING_INFO_VALID_MASK) && (exit_reason.basic !=3D EXIT_REASON_EXCEPTION_NMI && exit_reason.basic !=3D EXIT_REASON_EPT_VIOLATION && exit_reason.basic !=3D EXIT_REASON_PML_FULL && exit_reason.basic !=3D EXIT_REASON_APIC_ACCESS && exit_reason.basic !=3D EXIT_REASON_TASK_SWITCH && - exit_reason.basic !=3D EXIT_REASON_NOTIFY)) { - gpa =3D exit_reason.basic =3D=3D EXIT_REASON_EPT_MISCONFIG - ? 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Signed-off-by: Ivan Orlov --- V1 -> V2: - Detect the unhandleable vectoring error in svm_check_emulate_instruction instead of handling it in the common MMU code (which is specific for cached MMIO) arch/x86/kvm/svm/svm.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index c1e29307826b..b69f0f98c576 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -4797,9 +4797,16 @@ static void svm_enable_smi_window(struct kvm_vcpu *v= cpu) static int svm_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_t= ype, void *insn, int insn_len) { - bool smep, smap, is_user; + bool smep, smap, is_user, is_vect; u64 error_code; =20 + is_vect =3D to_svm(vcpu)->vmcb->control.exit_int_info & + SVM_EXITINTINFO_TYPE_MASK; + + /* Emulation is not possible when MMIO happens during event vectoring. */ + if (kvm_is_emul_type_mmio(emul_type) && is_vect) + return X86EMUL_UNHANDLEABLE_VECTORING_IO; + /* Emulation is always possible when KVM has access to all guest state. */ if (!sev_guest(vcpu->kvm)) return X86EMUL_CONTINUE; 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charset="utf-8" Implement a function for setting the IDT descriptor from the guest code. Replace the existing lidt occurrences with calls to this function as `lidt` is used in multiple places. Signed-off-by: Ivan Orlov --- V1 -> V2: - This patch wasn't included in V1. tools/testing/selftests/kvm/include/x86_64/processor.h | 5 +++++ tools/testing/selftests/kvm/set_memory_region_test.c | 2 +- tools/testing/selftests/kvm/x86_64/sev_smoke_test.c | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools= /testing/selftests/kvm/include/x86_64/processor.h index e247f99e0473..1a60c99b5833 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -571,6 +571,11 @@ static inline void set_cr4(uint64_t val) __asm__ __volatile__("mov %0, %%cr4" : : "r" (val) : "memory"); } =20 +static inline void set_idt(const struct desc_ptr *idt_desc) +{ + __asm__ __volatile__("lidt %0"::"m"(*idt_desc)); +} + static inline u64 xgetbv(u32 index) { u32 eax, edx; diff --git a/tools/testing/selftests/kvm/set_memory_region_test.c b/tools/t= esting/selftests/kvm/set_memory_region_test.c index a8267628e9ed..a1c53cc854a5 100644 --- a/tools/testing/selftests/kvm/set_memory_region_test.c +++ b/tools/testing/selftests/kvm/set_memory_region_test.c @@ -235,7 +235,7 @@ static void guest_code_delete_memory_region(void) * in the guest will never succeed, and so isn't an option. */ memset(&idt, 0, sizeof(idt)); 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Mon, 11 Nov 2024 10:28:10 +0000 Received: from dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com (dev-dsk-iorlov-1b-d2eae488.eu-west-1.amazon.com [10.253.74.38]) by email-imr-corp-prod-iad-all-1b-3ae3de11.us-east-1.amazon.com (Postfix) with ESMTPS id 5DF85A0227; Mon, 11 Nov 2024 10:28:08 +0000 (UTC) From: Ivan Orlov To: , , , , , , CC: Ivan Orlov , , , , , , , Subject: [PATCH v2 6/6] selftests: KVM: Add test case for MMIO during vectoring Date: Mon, 11 Nov 2024 10:27:49 +0000 Message-ID: <20241111102749.82761-7-iorlov@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20241111102749.82761-1-iorlov@amazon.com> References: <20241111102749.82761-1-iorlov@amazon.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the 'set_memory_region_test' with a test case which covers the MMIO during vectoring error handling. The test case 1) Sets an IDT descriptor base to point to an MMIO address 2) Generates a #GP in the guest 3) Verifies that we got a correct exit reason and suberror code 4) Verifies that we got a corrent reported GPA in internal.data[3] Also, add a definition of non-canonical address to processor.h Signed-off-by: Ivan Orlov --- V1 -> V2: - Get rid of pronouns, redundant comments and incorrect wording - Define noncanonical address in processor.h - Fix indentation and wrap lines at 80 columns .../selftests/kvm/include/x86_64/processor.h | 2 + .../selftests/kvm/set_memory_region_test.c | 51 +++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools= /testing/selftests/kvm/include/x86_64/processor.h index 1a60c99b5833..997df5003edb 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -1165,6 +1165,8 @@ void vm_install_exception_handler(struct kvm_vm *vm, = int vector, /* If a toddler were to say "abracadabra". */ #define KVM_EXCEPTION_MAGIC 0xabacadabaULL =20 +#define NONCANONICAL 0xaaaaaaaaaaaaaaaaull + /* * KVM selftest exception fixup uses registers to coordinate with the exce= ption * handler, versus the kernel's in-memory tables and KVM-Unit-Tests's in-m= emory diff --git a/tools/testing/selftests/kvm/set_memory_region_test.c b/tools/t= esting/selftests/kvm/set_memory_region_test.c index a1c53cc854a5..d65a9f20aa1a 100644 --- a/tools/testing/selftests/kvm/set_memory_region_test.c +++ b/tools/testing/selftests/kvm/set_memory_region_test.c @@ -553,6 +553,56 @@ static void test_add_overlapping_private_memory_region= s(void) close(memfd); kvm_vm_free(vm); } + +static void guest_code_mmio_during_vectoring(void) +{ + const struct desc_ptr idt_desc =3D { + .address =3D MEM_REGION_GPA, + .size =3D 0xFFF, + }; + + set_idt(&idt_desc); + + /* Generate a #GP by dereferencing a non-canonical address */ + *((uint8_t *)NONCANONICAL) =3D 0x1; + + GUEST_ASSERT(0); +} + +/* + * This test points the IDT descriptor base to an MMIO address. It should = cause + * a KVM internal error when an event occurs in the guest. + */ +static void test_mmio_during_vectoring(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_run *run; + struct kvm_vm *vm; + u64 expected_gpa; + + pr_info("Testing MMIO during vectoring error handling\n"); + + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code_mmio_during_vectoring); + virt_map(vm, MEM_REGION_GPA, MEM_REGION_GPA, 1); + + run =3D vcpu->run; + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_INTERNAL_ERROR); + TEST_ASSERT(run->internal.suberror =3D=3D KVM_INTERNAL_ERROR_DELIVERY_EV, + "Unexpected suberror =3D %d", vcpu->run->internal.suberror); + TEST_ASSERT(run->internal.ndata !=3D 4, "Unexpected internal error data a= rray size =3D %d", + run->internal.ndata); + + /* The reported GPA should be IDT base + offset of the GP vector */ + expected_gpa =3D MEM_REGION_GPA + GP_VECTOR * sizeof(struct idt_entry); + + TEST_ASSERT(run->internal.data[3] =3D=3D expected_gpa, + "Unexpected GPA =3D %llx (expected %lx)", + vcpu->run->internal.data[3], expected_gpa); + + kvm_vm_free(vm); +} #endif =20 int main(int argc, char *argv[]) @@ -568,6 +618,7 @@ int main(int argc, char *argv[]) * KVM_RUN fails with ENOEXEC or EFAULT. */ test_zero_memory_regions(); + test_mmio_during_vectoring(); #endif =20 test_invalid_memory_region_flags(); --=20 2.43.0