From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8406654279; Mon, 11 Nov 2024 01:30:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288649; cv=none; b=D2s8YP4+35i2H2NuTBM0K7IewDo/AhT6mIiPPLEa4685kbdckAeCQvFSRRmXQnmdLFUYEjQnQ8nc6Rp+WgRKsQ3iLoww/Ayg6qmnhloRRF9LfBsP83DdLFGeIs8DohocgkeQr4/9uSRgkO81hsRWuc5LEYuTc+5M/YyWODHr/24= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288649; c=relaxed/simple; bh=WYeKIyoUVK3KUUHWBSgGcTi/jGmz4oWmd/izzeKpOTg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JiZFgLk8ljQYDhyqWdegzyDkl/dOyYBt4PYh2Vk8qXLrqX1B9R+CYG2O9N2ShBa9L9KTZiPwQHzHaKoGPh2XiQX/ZRKWpTpvzXY0CGfmmHw4KACm9NarHHh3L9dBc2wTpthiodSd8+aq0Qw2rAupaPUa2KzPrIiGhQMWxKLTGlI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EC4021480; Sun, 10 Nov 2024 17:31:17 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 624A83F66E; Sun, 10 Nov 2024 17:30:46 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCH 01/14] dt-bindings: mmc: sunxi: Simplify compatible string listing Date: Mon, 11 Nov 2024 01:30:20 +0000 Message-ID: <20241111013033.22793-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New Allwinner SoCs only occasionally update their MMC IP, leading to many pairs of compatible strings, though there are sometimes a number of them being compatible with one particular SoC. Collate the compatible string listing in the binding, to group those being compatible together. This makes the list more readable, and allows for easier addition of new SoC's MMC devices. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 36 ++++++++----------- 1 file changed, 14 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.= yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml index 0ccd632d56200..8e4c77b7e4ab9 100644 --- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml @@ -30,38 +30,30 @@ properties: - const: allwinner,sun50i-a100-emmc - const: allwinner,sun50i-a100-mmc - items: - - const: allwinner,sun8i-a83t-mmc + - enum: + - allwinner,sun8i-a83t-mmc + - allwinner,suniv-f1c100s-mmc - const: allwinner,sun7i-a20-mmc - items: - - const: allwinner,sun8i-r40-emmc + - enum: + - allwinner,sun8i-r40-emmc + - allwinner,sun50i-h5-emmc + - allwinner,sun50i-h6-emmc - const: allwinner,sun50i-a64-emmc - items: - - const: allwinner,sun8i-r40-mmc + - enum: + - allwinner,sun8i-r40-mmc + - allwinner,sun50i-h5-mmc + - allwinner,sun50i-h6-mmc - const: allwinner,sun50i-a64-mmc - items: - - const: allwinner,sun50i-h5-emmc - - const: allwinner,sun50i-a64-emmc - - items: - - const: allwinner,sun50i-h5-mmc - - const: allwinner,sun50i-a64-mmc - - items: - - const: allwinner,sun50i-h6-emmc - - const: allwinner,sun50i-a64-emmc - - items: - - const: allwinner,sun50i-h6-mmc - - const: allwinner,sun50i-a64-mmc - - items: - - const: allwinner,sun20i-d1-emmc - - const: allwinner,sun50i-a100-emmc - - items: - - const: allwinner,sun50i-h616-emmc + - enum: + - allwinner,sun20i-d1-emmc + - allwinner,sun50i-h616-emmc - const: allwinner,sun50i-a100-emmc - items: - const: allwinner,sun50i-h616-mmc - const: allwinner,sun50i-a100-mmc - - items: - - const: allwinner,suniv-f1c100s-mmc - - const: allwinner,sun7i-a20-mmc =20 reg: maxItems: 1 --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6976F85C5E; Mon, 11 Nov 2024 01:30:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288652; cv=none; b=UsTCOnh9fC8djPl2o7eiUv06yYtQFbcOZBPtLi9Y9jDTC4PtMrJo/gB2PllnFiuy68YWv3Mgbzqi8FLYN8mq0vt/Ts+AUOzN1DXrm65sVV2BqVBQ00t2+r2nlFQtMwbmuObivEnPI/IkP40ebt4r4ArqUwBphKvJThTtPjE5h2I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288652; c=relaxed/simple; bh=MSgyfh8JQ8IhWBVSCbM3Kve8T1LhHCLog5V9N7pHy1Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LiI/wz1TLPXDPRNk34ozjoBYOEM6kGSPWQuEE6AphbNG5ookS5Y+pK5vYoSaUrBdLwh5Lpk1HG89rKeKe8p6UYyfccmyzCFT2ijexEnk0+R1R9y1iIBOWNlUdPgxo3mNAnFXxzOEtNBnri+xO49O/gkRta080nAQWyXNiinLqTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6E6E1CDD; Sun, 10 Nov 2024 17:31:19 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4C5003F66E; Sun, 10 Nov 2024 17:30:48 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: [PATCH 02/14] dt-bindings: mmc: sunxi: add compatible strings for Allwinner A523 Date: Mon, 11 Nov 2024 01:30:21 +0000 Message-ID: <20241111013033.22793-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 uses the same MMC IP as the D1. Introduce the new specific compatible strings, and use them with fallbacks to the D1 strings. Also it turned out that the A100 is not compatible to the H616, instead it is the same as the D1. For compatibility we cannot change the fallback chain, but any drivers are from now on supposed to match on the H616 string directly. Mark this fallback chain as deprecated, to avoid new users to be added. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.= yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml index 8e4c77b7e4ab9..40b83af02c3f9 100644 --- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml @@ -50,10 +50,14 @@ properties: - enum: - allwinner,sun20i-d1-emmc - allwinner,sun50i-h616-emmc + - allwinner,sun55i-a523-emmc - const: allwinner,sun50i-a100-emmc - - items: + - items: # deprecated fallback chain - const: allwinner,sun50i-h616-mmc - const: allwinner,sun50i-a100-mmc + - items: + - const: allwinner,sun55i-a523-mmc + - const: allwinner,sun20i-d1-mmc =20 reg: maxItems: 1 --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2A0EB208CA; Mon, 11 Nov 2024 01:30:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288653; cv=none; b=QlSfzUA9/PI0N0AjewywMAkd38qvNAil3HqNfRbqevjD1UXIapX8U/Q88b5d1flLqCDJhi8LzdWQVZoDiOtBMpC0RZJ97Lbyrxa1wwq2KCsF+1pYvvcWU8H9VdPDIk+PzoLXqw0sWwQpIhaNCcyYU1srlPvhc08quYq+RaZYUWU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288653; c=relaxed/simple; bh=RqpeZk0PGM377DXiY6/guH5PPVOIEwT1S49eX+ApDgM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PgP5+nKnh0/JJIPuFtjWHe0aUoOtG7zLVu7ssSpSwuCRXs7vfgG/y1B+XVvEEvAsMo6Zv3Xz3bacxKWwSUNTq8ZgUIzhewcxZDI/uA6qHn9RquB4stShHdBWvm3NqDbS5ex6POz6lg6Ty0faJUz64jOXkHn91eJnu8a5GmX2DaY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DC6E21480; Sun, 10 Nov 2024 17:31:21 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 36D2E3F66E; Sun, 10 Nov 2024 17:30:50 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH 03/14] dt-bindings: watchdog: sunxi: add Allwinner A523 compatible string Date: Mon, 11 Nov 2024 01:30:22 +0000 Message-ID: <20241111013033.22793-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 SoC features a watchdog similar to the one used in previous SoCs, but moves some registers around (by just one word), making it incompatible to existing IPs. Add the new name to the list of compatible string, and also to the list of IP requiring two clock inputs. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10= -wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-= wdt.yaml index 64c8f73938099..b35ac03d51727 100644 --- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.ya= ml +++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.ya= ml @@ -32,6 +32,7 @@ properties: - items: - const: allwinner,sun20i-d1-wdt-reset - const: allwinner,sun20i-d1-wdt + - const: allwinner,sun55i-a523-wdt =20 reg: maxItems: 1 @@ -60,6 +61,7 @@ if: - allwinner,sun20i-d1-wdt-reset - allwinner,sun50i-r329-wdt - allwinner,sun50i-r329-wdt-reset + - allwinner,sun55i-a523-wdt =20 then: properties: --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 53DEE1494C3; Mon, 11 Nov 2024 01:30:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288655; cv=none; b=tFFYHaLe5z/Pt5js1o1lhYqKlVi+N83shmW0EJ4TI26VTxkUlo4wXSjQSDOpn4zttt9Q7FKIPbXgKy+SXZC8wUN/NFu9waWFBZsB/L0Eup97ew0Z9hnVT+MsBCwVYfDOajhmd7B7TLAH0JhAfTAN3ulMDKGGlyeZ7BXzP9khURg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288655; c=relaxed/simple; bh=okiOLoEkr2dtzko6+Ka0hOd/TT+87CTRj/RNBr8gB8A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ds+RhbKAhAb5HKVl9Nm7iVPJHc5ehcuf7Xm4QVkILwE+KkAtcOL+uT6TfGUOikl4j6jj+FS6016kxo5w+jO0Z5ANfyGkzg+QNhk5mMvVst4l8WME90tm6If+Wts86GdXyOtPjGldzZ1+94b4eqSLwsYav9q4v9duQKWMDVStYd8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E18151CDD; Sun, 10 Nov 2024 17:31:23 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3C5623F66E; Sun, 10 Nov 2024 17:30:52 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org Subject: [PATCH 04/14] watchdog: sunxi_wdt: Add support for Allwinner A523 Date: Mon, 11 Nov 2024 01:30:23 +0000 Message-ID: <20241111013033.22793-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 SoC comes with a watchdog very similar to the ones in the previous Allwinner SoCs, but oddly enough moves the first half of its registers up by one word. Since we have different offsets for these registers across the other SoCs as well, this can simply be modelled by just stating the new offsets in our per-SoC struct. The rest of the IP is the same as in the D1, although the A523 moves its watchdog to a separate MMIO frame, so it's not embedded in the timer anymore. The driver can be ignorant of this, because the DT will take care of this. Add a new struct for the A523, specifying the SoC-specific details, and tie the new DT compatible string to it. Signed-off-by: Andre Przywara --- drivers/watchdog/sunxi_wdt.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c index b85354a995826..b6c761acc3de6 100644 --- a/drivers/watchdog/sunxi_wdt.c +++ b/drivers/watchdog/sunxi_wdt.c @@ -236,10 +236,21 @@ static const struct sunxi_wdt_reg sun20i_wdt_reg =3D { .wdt_key_val =3D 0x16aa0000, }; =20 +static const struct sunxi_wdt_reg sun55i_wdt_reg =3D { + .wdt_ctrl =3D 0x0c, + .wdt_cfg =3D 0x10, + .wdt_mode =3D 0x14, + .wdt_timeout_shift =3D 4, + .wdt_reset_mask =3D 0x03, + .wdt_reset_val =3D 0x01, + .wdt_key_val =3D 0x16aa0000, +}; + static const struct of_device_id sunxi_wdt_dt_ids[] =3D { { .compatible =3D "allwinner,sun4i-a10-wdt", .data =3D &sun4i_wdt_reg }, { .compatible =3D "allwinner,sun6i-a31-wdt", .data =3D &sun6i_wdt_reg }, { .compatible =3D "allwinner,sun20i-d1-wdt", .data =3D &sun20i_wdt_reg }, + { .compatible =3D "allwinner,sun55i-a523-wdt", .data =3D &sun55i_wdt_reg = }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids); --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 79E8814B95A; Mon, 11 Nov 2024 01:30:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288658; cv=none; b=YmRUz/lSwi5bLnGIvAztejd2b5kpKBxKQMELy0Crr1TkyYSJLhS9lQNSL/E+E3eV6ngWZu4t1XDg/B1L1OtjVkdvIxWCSXvc8nGfGfZxqy+t8KDDnKZTUsPtrN3jyp0v4XN4Bo1lBu0IiDl5tYJ4Vod/li1LMDTmY5NHpAfWmME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288658; c=relaxed/simple; bh=0JSYVCMppQ4gPpDglsiUJWmmCHlt0HifKB1+DPJgXS8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uOJuO7WiEf2XEB1SctaMJeJaiiArjInRnsKpC8gyJCaZGwZR0O2QA5cnIuJKQGt4ER42ScNtOvpL6SvQESodxnBbNtwkjDNjWsR1bmWIhzszvBK2dMDqoINfgG1rCxR5GHG7FElbjAWPpJtV3Qecbm+qPR772nKMkvk5Bg/INsI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6D341CE0; Sun, 10 Nov 2024 17:31:25 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4187F3F66E; Sun, 10 Nov 2024 17:30:54 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Gregory CLEMENT , Andi Shyti Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 05/14] dt-bindings: i2c: mv64xxx: Add Allwinner A523 compatible string Date: Mon, 11 Nov 2024 01:30:24 +0000 Message-ID: <20241111013033.22793-6-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The I2C controller IP used in the Allwinner A523/T527 SoCs is compatible with the ones used in the other recent Allwinner SoCs. Add the A523 specific compatible string to the list of existing names falling back to the allwinner,sun8i-v536-i2c string. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml= b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index 984fc1ed3ec6a..c4efcef591337 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -33,6 +33,7 @@ properties: - allwinner,sun50i-a100-i2c - allwinner,sun50i-h616-i2c - allwinner,sun50i-r329-i2c + - allwinner,sun55i-a523-i2c - const: allwinner,sun8i-v536-i2c - const: allwinner,sun6i-a31-i2c - const: marvell,mv64xxx-i2c --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2666D14B959; Mon, 11 Nov 2024 01:30:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288659; cv=none; b=GpWJ4LUOwBlXKY+NjJvc5ws2kFlbNCNsTFiBe+KyZmWglxnfDpQpoI69GGrUG3DX+FNKo0rlOraL0y16NezsI6KFw7xUnwFFrZkA2QyjKamXXAzQ0KmSk1wfRDS3kzfyK8hfjJpXR5rSZBHLvy7UN5j6zexl9uCmDLu8VX+iXUQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288659; c=relaxed/simple; bh=VydmXJDG2+hEYWUuMRDZP6M8Lct5HvaCBkObpRuKjIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=h6JkRuE6Rf7gzST1HaqsFUfDQ6LbO8FmiSgY5/1Vpngq/Or5SeywBJ/bYN2NfvWXzynEJRntLpwQKzdIOGcELr/GMVcnUtOGLFv4DzcWF5ed9sVOJPocpr5VL2q6FrBiHKl4QQpnCJKvSdRaPkNzWEfGFuUOBWkjH8+9sDb2BQ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B531F1CE2; Sun, 10 Nov 2024 17:31:27 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 46C4F3F66E; Sun, 10 Nov 2024 17:30:56 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Thomas Gleixner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 06/14] dt-bindings: irq: sun7i-nmi: document the Allwinner A523 NMI controller Date: Mon, 11 Nov 2024 01:30:25 +0000 Message-ID: <20241111013033.22793-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 SoC contains an NMI controller compatible to one used in the recent Allwinner SoCs. Add the A523 specific name to the list of allowed compatible strings. Signed-off-by: Andre Przywara --- .../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinn= er,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-cont= roller/allwinner,sun7i-a20-sc-nmi.yaml index f49b43f45f3d9..d4a86694a032f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7= i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7= i-a20-sc-nmi.yaml @@ -31,6 +31,7 @@ properties: - allwinner,sun8i-v3s-nmi - allwinner,sun50i-a100-nmi - allwinner,sun50i-h616-nmi + - allwinner,sun55i-a523-nmi - const: allwinner,sun9i-a80-nmi =20 reg: --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6EBBA154C04; Mon, 11 Nov 2024 01:31:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288661; cv=none; b=OAqJO/Qfe851UvSX68Of1man8f4BzGzJV2vn2qRPlyHdz0Wh0GXSsnRhHcP+7UOuv9JCMVVghgLhKeRi26xKfp2Zxtx4Zm4C4Vvjfuo4SrAUE7hZPqRFvBlYVETOMS7ysluPteu27Z2x1xJuLW5X7G8JO+NwePUT7d8u8YQI8cw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288661; c=relaxed/simple; bh=CgadDdYWs3CAM+2bELfGUg5Jr452m2Ji1Iw8/54B7vY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nM0YSh5deGarwh9cS+rH5nD5WjCsslbIlQpViugh3SbINF3jHDf6Afu2FSU5Z0dfMCXrFz/4JNXFi5r/7O1uLmFb1P6czkGg08jxMs1VNEnCbrS74Xj8TGW7AQPrFvaUwpUBHcQWnJOUEDAcLiESRhdA+bqiTAFv1mf30erPEjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BA89D13D5; Sun, 10 Nov 2024 17:31:29 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 152FE3F66E; Sun, 10 Nov 2024 17:30:57 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Vinod Koul , Kishon Vijay Abraham I Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH 07/14] dt-bindings: phy: document Allwinner A523 USB-2.0 PHY Date: Mon, 11 Nov 2024 01:30:26 +0000 Message-ID: <20241111013033.22793-8-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 SoC contains a USB-2.0 PHY fully compatible to the one used in the D1/T113s SoCs. This PHY controls the two USB-2.0 ports, there is a separate and quite different PHY for the USB-3.0 port. Add the new compatible string, with a fallback to the D1 version. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../bindings/phy/allwinner,sun50i-a64-usb-phy.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb= -phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-= phy.yaml index f557feca97630..b070a5aeab11d 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.ya= ml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.ya= ml @@ -15,9 +15,13 @@ properties: const: 1 =20 compatible: - enum: - - allwinner,sun20i-d1-usb-phy - - allwinner,sun50i-a64-usb-phy + oneOf: + - enum: + - allwinner,sun20i-d1-usb-phy + - allwinner,sun50i-a64-usb-phy + - items: + - const: allwinner,sun55i-a523-usb-phy + - const: allwinner,sun20i-d1-usb-phy =20 reg: items: --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 16EA6155336; Mon, 11 Nov 2024 01:31:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288663; cv=none; b=ldDQnEM3xEGqt6yQfR7tp2QSXCPn2MXue5W7MPUJW5h4z+C4M3MeDn5QKuPx6kcaBTF7NHv8oRiuFgzG/aukVSrTielipMXjQp8In4b2fzG8W+QDxlrTCiPqQP6XFpCMOsuC6k+/zZ0c/cPVmV30r9VImifjFmBw18tPc7yv40o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288663; c=relaxed/simple; bh=VrcR4honuL6cw9QQVVcd6hnrYiHK7cCudVS6r1m0wBg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Kmwu6TPwVe5JSGXq6cY6D1GVqpVnViLgbofp3q6451T3wwnIeXqGlrIJEH7zhZnRkwCOc8xIaJqNPBePiRKcDZDGbmQuWVFNg1x+8BI/l2LQG4GQvZuYLw8w01+PCSngE5u95lqXKaxVjaozZkCeydb0CmEotlcSk9UZhTZtflA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A48FB1CE0; Sun, 10 Nov 2024 17:31:31 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A63D3F66E; Sun, 10 Nov 2024 17:30:59 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 08/14] dt-bindings: usb: sunxi-musb: add Allwinner A523 compatible string Date: Mon, 11 Nov 2024 01:30:27 +0000 Message-ID: <20241111013033.22793-9-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523/T527 SoCs have a MUSB controller fully compatible to the D1 (and ultimately the A33), with five endpoints. Add the new name to the list of compatible strings. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb= .yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml index f972ce976e860..57c17d5a62d63 100644 --- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml +++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml @@ -24,6 +24,7 @@ properties: - allwinner,sun8i-a83t-musb - allwinner,sun20i-d1-musb - allwinner,sun50i-h6-musb + - allwinner,sun55i-a523-musb - const: allwinner,sun8i-a33-musb - items: - const: allwinner,sun50i-h616-musb --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1FCFD156997; Mon, 11 Nov 2024 01:31:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288665; cv=none; b=N118/Lk88G2gaS1Ln54iWiFluxGUCsybcB7se/6v1Co1xrAuFFnl5b4OPNSP425wbXGbuRjIFsCgZo/ysgnSJ82GJLehc+grHrfm4bma9IHpkIVafEykj2/P4SC+Hi8NII8QyXh08mBWdcX1xQ8OAI98Q5wNZ8L5Bb369zZ00G4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288665; c=relaxed/simple; bh=QMrladCcmc33UDoppwI2Mj3WEkVy8BFwUOhKtfkegqU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AZhU3cy5jGjiOg6N3c0aK3YpQhFMrrK/anyiktWWgufMSD3Vq/oSRKGbosFYm5I4XsDpXA/xrzOfDbzO5f8LfFYvQUbZdpX9aRrgQ1OheTXQhGuSX3VyxycoX96ku/gg4FAtBjsMkrLBjxUIRFjJY8RG247OEz0Ii7eeZ8MKt7Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8E2D913D5; Sun, 10 Nov 2024 17:31:33 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 04A193F66E; Sun, 10 Nov 2024 17:31:01 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 09/14] dt-bindings: usb: add A523 compatible string for EHCI and OCHI Date: Mon, 11 Nov 2024 01:30:28 +0000 Message-ID: <20241111013033.22793-10-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523/T527 feature generic EHCI and OHCI compatible USB-2.0 host controllers (in addition to an MUSB and an XHCI controller). Add the new name to the list of supported compatible strings. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + Documentation/devicetree/bindings/usb/generic-ohci.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Docu= mentation/devicetree/bindings/usb/generic-ehci.yaml index 2ed178f16a782..9c5884c1e7c53 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -31,6 +31,7 @@ properties: - allwinner,sun50i-a64-ehci - allwinner,sun50i-h6-ehci - allwinner,sun50i-h616-ehci + - allwinner,sun55i-a523-ehci - allwinner,sun5i-a13-ehci - allwinner,sun6i-a31-ehci - allwinner,sun7i-a20-ehci diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Docu= mentation/devicetree/bindings/usb/generic-ohci.yaml index b9576015736bf..f1ae45aa4c86c 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -18,6 +18,7 @@ properties: - allwinner,sun50i-a64-ohci - allwinner,sun50i-h6-ohci - allwinner,sun50i-h616-ohci + - allwinner,sun55i-a523-ohci - allwinner,sun5i-a13-ohci - allwinner,sun6i-a31-ohci - allwinner,sun7i-a20-ohci --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E395415852E; Mon, 11 Nov 2024 01:31:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288667; cv=none; b=nVeaY0jLyeNBNY2jy2lME5tKw9pd893eurczW6bUF3v3q1A/KpjpAbcd4/6nAwLPcldcUbJB9j181KoRIKm6HnamBaiLguY3iWkhxy9jLbK29GDSpnvMkQQuEeRPjZlkWz2RdlgB9PTZMQ4FJaXH5HgzazCGURwHGxP3LvTAeuM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288667; c=relaxed/simple; bh=LZCOi285j7O4lbN4YKXUfdjxAXbA4mMOF4QR+DNejS0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cTKFhRVd33GDqcyofEEon/8IYplDjuVelELwZy6YagGSJuTYORIPZ2t0E+wYY7qy++aVwRTpq4lNdDYrEU6Sgg9TWYGCoO2CbKSQaHbuOqF8dLWXAanM6O4Dow9U8elae89X31Sql/lPWpaUtENDbVkwc6GUAK47HydvZZCl43w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 784711480; Sun, 10 Nov 2024 17:31:35 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E27B33F66E; Sun, 10 Nov 2024 17:31:03 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Alexandre Belloni Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org Subject: [PATCH 10/14] dt-bindings: rtc: sun6i: Add Allwinner A523 support Date: Mon, 11 Nov 2024 01:30:29 +0000 Message-ID: <20241111013033.22793-11-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RTC in the Allwinner A523 SoC is compatible to the D1 and R329, so just add its name and use the R329 as a fallback. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- .../devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.= yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml index 4531eec568a65..9df5cdb6f63f2 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -30,7 +30,9 @@ properties: - const: allwinner,sun50i-a64-rtc - const: allwinner,sun8i-h3-rtc - items: - - const: allwinner,sun20i-d1-rtc + - enum: + - allwinner,sun20i-d1-rtc + - allwinner,sun55i-a523-rtc - const: allwinner,sun50i-r329-rtc =20 reg: --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B7742159209; Mon, 11 Nov 2024 01:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288669; cv=none; b=QXlSdszFhxfH+9WCE8AxCCMLfEfA4Y46PT8IPxMoYS6bf/Zpc+5dNfoEbDeXeFn43v9q5mseWEERzQ3wzcJ+9NHSt7zTDK/Z55WlQ7ukMBwTOhRraDq9JgtzOaV7VZSjezk0AgyTIU6HCnDIPQPqQ6zAFe0pG7E6qHZp2qmYR/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288669; c=relaxed/simple; bh=AFv/21u/edYdwtPEhjbjrB04V5L7d9fKMKeP9UI2V2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KfY/sLCpawHrHrfXhwzgkX+J8xqV5yIr7PfUcjjuHE14WsQk3UwvD0KA2lNXjbVUiUNmkPWPuuezP3W6ofmgMkARssxHsbFnd088hLOsN+wT0II6lAjkacGzAVXC7awz82H3WwelZkfRhDgL3kOFcjCVkWXIRHc15ZQ6jz12vQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4705A13D5; Sun, 10 Nov 2024 17:31:37 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CC8D03F66E; Sun, 10 Nov 2024 17:31:05 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 11/14] arm64: dts: allwinner: Add Allwinner A523 .dtsi file Date: Mon, 11 Nov 2024 01:30:30 +0000 Message-ID: <20241111013033.22793-12-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523, and its siblings A527 and T527, which share the same die, are a new family of SoCs introduced in 2023. They features eight Arm Cortex-A55 cores, and, among the other usual peripherals, a PCIe and USB 3.0 controller. Add the basic SoC devicetree .dtsi for the chip, describing the fundamental peripherals: the cores, GIC, timer, RTC, CCU and pinctrl. Also some other peripherals are fully compatible with previous IP, so add the USB and MMC nodes as well. The other peripherals will be added in the future, once we understand their compatibility and DT requirements. Signed-off-by: Andre Przywara --- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 386 ++++++++++++++++++ 1 file changed, 386 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi new file mode 100644 index 0000000000000..96072cea10da4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -0,0 +1,386 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2023-2024 Arm Ltd. + +#include +#include +#include +#include +#include +#include + +/ { + interrupt-parent =3D <&gic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + compatible =3D "arm,cortex-a55"; + device_type =3D "cpu"; + reg =3D <0x000>; + }; + }; + + ext_osc32k: ext-osc32k-clk { + #clock-cells =3D <0>; + compatible =3D "fixed-clock"; + clock-frequency =3D <32768>; + clock-output-names =3D "ext_osc32k"; + }; + + osc24M: osc24M-clk { + #clock-cells =3D <0>; + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "osc24M"; + }; + + pmu { + compatible =3D "arm,cortex-a55-pmu"; + interrupts =3D ; + }; + + timer { + compatible =3D "arm,armv8-timer"; + arm,no-tick-in-suspend; + interrupts =3D , + , + , + ; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x0 0x0 0x0 0x40000000>; + + pio: pinctrl@2000000 { + compatible =3D "allwinner,sun55i-a523-pinctrl"; + reg =3D <0x2000000 0x800>; + interrupts =3D , + , + , + , + , + , + , + , + , + ; + clocks =3D <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; + clock-names =3D "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells =3D <3>; + interrupt-controller; + #interrupt-cells =3D <3>; + + mmc0_pins: mmc0-pins { + pins =3D "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5"; + allwinner,pinmux =3D <2>; + function =3D "mmc0"; + drive-strength =3D <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins =3D "PG0" ,"PG1", "PG2", "PG3", "PG4", "PG5"; + allwinner,pinmux =3D <2>; + function =3D "mmc1"; + drive-strength =3D <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins =3D "PC1" ,"PC5", "PC6", "PC8", "PC9", + "PC10", "PC11", "PC13", "PC14", "PC15", + "PC16"; + allwinner,pinmux =3D <3>; + function =3D "mmc2"; + drive-strength =3D <30>; + bias-pull-up; + }; + + uart0_pb_pins: uart0-pb-pins { + pins =3D "PB9", "PB10"; + allwinner,pinmux =3D <2>; + function =3D "uart0"; + }; + }; + + ccu: clock@2001000 { + compatible =3D "allwinner,sun55i-a523-ccu"; + reg =3D <0x02001000 0x1000>; + clocks =3D <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; + clock-names =3D "hosc", "losc", "iosc"; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + }; + + mmc0: mmc@4020000 { + compatible =3D "allwinner,sun55i-a523-mmc", + "allwinner,sun20i-d1-mmc"; + reg =3D <0x04020000 0x1000>; + clocks =3D <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names =3D "ahb", "mmc"; + resets =3D <&ccu RST_BUS_MMC0>; + reset-names =3D "ahb"; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc0_pins>; + status =3D "disabled"; + + max-frequency =3D <150000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mmc2: mmc@4022000 { + compatible =3D "allwinner,sun55i-a523-mmc", + "allwinner,sun20i-d1-mmc"; + reg =3D <0x04022000 0x1000>; + clocks =3D <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names =3D "ahb", "mmc"; + resets =3D <&ccu RST_BUS_MMC2>; + reset-names =3D "ahb"; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc2_pins>; + status =3D "disabled"; + + max-frequency =3D <150000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-sdio-irq; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + wdt: watchdog@2050000 { + compatible =3D "allwinner,sun55i-a523-wdt"; + reg =3D <0x2050000 0x20>; + interrupts =3D ; + clocks =3D <&osc24M>, <&rtc CLK_OSC32K>; + clock-names =3D "hosc", "losc"; + status =3D "okay"; + }; + + uart0: serial@2500000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x02500000 0x400>; + interrupts =3D ; + reg-shift =3D <2>; + reg-io-width =3D <4>; + clocks =3D <&ccu CLK_BUS_UART0>; + resets =3D <&ccu RST_BUS_UART0>; + status =3D "disabled"; + }; + + i2c0: i2c@2502000 { + compatible =3D "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg =3D <0x2502000 0x400>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_I2C0>; + resets =3D <&ccu RST_BUS_I2C0>; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + gic: interrupt-controller@3400000 { + compatible =3D "arm,gic-v3"; + #address-cells =3D <1>; + #interrupt-cells =3D <3>; + #size-cells =3D <1>; + ranges; + interrupt-controller; + reg =3D <0x3400000 0x10000>, + <0x3460000 0x100000>; + interrupts =3D ; + dma-noncoherent; + + its: msi-controller@3440000 { + compatible =3D "arm,gic-v3-its"; + reg =3D <0x3440000 0x20000>; + msi-controller; + #msi-cells =3D <1>; + dma-noncoherent; + }; + }; + + usb_otg: usb@4100000 { + compatible =3D "allwinner,sun55i-a523-musb", + "allwinner,sun8i-a33-musb"; + reg =3D <0x4100000 0x400>; + interrupts =3D ; + interrupt-names =3D "mc"; + clocks =3D <&ccu CLK_BUS_OTG>; + resets =3D <&ccu RST_BUS_OTG>; + extcon =3D <&usbphy 0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + usbphy: phy@4100400 { + compatible =3D "allwinner,sun55i-a523-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg =3D <0x4100400 0x100>, + <0x4101800 0x100>, + <0x4200800 0x100>; + reg-names =3D "phy_ctrl", + "pmu0", + "pmu1"; + clocks =3D <&osc24M>, + <&osc24M>; + clock-names =3D "usb0_phy", + "usb1_phy"; + resets =3D <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names =3D "usb0_reset", + "usb1_reset"; + status =3D "disabled"; + #phy-cells =3D <1>; + }; + + ehci0: usb@4101000 { + compatible =3D "allwinner,sun55i-a523-ehci", + "generic-ehci"; + reg =3D <0x4101000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci0: usb@4101400 { + compatible =3D "allwinner,sun55i-a523-ohci", + "generic-ohci"; + reg =3D <0x4101400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ehci1: usb@4200000 { + compatible =3D "allwinner,sun55i-a523-ehci", + "generic-ehci"; + reg =3D <0x4200000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci1: usb@4200400 { + compatible =3D "allwinner,sun55i-a523-ohci", + "generic-ohci"; + reg =3D <0x4200400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + r_ccu: clock-controller@7010000 { + compatible =3D "allwinner,sun55i-a523-r-ccu"; + reg =3D <0x7010000 0x250>; + clocks =3D <&osc24M>, + <&rtc CLK_OSC32K>, + <&rtc CLK_IOSC>, + <&ccu CLK_PLL_PERIPH0_200M>, + <&ccu CLK_PLL_AUDIO0_4X>; + clock-names =3D "hosc", + "losc", + "iosc", + "pll-periph", + "pll-audio"; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + }; + + nmi_intc: interrupt-controller@7010320 { + compatible =3D "allwinner,sun55i-a523-nmi", + "allwinner,sun9i-a80-nmi"; + reg =3D <0x07010320 0xc>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + }; + + r_pio: pinctrl@7022000 { + compatible =3D "allwinner,sun55i-a523-r-pinctrl"; + reg =3D <0x7022000 0x800>; + interrupts =3D , + ; + clocks =3D <&r_ccu CLK_R_APB0>, + <&osc24M>, + <&rtc CLK_OSC32K>; + clock-names =3D "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells =3D <3>; + interrupt-controller; + #interrupt-cells =3D <3>; + + r_i2c_pins: r-i2c-pins { + pins =3D "PL0" ,"PL1"; + allwinner,pinmux =3D <2>; + function =3D "r_i2c0"; + }; + }; + + r_i2c0: i2c@7081400 { + compatible =3D "allwinner,sun55i-a523-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg =3D <0x07081400 0x400>; + interrupts =3D ; + clocks =3D <&r_ccu CLK_BUS_R_I2C0>; + resets =3D <&r_ccu RST_BUS_R_I2C0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&r_i2c_pins>; + status =3D "disabled"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + rtc: rtc@7090000 { + compatible =3D "allwinner,sun55i-a523-rtc", + "allwinner,sun50i-r329-rtc"; + reg =3D <0x7090000 0x400>; + interrupts =3D ; + clocks =3D <&r_ccu CLK_BUS_R_RTC>, + <&osc24M>, + <&r_ccu CLK_R_AHB>; + clock-names =3D "bus", "hosc", "ahb"; + #clock-cells =3D <1>; + }; + }; +}; --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 64E4715ADB4; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EEBB11480; Sun, 10 Nov 2024 17:31:38 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9B31A3F66E; Sun, 10 Nov 2024 17:31:07 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 12/14] dt-bindings: vendor-prefixes: Add YuzukiHD name Date: Mon, 11 Nov 2024 01:30:31 +0000 Message-ID: <20241111013033.22793-13-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" YuzukiHD provides Open Source Hardware designs, and also offers ready-made builds of them: https://github.com/YuzukiHD Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index b320a39de7fe4..936dcafd6adeb 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1709,6 +1709,8 @@ patternProperties: description: Shenzhen Yashi Changhua Intelligent Technology Co., Ltd. "^ysoft,.*": description: Y Soft Corporation a.s. + "^yuzukihd,.*": + description: YuzukiHD Open Source Hardware "^zarlink,.*": description: Zarlink Semiconductor "^zealz,.*": --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 132E915ADA1; Mon, 11 Nov 2024 01:31:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288672; cv=none; b=gJKynZsJi2qGSYEdBjz6gjabBon/8j0zhi5HWcDFu37wxVp3bpLjDI8v3zi2YhulkqUicb+VfYLnFcjONEOunMdX0jk9xYjGZUA/QNd2ahP2trc3aFABwq/YAqbDDWBoiDS7zNO1SgR69hBiH01tCDdLLFjdiVgr9yLoDiWcqac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288672; c=relaxed/simple; bh=8ZzeiKIa14SqtLylMvp/nXqWeWk+w9HC7+C1CXcTQuc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lLzcMlze/krAVeeJ1attyvR0T8gl7LEXeVHUgHerLRZujCoN52np1io5GVON9YtdpJd+68qjKuQiyth2KHg1F7HqPPkyc7nBGL2f1jWYo5V5gFUUkNH1DXWxgUYPf34OYosbzX0U5Bpbg00EWf48kUO0bfCuxVnG5HUxVK8cpE8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A243A13D5; Sun, 10 Nov 2024 17:31:40 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4EB483F66E; Sun, 10 Nov 2024 17:31:09 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 13/14] dt-bindings: arm: sunxi: Add Avaota A1 board Date: Mon, 11 Nov 2024 01:30:32 +0000 Message-ID: <20241111013033.22793-14-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Avaota A1 is an Open Source hardware router board using the Allwinner T527 SoC. Add its compatible name to the list. Signed-off-by: Andre Przywara Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentati= on/devicetree/bindings/arm/sunxi.yaml index 4aa15f3668e03..41d6509f48602 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -1070,4 +1070,9 @@ properties: - const: xunlong,orangepi-zero3 - const: allwinner,sun50i-h618 =20 + - description: YuzukiHD Avaota A1 + items: + - const: yuzukihd,avaota-a1 + - const: allwinner,sun55i-t527 + additionalProperties: true --=20 2.46.2 From nobody Thu Dec 12 02:36:13 2024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9630915ECD7; Mon, 11 Nov 2024 01:31:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288674; cv=none; b=FSwRpLdsULqOaiZHYindE2N4wj/yFp/rEqAUdn1zvrohVk2P1IiGaOQJhtJMbFcC/L9PLABLVegYbszTi6QByzN5aJpZKaz76Q/730TDt75XYXFVXEvX+ijXhQOVNMofGenxupjzoE1MZwUblfqSLoJ4Vwu7A61HAay97qdw/Ws= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731288674; c=relaxed/simple; bh=lCVFWObsT1GX3rdDfh51cIAn159eLB+5yHJbzLiJ0JU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l4DoP8fi14r99Z0IPgotPMFq9E+XosO8O1zOqvYZHHy2yYwvwKdwdQftUfgCHTSJ8RbPN3CWFlXho0FijdZoq/hqMQPjaVxICV6Gjgm9p/G8ZDZaXvpHgdwpPkIxj1rH81MpAd8OXiWcCUBnjmDO++lGLvVAo1KNB2iEL4v+7bw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5551A1480; Sun, 10 Nov 2024 17:31:42 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 024B53F66E; Sun, 10 Nov 2024 17:31:10 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 14/14] arm64: dts: allwinner: a523: add Avaota-A1 router support Date: Mon, 11 Nov 2024 01:30:33 +0000 Message-ID: <20241111013033.22793-15-andre.przywara@arm.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241111013033.22793-1-andre.przywara@arm.com> References: <20241111013033.22793-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Avaota A1 router board is an Open Source hardware board, designed by YuzukiHD. Pine64 produces some boards. It uses the Allwinner T527 SoC, and comes with the following features: - Eight ARM Cortex-A55 cores, Mali-G57 MC1 GPU - 1GiB/2GiB/4GiB LPDDR4 DRAM - AXP717 + AXP323 PMIC - Raspberry-Pi-2 compatible GPIO header - 1 USB 2.0 type A host port, 1 USB 3.0 type A host post - 1 USB 2.0 type C port (OTG + serial debug) - MicroSD slot - eMMC between 16 and 128 GiB - on-board 16MiB bootable SPI NOR flash - two 1Gbps Ethernet ports (via RTL8211F PHYs) - HDMI port - DP port - camera and LCD connectors - 3.5mm headphone jack - (yet) unsupported WiFi/BT chip - 1.3" LC display, connected via SPI - 12 V barrel plug for power supply Add the devicetree file describing the currently supported features. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../dts/allwinner/sun55i-t527-avaota-a1.dts | 311 ++++++++++++++++++ 2 files changed, 312 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/a= llwinner/Makefile index 00bed412ee31c..0d678a7499e3c 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -52,3 +52,4 @@ dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h700-anbernic-rg35xx= -2024.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h700-anbernic-rg35xx-h.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h700-anbernic-rg35xx-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun50i-h700-anbernic-rg35xx-sp.dtb +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun55i-t527-avaota-a1.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch= /arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts new file mode 100644 index 0000000000000..ac3e4a55231c7 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +// Copyright (C) 2024 Arm Ltd. + +/dts-v1/; + +#include "sun55i-a523.dtsi" + +#include + +/ { + model =3D "Avaota A1"; + compatible =3D "yuzukihd,avaota-a1", "allwinner,sun55i-t527"; + + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + /* For now, until we have mainline components living in SRAM */ + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 128 KiB reserved for Trusted Firmware-A (BL31). */ + secmon@48000000 { + reg =3D <0x0 0x48000000 0x0 0x20000>; + no-map; + }; + + /* 256 KiB reserved for the SCP. */ + secmon@48100000 { + reg =3D <0x0 0x48100000 0x0 0x40000>; + no-map; + }; + }; + + reg_vcc12v: vcc12v { + /* DC input jack */ + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc-12v"; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + regulator-always-on; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply from the 12V->5V regulator */ + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc-5v"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <®_vcc12v>; + regulator-always-on; + }; + + reg_vcc3v3: vcc3v3 { + /* 3.3V dummy supply for the SD card */ + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc-3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <®_vcc5v>; + regulator-always-on; + }; + + reg_usb_vbus: vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb-vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <®_vcc5v>; + gpio =3D <&pio 8 12 GPIO_ACTIVE_HIGH>; /* PI12 */ + enable-active-high; + }; +}; + +&ehci0 { + status =3D "okay"; +}; + +&ehci1 { + status =3D "okay"; +}; + +&mmc0 { + vmmc-supply =3D <®_vcc3v3>; + cd-gpios =3D <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_DOWN)>; /* PF6 */ + bus-width =3D <4>; + status =3D "okay"; +}; + +&ohci0 { + status =3D "okay"; +}; + +&ohci1 { + status =3D "okay"; +}; + +&pio { + vcc-pb-supply =3D <®_cldo3>; /* via VCC-IO */ + vcc-pc-supply =3D <®_cldo1>; + vcc-pd-supply =3D <®_dcdc4>; + vcc-pe-supply =3D <®_dcdc4>; + vcc-pf-supply =3D <®_cldo3>; /* actually switchable */ + vcc-pg-supply =3D <®_bldo1>; + vcc-ph-supply =3D <®_cldo3>; /* via VCC-IO */ + vcc-pi-supply =3D <®_dcdc4>; + vcc-pj-supply =3D <®_dcdc4>; + vcc-pk-supply =3D <®_bldo3>; +}; + +&r_i2c0 { + status =3D "okay"; + + axp717: pmic@35 { + compatible =3D "x-powers,axp717"; + reg =3D <0x35>; + interrupt-controller; + #interrupt-cells =3D <1>; + interrupt-parent =3D <&nmi_intc>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + + vin1-supply =3D <®_vcc5v>; + vin2-supply =3D <®_vcc5v>; + vin3-supply =3D <®_vcc5v>; + vin4-supply =3D <®_vcc5v>; + aldoin-supply =3D <®_vcc5v>; + bldoin-supply =3D <®_vcc5v>; + cldoin-supply =3D <®_vcc5v>; + + regulators { + /* Supplies the "little" cluster (1.4 GHz cores) */ + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <1160000>; + regulator-name =3D "vdd-cpul"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt =3D <920000>; + regulator-max-microvolt =3D <920000>; + regulator-name =3D "vdd-gpu-sys"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt =3D <1160000>; + regulator-max-microvolt =3D <1160000>; + regulator-name =3D "vdd-dram"; + }; + + reg_dcdc4: dcdc4 { + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vdd-io"; + }; + + reg_aldo1: aldo1 { + /* not connected */ + }; + + reg_aldo2: aldo2 { + /* not connected */ + }; + + reg_aldo3: aldo3 { + /* supplies the I2C pins for this PMIC */ + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc-pl-pm"; + }; + + reg_aldo4: aldo4 { + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-pll-dxco-avcc"; + }; + + reg_bldo1: bldo1 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-pg-wifi-lvds"; + }; + + reg_bldo2: bldo2 { + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-dram-1v8"; + }; + + reg_bldo3: bldo3 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-cvp-pk-vid1v8"; + }; + + reg_bldo4: bldo4 { + /* not connected */ + }; + + reg_cldo1: cldo1 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-pc"; + }; + + reg_cldo2: cldo2 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc-efuse"; + }; + + reg_cldo3: cldo3 { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc-io-mmc-spi-ana"; + }; + + reg_cldo4: cldo4 { + /* not connected */ + }; + + reg_cpusldo: cpusldo { + /* supplies the management core */ + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-name =3D "vdd-cpus"; + }; + }; + }; + + axp323: pmic@36 { + compatible =3D "x-powers,axp323"; + reg =3D <0x36>; + #interrupt-cells =3D <1>; + interrupt-controller; + interrupt-parent =3D <&nmi_intc>; + interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; + status =3D "okay"; + + vin1-supply =3D <®_vcc5v>; + vin2-supply =3D <®_vcc5v>; + vin3-supply =3D <®_vcc5v>; + + regulators { + aldo1 { + /* not connected */ + }; + + dldo1 { + /* not connected */ + }; + + /* Supplies the "big" cluster (1.8 GHz cores) */ + reg_dcdc1_323: dcdc1 { + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <1160000>; + regulator-name =3D "vdd-cpub"; + }; + + /* DCDC2 is polyphased with DCDC1 */ + + /* Some RISC-V management core related voltage */ + reg_dcdc3_323: dcdc3 { + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-name =3D "vdd-dnr"; + }; + }; + }; +}; + +&r_pio { +/* + * Specifying the supply would create a circular dependency. + * + * vcc-pl-supply =3D <®_aldo3>; + */ + vcc-pm-supply =3D <®_aldo3>; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pb_pins>; + status =3D "okay"; +}; + +&usb_otg { + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&usbphy { + usb0_vbus-supply =3D <®_usb_vbus>; + usb0_vbus_det-gpios =3D <&pio 8 13 GPIO_ACTIVE_HIGH>; /* PI13 */ + status =3D "okay"; +}; --=20 2.46.2