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[71.34.69.82]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e9a5fe8e1bsm6205467a91.51.2024.11.09.22.11.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Nov 2024 22:11:12 -0800 (PST) From: Drew Fustini To: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Drew Fustini Subject: [PATCH] riscv: defconfig: enable pinctrl and dwmac support for TH1520 Date: Sat, 9 Nov 2024 21:44:11 -0800 Message-Id: <20241110054405.667779-1-drew@pdp7.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable pinctrl and ethernet dwmac driver for the TH1520 SoC boards like the BeagleV Ahead and the Sipeed LicheePi 4A. Signed-off-by: Drew Fustini --- Note: the th1520 pinctrl driver and thead dwmac ethernet driver have been applied by their respective subsystems and are in linux-next. I've successfully tested next on both the ahead and lpi4a boards. This patch is based on next-20241108. arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index b4a37345703e..99a11142c03c 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -167,6 +167,7 @@ CONFIG_PINCTRL_SOPHGO_CV1800B=3Dy CONFIG_PINCTRL_SOPHGO_CV1812H=3Dy CONFIG_PINCTRL_SOPHGO_SG2000=3Dy CONFIG_PINCTRL_SOPHGO_SG2002=3Dy +CONFIG_PINCTRL_TH1520=3Dy CONFIG_GPIO_DWAPB=3Dy CONFIG_GPIO_SIFIVE=3Dy CONFIG_POWER_RESET_GPIO_RESTART=3Dy @@ -242,6 +243,7 @@ CONFIG_RTC_DRV_SUN6I=3Dy CONFIG_DMADEVICES=3Dy CONFIG_DMA_SUN6I=3Dm CONFIG_DW_AXI_DMAC=3Dy +CONFIG_DWMAC_THEAD=3Dy CONFIG_VIRTIO_PCI=3Dy CONFIG_VIRTIO_BALLOON=3Dy CONFIG_VIRTIO_INPUT=3Dy --=20 2.34.1