From nobody Sun Nov 24 00:04:39 2024 Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B67A3219E25 for ; Fri, 8 Nov 2024 23:46:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731109591; cv=none; b=QgRFcaF0XgtYJrN+Am8lLdXofqXGRQhJhR35ETzhRmVjiayuq4GPKQk4OWMTzP3Km6pjTDO1bAgGpdjKN9rkKXYd/WzOvaefd2sZiG7jt//QLdqpbTF8d4stxfgNIVflY2kt9gDQC2JVLhI0lwo3vncapK1LOoed5EsXWn9S8Jk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731109591; c=relaxed/simple; bh=4WNQhxTFVzj9OxWI3AqSspxmyX9aRni98b7HNrbLUeU=; h=Date:In-Reply-To:Message-Id:Mime-Version:References:Subject:From: To:Content-Type; b=QPzFbPG7oKnRgozXDwckHzmRaodIvuhn+tTAMzLTLn6/2dcILEU1ymhhIbCRuN9aUrwzsa97jIAvmVQCcaRQPYmz+W/0oXPePAyX1b51HOfcZR6NgccYKyT4wVjauWGewD54cg5pSVf8zNuFKw00Hb6fZw2cWudHv2t68GOqGfY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=qXPT9LG8; arc=none smtp.client-ip=209.85.219.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="qXPT9LG8" Received: by mail-yb1-f202.google.com with SMTP id 3f1490d57ef6-e30df8dbfd4so5537766276.0 for ; Fri, 08 Nov 2024 15:46:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1731109589; x=1731714389; darn=vger.kernel.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=B6TBZHeIGl6ZV49qGeZcbJwGXxHPnZuxi8weOPdiEEQ=; b=qXPT9LG8STPi3ExfDNmyjrHIzPgxDDr07/CH8PrsrsAqzdqSp79egTYIoExNO8dRRw ZwmRpkeyv0b+LbsW07TSXQ155xIZBHXV0yV1uUcmwun2+Ey1u6AvPyaNUXjofPSt3/CU sS0+dgU7Hirns2y62Ly1cCrYCp2BeGLaDj1I27arlg81qUUlkdl3yw6RDk1u65XYNFXi AiRaB0HhsZspLXR0uNe0/7NW1h04XoACVJ4AdKq3aFMXwKOSzpdIhtqJbxP1yvLKA8w0 Plj7R6wjNZMuKYi1Knnad9qH0JBXX/QwaYyTL/JnQHIOdKPDFrrnEug7UjUAgfqlyFIT p6PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731109589; x=1731714389; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=B6TBZHeIGl6ZV49qGeZcbJwGXxHPnZuxi8weOPdiEEQ=; b=fNrcQRNL0E7lfDPPFJDkNgnzHf/1BG1YcTdUROjGHupqyVkJE4xQwNk3Xko7OAM0Ju 1Pn1MzCyTgIkZaKgkCTxA1Vy6Y87n/Ihpy8xr0mbQ36ZwsHSGYrefn0TIRNS62eAYCkM X8vuLliY+5kDH4EJ7GK9/5Z5JZP2DkunqDNxULqnnum8BCg0h37g4ivQUTvxfdwBNgQi 5+3GUJI/VkrHGtRPUyCFMrb59AMs0UHGYLhtXXPAbxor3ekfpxi40YkAJLo3UPDeAvAI ApM562dbSe/RNe7tlmfh5x3kK9Cr9YCu/C1NOs+ArqA5zPi6ElDCrEPjBFT3Sp83vgOn z25Q== X-Forwarded-Encrypted: i=1; AJvYcCVLpe9htzJqFmFxU9MVdb6GM4CdxMq8QVzf+PFSe6KTa1GJizPW4jJmX8VVNSBCuBgBzyro+ZAa/xrTNs4=@vger.kernel.org X-Gm-Message-State: AOJu0Ywpbt8XGcwfI2rqj19x/7JUBzls1g8+b9VvyecqjS387+zRjh/h U1LjvRt++J9hrkDNB5lLFASlp7OoW3LMMVMVyeUcZmZU/nQBHwGJy6QtpUvVwcgGh7er3LhrWm4 B91Pv3A== X-Google-Smtp-Source: AGHT+IFBKIwBv7u+YALOPRK86uuoDfCWjxyXwQiyI85pCg6TQIH8Yd9OCGwP0YpHFXO3hSN4uR7cUXLNSSbj X-Received: from irogers.svl.corp.google.com ([2620:15c:2c5:11:6fd2:1e36:6d8c:7c49]) (user=irogers job=sendgmr) by 2002:a25:264d:0:b0:e25:d46a:a6b6 with SMTP id 3f1490d57ef6-e337f8d405emr5966276.8.1731109588718; Fri, 08 Nov 2024 15:46:28 -0800 (PST) Date: Fri, 8 Nov 2024 15:45:53 -0800 In-Reply-To: <20241108234606.429459-1-irogers@google.com> Message-Id: <20241108234606.429459-9-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241108234606.429459-1-irogers@google.com> X-Mailer: git-send-email 2.47.0.277.g8800431eea-goog Subject: [PATCH v4 08/20] perf arm64: Remove dwarf-regs.c From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nick Terrell , "Masami Hiramatsu (Google)" , Changbin Du , Guilherme Amadio , Yang Jihong , Aditya Gupta , Athira Rajeev , Masahiro Yamada , Bibo Mao , Huacai Chen , Kajol Jain , Atish Patra , Shenlin Liang , Anup Patel , Oliver Upton , "Steinar H. Gunderson" , "Dr. David Alan Gilbert" , Chen Pei , Dima Kogan , Przemek Kitszel , "David S. Miller" , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The file just provides the function get_arch_regstr, however, if in the only caller get_dwarf_regstr EM_HOST is used for the EM_NONE case the function can never be called. So remove as dead code. Tidy up the EM_NONE cases for arm64 in dwarf-regs.c. Reviewed-by: Masami Hiramatsu (Google) Signed-off-by: Ian Rogers --- tools/perf/arch/arm64/util/Build | 1 - tools/perf/arch/arm64/util/dwarf-regs.c | 80 ------------------------- tools/perf/util/dwarf-regs.c | 4 +- tools/perf/util/include/dwarf-regs.h | 2 +- 4 files changed, 3 insertions(+), 84 deletions(-) delete mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/= Build index 4387a6d6a6c3..a74521b79eaa 100644 --- a/tools/perf/arch/arm64/util/Build +++ b/tools/perf/arch/arm64/util/Build @@ -4,7 +4,6 @@ perf-util-y +=3D perf_regs.o perf-util-y +=3D tsc.o perf-util-y +=3D pmu.o perf-util-$(CONFIG_LIBTRACEEVENT) +=3D kvm-stat.o -perf-util-$(CONFIG_LIBDW) +=3D dwarf-regs.o perf-util-$(CONFIG_LOCAL_LIBUNWIND) +=3D unwind-libunwind.o perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) +=3D unwind-libdw.o =20 diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm6= 4/util/dwarf-regs.c deleted file mode 100644 index 343a62fa4199..000000000000 --- a/tools/perf/arch/arm64/util/dwarf-regs.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Mapping of DWARF debug register numbers into register names. - * - * Copyright (C) 2010 Will Deacon, ARM Ltd. - */ - -#include -#include -#include -#include -#include - -struct regs_dwarfnum { - const char *name; - unsigned int dwarfnum; -}; - -#define REG_DWARFNUM_NAME(r, num) {.name =3D r, .dwarfnum =3D num} -#define GPR_DWARFNUM_NAME(num) \ - {.name =3D __stringify(%x##num), .dwarfnum =3D num} -#define REG_DWARFNUM_END {.name =3D NULL, .dwarfnum =3D 0} - -/* - * Reference: - * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadw= arf64.pdf - */ -static const struct regs_dwarfnum regdwarfnum_table[] =3D { - GPR_DWARFNUM_NAME(0), - GPR_DWARFNUM_NAME(1), - GPR_DWARFNUM_NAME(2), - GPR_DWARFNUM_NAME(3), - GPR_DWARFNUM_NAME(4), - GPR_DWARFNUM_NAME(5), - GPR_DWARFNUM_NAME(6), - GPR_DWARFNUM_NAME(7), - GPR_DWARFNUM_NAME(8), - GPR_DWARFNUM_NAME(9), - GPR_DWARFNUM_NAME(10), - GPR_DWARFNUM_NAME(11), - GPR_DWARFNUM_NAME(12), - GPR_DWARFNUM_NAME(13), - GPR_DWARFNUM_NAME(14), - GPR_DWARFNUM_NAME(15), - GPR_DWARFNUM_NAME(16), - GPR_DWARFNUM_NAME(17), - GPR_DWARFNUM_NAME(18), - GPR_DWARFNUM_NAME(19), - GPR_DWARFNUM_NAME(20), - GPR_DWARFNUM_NAME(21), - GPR_DWARFNUM_NAME(22), - GPR_DWARFNUM_NAME(23), - GPR_DWARFNUM_NAME(24), - GPR_DWARFNUM_NAME(25), - GPR_DWARFNUM_NAME(26), - GPR_DWARFNUM_NAME(27), - GPR_DWARFNUM_NAME(28), - GPR_DWARFNUM_NAME(29), - REG_DWARFNUM_NAME("%lr", 30), - REG_DWARFNUM_NAME("%sp", 31), - REG_DWARFNUM_END, -}; - -/** - * get_arch_regstr() - lookup register name from it's DWARF register number - * @n: the DWARF register number - * - * get_arch_regstr() returns the name of the register in struct - * regdwarfnum_table from it's DWARF register number. If the register is n= ot - * found in the table, this returns NULL; - */ -const char *get_arch_regstr(unsigned int n) -{ - const struct regs_dwarfnum *roff; - - for (roff =3D regdwarfnum_table; roff->name !=3D NULL; roff++) - if (roff->dwarfnum =3D=3D n) - return roff->name; - return NULL; -} diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c index eac99a246737..18e916c8e993 100644 --- a/tools/perf/util/dwarf-regs.c +++ b/tools/perf/util/dwarf-regs.c @@ -32,14 +32,14 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int flags __maybe_unused) { -#if EM_HOST =3D=3D EM_X86_64 || EM_HOST =3D=3D EM_386 +#if EM_HOST =3D=3D EM_X86_64 || EM_HOST =3D=3D EM_386 || EM_HOST =3D=3D EM= _AARCH64 if (machine =3D=3D EM_NONE) { /* Generic arch - use host arch */ machine =3D EM_HOST; } #endif switch (machine) { -#if EM_HOST !=3D EM_X86_64 && EM_HOST !=3D EM_386 +#if EM_HOST !=3D EM_X86_64 && EM_HOST !=3D EM_386 && EM_HOST !=3D EM_AARCH= 64 case EM_NONE: /* Generic arch - use host arch */ return get_arch_regstr(n); #endif diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include= /dwarf-regs.h index 6aa66c375942..f976528fdfd6 100644 --- a/tools/perf/util/include/dwarf-regs.h +++ b/tools/perf/util/include/dwarf-regs.h @@ -89,7 +89,7 @@ #define DWARF_REG_FB 0xd3affb /* random number */ =20 #ifdef HAVE_LIBDW_SUPPORT -#if !defined(__x86_64__) && !defined(__i386__) +#if !defined(__x86_64__) && !defined(__i386__) && !defined(__aarch64__) const char *get_arch_regstr(unsigned int n); #endif =20 --=20 2.47.0.277.g8800431eea-goog