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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241108-fd-dp-audio-fixup-v1-3-40c8eeb60cf5@linaro.org> References: <20241108-fd-dp-audio-fixup-v1-0-40c8eeb60cf5@linaro.org> In-Reply-To: <20241108-fd-dp-audio-fixup-v1-0-40c8eeb60cf5@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Paloma Arellano Cc: Douglas Anderson , Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7080; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=qJsME0Fo5L5iyM9tsigPZZ2P8Br4moecQIo8oDmWM5I=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnLVmOC1DlinBaaguDpNckaxOnzamc/glKEulQn sa/tY57UNeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZy1ZjgAKCRCLPIo+Aiko 1VlDB/4g4FRBCMJeMiW97AqpLD+5jBr8423/riiTyLoPtxvMhBTvyc1rcOHxy5clOJng2yGe3FY GcST+jUxzeNprxENm5uuBNXyM7+z0T6Xr2Wz/KKvaFETJdU+o4hBi2PIsJBdLmzl2Tg8NGcwplr SjJ0F1I78D674PDTK0UOoF/qbnHSFuWyKoLHQIMZpeKldBGAfUuG4jQjzqeo7boDt0uzfytQm2O TRGXKz2oqcjX4SxmWmXF24Wj4LBscdJJc2Wc4SRT2CTk1fu7fzLHbxXx5DPD/SuRVFTIGiJbiJ0 EOo6cFh98aueCjTPQ9y/Vedg48XUx42Sw1ictpk5qS7OfymQ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Drop even more dead code. The msm_dp_panel_tpg_config() has never been called. Drop it and the implementation inside dp_catalog.c Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_catalog.c | 78 ---------------------------------= ---- drivers/gpu/drm/msm/dp/dp_catalog.h | 3 -- drivers/gpu/drm/msm/dp/dp_panel.c | 28 ------------- drivers/gpu/drm/msm/dp/dp_panel.h | 1 - 4 files changed, 110 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/d= p_catalog.c index 0357dec1acd5773f25707e7ebdfca4b1d2b1bb4e..9ca2a4ab251106d72219b11c2be= 7049b4a2611d5 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -963,84 +963,6 @@ void msm_dp_catalog_panel_disable_vsc_sdp(struct msm_d= p_catalog *msm_dp_catalog) msm_dp_catalog_panel_update_sdp(msm_dp_catalog); } =20 -void msm_dp_catalog_panel_tpg_enable(struct msm_dp_catalog *msm_dp_catalog, - struct drm_display_mode *drm_mode) -{ - struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, - struct msm_dp_catalog_private, msm_dp_catalog); - u32 hsync_period, vsync_period; - u32 display_v_start, display_v_end; - u32 hsync_start_x, hsync_end_x; - u32 v_sync_width; - u32 hsync_ctl; - u32 display_hctl; - - /* TPG config parameters*/ - hsync_period =3D drm_mode->htotal; - vsync_period =3D drm_mode->vtotal; - - display_v_start =3D ((drm_mode->vtotal - drm_mode->vsync_start) * - hsync_period); - display_v_end =3D ((vsync_period - (drm_mode->vsync_start - - drm_mode->vdisplay)) - * hsync_period) - 1; - - display_v_start +=3D drm_mode->htotal - drm_mode->hsync_start; - display_v_end -=3D (drm_mode->hsync_start - drm_mode->hdisplay); - - hsync_start_x =3D drm_mode->htotal - drm_mode->hsync_start; - hsync_end_x =3D hsync_period - (drm_mode->hsync_start - - drm_mode->hdisplay) - 1; - - v_sync_width =3D drm_mode->vsync_end - drm_mode->vsync_start; - - hsync_ctl =3D (hsync_period << 16) | - (drm_mode->hsync_end - drm_mode->hsync_start); - display_hctl =3D (hsync_end_x << 16) | hsync_start_x; - - - msm_dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, 0x0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_HSYNC_CTL, hsync_ctl); - msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period * - hsync_period); - msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width * - hsync_period); - msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_HCTL, display_hctl); - msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_HCTL, 0); - msm_dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F0, display_v_start); - msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F0, display_v_end); - msm_dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F0, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F0, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F1, 0); - msm_dp_write_p0(catalog, MMSS_DP_INTF_POLARITY_CTL, 0); - - msm_dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, - DP_TPG_CHECKERED_RECT_PATTERN); - msm_dp_write_p0(catalog, MMSS_DP_TPG_VIDEO_CONFIG, - DP_TPG_VIDEO_CONFIG_BPP_8BIT | - DP_TPG_VIDEO_CONFIG_RGB); - msm_dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, - DP_BIST_ENABLE_DPBIST_EN); - msm_dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, - DP_TIMING_ENGINE_EN_EN); - drm_dbg_dp(catalog->drm_dev, "%s: enabled tpg\n", __func__); -} - -void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalo= g) -{ - struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, - struct msm_dp_catalog_private, msm_dp_catalog); - - msm_dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, 0x0); - msm_dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, 0x0); - msm_dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0); -} - static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx,= size_t *len) { struct resource *res; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/d= p_catalog.h index 62a401d8f75a6af06445a42af657d65e3fe542c5..ebac3e6aa6b3d51c7a74fd4318a= e7c595b3bf2e4 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -104,9 +104,6 @@ int msm_dp_catalog_panel_timing_cfg(struct msm_dp_catal= og *msm_dp_catalog, u32 t u32 sync_start, u32 width_blanking, u32 msm_dp_active); void msm_dp_catalog_panel_enable_vsc_sdp(struct msm_dp_catalog *msm_dp_cat= alog, struct dp_sdp *vsc_sdp); void msm_dp_catalog_panel_disable_vsc_sdp(struct msm_dp_catalog *msm_dp_ca= talog); -void msm_dp_catalog_panel_tpg_enable(struct msm_dp_catalog *msm_dp_catalog, - struct drm_display_mode *drm_mode); -void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalo= g); =20 struct msm_dp_catalog *msm_dp_catalog_get(struct device *dev); =20 diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_= panel.c index 7d122496723a32fd591d094269397a9fdd51fe44..7a5656d8702e4f9c6f8e13d0078= 8a5bdbbe3729f 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -242,34 +242,6 @@ void msm_dp_panel_handle_sink_request(struct msm_dp_pa= nel *msm_dp_panel) } } =20 -void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enabl= e) -{ - struct msm_dp_catalog *catalog; - struct msm_dp_panel_private *panel; - - if (!msm_dp_panel) { - DRM_ERROR("invalid input\n"); - return; - } - - panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); - catalog =3D panel->catalog; - - if (!panel->panel_on) { - drm_dbg_dp(panel->drm_dev, - "DP panel not enabled, handle TPG on next on\n"); - return; - } - - if (!enable) { - msm_dp_catalog_panel_tpg_disable(catalog); - return; - } - - drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n"); - msm_dp_catalog_panel_tpg_enable(catalog, &panel->msm_dp_panel.msm_dp_mode= .drm_mode); -} - static int msm_dp_panel_setup_vsc_sdp_yuv_420(struct msm_dp_panel *msm_dp_= panel) { struct msm_dp_catalog *catalog; diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_= panel.h index 47c1d349be470b60596b64a7bc8c7c39d2e8fdd1..317e2a13d7e917acd78edd2f1c9= 9c4be3de902bd 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.h +++ b/drivers/gpu/drm/msm/dp/dp_panel.h @@ -62,7 +62,6 @@ u32 msm_dp_panel_get_mode_bpp(struct msm_dp_panel *msm_dp= _panel, u32 mode_max_bp int msm_dp_panel_get_modes(struct msm_dp_panel *msm_dp_panel, struct drm_connector *connector); void msm_dp_panel_handle_sink_request(struct msm_dp_panel *msm_dp_panel); -void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enabl= e); =20 /** * is_link_rate_valid() - validates the link rate --=20 2.39.5