From nobody Sun Nov 24 03:08:25 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FF0C216DE0 for ; Thu, 7 Nov 2024 17:06:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730999194; cv=none; b=a7q5k/lskumzfvrGkyRDRkUNI2OxWnX+KImPqvd9qIPf8/qek1YWBhnFwxv7APjcziODiGBnA5U/VIrJiGUQ6elSKCA607pvf660zU+M0MYZuoSg6ZfwzMJuI8qggEBq9d3q49IqelbhQoSFpUAshztQooz3UeGL2OOvJV+RWxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730999194; c=relaxed/simple; bh=OK0f+5lJrvwLpOqaQ5V322eEBNDZKa79//bt026i2kg=; h=Subject:To:Cc:From:Date:Message-Id; b=JEI45S8wxx7M7Cbi7xgW/WR8TdOBQ1NfFmlenBr2jOPZyPhvuLMsYOH41hoC51aKpFEJm00TvxuPjZc2oi367ZH8sEJJ6bHLNfAqpmtP2FjRXQNSARO5WprNvZOVtJ+Cy5yTbpJAXdqRQnfVWLt2fAblpr/LCtRU+iXuUc1cY3Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YsDkkzEY; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YsDkkzEY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730999192; x=1762535192; h=subject:to:cc:from:date:message-id; bh=OK0f+5lJrvwLpOqaQ5V322eEBNDZKa79//bt026i2kg=; b=YsDkkzEY46H3Nuv6MCBnJqDp+p/cvv8jju39l6Kh85KGq3yurHE/z6eL rrLQcy2yhBXyOtMkhr6f/k24U5PA8J/dNJ1actDfyUe7zHaCXXn7Xms9O kTxDzI13aUf9yO7ekVocmsXDkazvjxISd9cU3o3IBKNkatvYouk2ZhN0M RUbsWHy/DOcmY2swyAzbpGeyYKkzSIUsW3E3SOu0MQMjucjPbJRmIolcm W7ckyTEROXaoiAde+XKXbNQaxr0hzefFZ2bMqdr3Hjnzs0HpBfxnxeeJl ICTTR8I40deoUUdxwjZ8l3CPqa9hTZ5BBmp1P+diT6mJHSw2vowPUIY2O Q==; X-CSE-ConnectionGUID: uEQShe9PQHKN70IHbXy7mQ== X-CSE-MsgGUID: 1T9iMWs7RCSsoBEabwAHNg== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="41964251" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="41964251" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2024 09:06:31 -0800 X-CSE-ConnectionGUID: Vfay7i5dQyeHIway0tL+og== X-CSE-MsgGUID: q480YEz+SRq24Bd2SzqGFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,135,1728975600"; d="scan'208";a="85152639" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa010.jf.intel.com with ESMTP; 07 Nov 2024 09:06:31 -0800 Subject: [RFC][PATCH] x86/cpu/bugs: Consider having old Intel microcode to be a vulnerability To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,Dave Hansen From: Dave Hansen Date: Thu, 07 Nov 2024 09:06:30 -0800 Message-Id: <20241107170630.2A92B8D3@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen You can't practically run old microcode and consider a system secure these days. So, let's call old microcode what it is: a vulnerability. Expose that vulnerability in a place that folks can find it: /sys/devices/system/cpu/vulnerabilities/old_microcode This is obviously imperfect. But it means that a single file can be maintained with a single list of microcode versions and there is no need to track which version fixed a given bug. =3D=3D Microcode Revision Discussion =3D=3D The microcode versions in the table were generated from the Intel microcode git repo: 29f82f7429c ("microcode-20241029 Release") It can be argued that the versions that the kernel picks to call "old" should be a revision or two old. Which specific version is picked is less important to me than picking *a* version and enforcing it. This repository contains only microcode versions that Intel has deemed to be OS-loadable. It is quite possible that the BIOS has loaded a newer microcode than the latest in this repo. That means that the vulnerability can be considered to answer this question: Are we running on the latest OS-loadable microcode, or something even later that the BIOS loaded? In other words, Intel never publishes an authoritative list of CPUs and latest microcode revisions. Until it does, this is the best that Linux can do. Also note that the "intel-ucode-defs.h" file is simple, ugly and has lots of magic numbers. That's on purpose and should allow a single file to be shared across lots of stable kernel regardless of if they have the new "VFM" infrastructure or not. It was generated with a dumb script. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/cpufeatures.h | 1=20 b/arch/x86/kernel/cpu/bugs.c | 8 + b/arch/x86/kernel/cpu/common.c | 28 +++ b/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h | 150 ++++++++++++++++= +++++ b/drivers/base/cpu.c | 3=20 b/include/linux/cpu.h | 2=20 6 files changed, 192 insertions(+) diff -puN arch/x86/include/asm/cpufeatures.h~old-ucode-0 arch/x86/include/a= sm/cpufeatures.h --- a/arch/x86/include/asm/cpufeatures.h~old-ucode-0 2024-11-06 07:51:07.36= 4536033 -0800 +++ b/arch/x86/include/asm/cpufeatures.h 2024-11-06 07:51:07.372536037 -0800 @@ -525,4 +525,5 @@ #define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* "div0" AMD DIV0 speculation bu= g */ #define X86_BUG_RFDS X86_BUG(1*32 + 2) /* "rfds" CPU is vulnerable to Re= gister File Data Sampling */ #define X86_BUG_BHI X86_BUG(1*32 + 3) /* "bhi" CPU is affected by Branch= History Injection */ +#define X86_BUG_OLD_MICROCODE X86_BUG(1*32 + 4) /* "old_microcode" CPU ha= s old microcode, it is surely vulnerable to something */ #endif /* _ASM_X86_CPUFEATURES_H */ diff -puN arch/x86/kernel/cpu/common.c~old-ucode-0 arch/x86/kernel/cpu/comm= on.c --- a/arch/x86/kernel/cpu/common.c~old-ucode-0 2024-11-06 07:51:07.36853603= 5 -0800 +++ b/arch/x86/kernel/cpu/common.c 2024-11-07 09:01:58.709687132 -0800 @@ -1317,6 +1317,31 @@ static bool __init vulnerable_to_rfds(u6 return cpu_matches(cpu_vuln_blacklist, RFDS); } =20 +struct x86_cpu_id cpu_latest_microcdoe[] =3D { +#include "microcode/intel-ucode-defs.h" + {} +}; + +static bool __init cpu_has_old_microcode(void) +{ + const struct x86_cpu_id *m =3D x86_match_cpu(cpu_latest_microcdoe); + + /* Give unknown CPUs a pass: */ + if (!m) + return false; + + /* Consider all debug microcode to be old: */ + if (boot_cpu_data.microcode & BIT(31)) + return true; + + /* Give new microocode a pass: */ + if (boot_cpu_data.microcode >=3D m->driver_data) + return false; + + /* Uh oh, too old: */ + return true; +} + static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) { u64 x86_arch_cap_msr =3D x86_read_arch_cap_msr(); @@ -1443,6 +1468,9 @@ static void __init cpu_set_bug_bits(stru boot_cpu_has(X86_FEATURE_HYPERVISOR))) setup_force_cpu_bug(X86_BUG_BHI); =20 + if (cpu_has_old_microcode()) + setup_force_cpu_bug(X86_BUG_OLD_MICROCODE); + if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN)) return; =20 diff -puN arch/x86/kernel/cpu/microcode/intel-ucode-defs.h~old-ucode-0 arch= /x86/kernel/cpu/microcode/intel-ucode-defs.h --- a/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h~old-ucode-0 2024-11-= 06 07:51:07.368536035 -0800 +++ b/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h 2024-11-07 09:01:21.= 269674736 -0800 @@ -0,0 +1,150 @@ +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x03, .steppings =3D 0x0004, .driver_data =3D 0x= 2 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x05, .steppings =3D 0x0001, .driver_data =3D 0x= 45 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x05, .steppings =3D 0x0002, .driver_data =3D 0x= 40 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x05, .steppings =3D 0x0004, .driver_data =3D 0x= 2c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x05, .steppings =3D 0x0008, .driver_data =3D 0x= 10 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x06, .steppings =3D 0x0001, .driver_data =3D 0x= a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x06, .steppings =3D 0x0020, .driver_data =3D 0x= 3 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x06, .steppings =3D 0x0400, .driver_data =3D 0x= d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x06, .steppings =3D 0x2000, .driver_data =3D 0x= 7 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x07, .steppings =3D 0x0002, .driver_data =3D 0x= 14 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x07, .steppings =3D 0x0004, .driver_data =3D 0x= 38 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x07, .steppings =3D 0x0008, .driver_data =3D 0x= 2e } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x08, .steppings =3D 0x0002, .driver_data =3D 0x= 11 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x08, .steppings =3D 0x0008, .driver_data =3D 0x= 8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x08, .steppings =3D 0x0040, .driver_data =3D 0x= c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x08, .steppings =3D 0x0400, .driver_data =3D 0x= 5 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x09, .steppings =3D 0x0020, .driver_data =3D 0x= 47 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0a, .steppings =3D 0x0001, .driver_data =3D 0x= 3 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0a, .steppings =3D 0x0002, .driver_data =3D 0x= 1 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0b, .steppings =3D 0x0002, .driver_data =3D 0x= 1d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0b, .steppings =3D 0x0010, .driver_data =3D 0x= 2 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0d, .steppings =3D 0x0040, .driver_data =3D 0x= 18 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0e, .steppings =3D 0x0100, .driver_data =3D 0x= 39 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0e, .steppings =3D 0x1000, .driver_data =3D 0x= 59 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x0004, .driver_data =3D 0x= 5d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x0040, .driver_data =3D 0x= d2 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x0080, .driver_data =3D 0x= 6b } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x0400, .driver_data =3D 0x= 95 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x0800, .driver_data =3D 0x= bc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x0f, .steppings =3D 0x2000, .driver_data =3D 0x= a4 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x16, .steppings =3D 0x0002, .driver_data =3D 0x= 44 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x17, .steppings =3D 0x0040, .driver_data =3D 0x= 60f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x17, .steppings =3D 0x0080, .driver_data =3D 0x= 70a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x17, .steppings =3D 0x0400, .driver_data =3D 0x= a0b } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1a, .steppings =3D 0x0010, .driver_data =3D 0x= 12 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1a, .steppings =3D 0x0020, .driver_data =3D 0x= 1d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1c, .steppings =3D 0x0004, .driver_data =3D 0x= 219 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1c, .steppings =3D 0x0400, .driver_data =3D 0x= 107 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1d, .steppings =3D 0x0002, .driver_data =3D 0x= 29 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x1e, .steppings =3D 0x0020, .driver_data =3D 0x= a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x25, .steppings =3D 0x0004, .driver_data =3D 0x= 11 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x25, .steppings =3D 0x0020, .driver_data =3D 0x= 7 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x26, .steppings =3D 0x0002, .driver_data =3D 0x= 105 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2a, .steppings =3D 0x0080, .driver_data =3D 0x= 2f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2c, .steppings =3D 0x0004, .driver_data =3D 0x= 1f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2d, .steppings =3D 0x0040, .driver_data =3D 0x= 621 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2d, .steppings =3D 0x0080, .driver_data =3D 0x= 71a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2e, .steppings =3D 0x0040, .driver_data =3D 0x= d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x2f, .steppings =3D 0x0004, .driver_data =3D 0x= 3b } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x37, .steppings =3D 0x0100, .driver_data =3D 0x= 838 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x37, .steppings =3D 0x0200, .driver_data =3D 0x= 90d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3a, .steppings =3D 0x0200, .driver_data =3D 0x= 21 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3c, .steppings =3D 0x0008, .driver_data =3D 0x= 28 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3d, .steppings =3D 0x0010, .driver_data =3D 0x= 2f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3e, .steppings =3D 0x0010, .driver_data =3D 0x= 42e } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3e, .steppings =3D 0x0040, .driver_data =3D 0x= 600 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3e, .steppings =3D 0x0080, .driver_data =3D 0x= 715 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3f, .steppings =3D 0x0004, .driver_data =3D 0x= 49 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x3f, .steppings =3D 0x0010, .driver_data =3D 0x= 1a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x45, .steppings =3D 0x0002, .driver_data =3D 0x= 26 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x46, .steppings =3D 0x0002, .driver_data =3D 0x= 1c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x47, .steppings =3D 0x0002, .driver_data =3D 0x= 22 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x4c, .steppings =3D 0x0008, .driver_data =3D 0x= 368 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x4c, .steppings =3D 0x0010, .driver_data =3D 0x= 411 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x4d, .steppings =3D 0x0100, .driver_data =3D 0x= 12d } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x4e, .steppings =3D 0x0008, .driver_data =3D 0x= f0 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0008, .driver_data =3D 0x= 1000191 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0010, .driver_data =3D 0x= 2007006 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0020, .driver_data =3D 0x= 3000010 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0040, .driver_data =3D 0x= 4003605 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0080, .driver_data =3D 0x= 5003707 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x55, .steppings =3D 0x0800, .driver_data =3D 0x= 7002904 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0004, .driver_data =3D 0x= 1c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0008, .driver_data =3D 0x= 700001c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0010, .driver_data =3D 0x= f00001a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x56, .steppings =3D 0x0020, .driver_data =3D 0x= e000015 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5c, .steppings =3D 0x0004, .driver_data =3D 0x= 14 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5c, .steppings =3D 0x0200, .driver_data =3D 0x= 48 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5c, .steppings =3D 0x0400, .driver_data =3D 0x= 28 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5e, .steppings =3D 0x0008, .driver_data =3D 0x= f0 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x5f, .steppings =3D 0x0002, .driver_data =3D 0x= 3e } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x66, .steppings =3D 0x0008, .driver_data =3D 0x= 2a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6a, .steppings =3D 0x0020, .driver_data =3D 0x= c0002f0 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6a, .steppings =3D 0x0040, .driver_data =3D 0x= d0003e7 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x6c, .steppings =3D 0x0002, .driver_data =3D 0x= 10002b0 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7a, .steppings =3D 0x0002, .driver_data =3D 0x= 42 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7a, .steppings =3D 0x0100, .driver_data =3D 0x= 24 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x7e, .steppings =3D 0x0020, .driver_data =3D 0x= c6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8a, .steppings =3D 0x0002, .driver_data =3D 0x= 33 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0002, .driver_data =3D 0x= b8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8c, .steppings =3D 0x0004, .driver_data =3D 0x= 38 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8d, .steppings =3D 0x0002, .driver_data =3D 0x= 52 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0200, .driver_data =3D 0x= f6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0400, .driver_data =3D 0x= f6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x0800, .driver_data =3D 0x= f6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8e, .steppings =3D 0x1000, .driver_data =3D 0x= fc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0100, .driver_data =3D 0x= 2c000390 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0080, .driver_data =3D 0x= 2b0005c0 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0040, .driver_data =3D 0x= 2c000390 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0020, .driver_data =3D 0x= 2c000390 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x8f, .steppings =3D 0x0010, .driver_data =3D 0x= 2c000390 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x96, .steppings =3D 0x0002, .driver_data =3D 0x= 1a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0004, .driver_data =3D 0x= 36 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x97, .steppings =3D 0x0020, .driver_data =3D 0x= 36 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0004, .driver_data =3D 0x= 36 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbf, .steppings =3D 0x0020, .driver_data =3D 0x= 36 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0008, .driver_data =3D 0x= 434 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9a, .steppings =3D 0x0010, .driver_data =3D 0x= 434 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9c, .steppings =3D 0x0001, .driver_data =3D 0x= 24000026 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0200, .driver_data =3D 0x= f8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0400, .driver_data =3D 0x= f8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x0800, .driver_data =3D 0x= f6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x1000, .driver_data =3D 0x= f8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0x9e, .steppings =3D 0x2000, .driver_data =3D 0x= 100 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0004, .driver_data =3D 0x= fc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0008, .driver_data =3D 0x= fc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa5, .steppings =3D 0x0020, .driver_data =3D 0x= fc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0001, .driver_data =3D 0x= fe } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa6, .steppings =3D 0x0002, .driver_data =3D 0x= fc } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xa7, .steppings =3D 0x0002, .driver_data =3D 0x= 62 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xaa, .steppings =3D 0x0010, .driver_data =3D 0x= 1f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xb7, .steppings =3D 0x0002, .driver_data =3D 0x= 12b } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0004, .driver_data =3D 0x= 4122 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0008, .driver_data =3D 0x= 4122 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xba, .steppings =3D 0x0100, .driver_data =3D 0x= 4122 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xbe, .steppings =3D 0x0001, .driver_data =3D 0x= 1a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xcf, .steppings =3D 0x0004, .driver_data =3D 0x= 21000230 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0x6, .model =3D 0xcf, .steppings =3D 0x0002, .driver_data =3D 0x= 21000230 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x00, .steppings =3D 0x0080, .driver_data =3D 0x= 12 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x00, .steppings =3D 0x0400, .driver_data =3D 0x= 15 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x01, .steppings =3D 0x0004, .driver_data =3D 0x= 2e } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x02, .steppings =3D 0x0010, .driver_data =3D 0x= 21 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x02, .steppings =3D 0x0020, .driver_data =3D 0x= 2c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x02, .steppings =3D 0x0040, .driver_data =3D 0x= 10 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x02, .steppings =3D 0x0080, .driver_data =3D 0x= 39 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x02, .steppings =3D 0x0200, .driver_data =3D 0x= 2f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x03, .steppings =3D 0x0004, .driver_data =3D 0x= a } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x03, .steppings =3D 0x0008, .driver_data =3D 0x= c } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x03, .steppings =3D 0x0010, .driver_data =3D 0x= 17 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0002, .driver_data =3D 0x= 17 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0008, .driver_data =3D 0x= 5 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0010, .driver_data =3D 0x= 6 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0080, .driver_data =3D 0x= 3 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0100, .driver_data =3D 0x= e } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0200, .driver_data =3D 0x= 3 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x04, .steppings =3D 0x0400, .driver_data =3D 0x= 4 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x06, .steppings =3D 0x0004, .driver_data =3D 0x= f } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x06, .steppings =3D 0x0010, .driver_data =3D 0x= 4 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x06, .steppings =3D 0x0020, .driver_data =3D 0x= 8 } +{ .flags =3D X86_CPU_ID_FLAG_ENTRY_VALID, .vendor =3D X86_VENDOR_INTEL, .f= amily =3D 0xf, .model =3D 0x06, .steppings =3D 0x0100, .driver_data =3D 0x= 9 } diff -puN arch/x86/kernel/cpu/bugs.c~old-ucode-0 arch/x86/kernel/cpu/bugs.c --- a/arch/x86/kernel/cpu/bugs.c~old-ucode-0 2024-11-06 07:58:23.256734986 = -0800 +++ b/arch/x86/kernel/cpu/bugs.c 2024-11-06 08:31:44.045967210 -0800 @@ -2945,6 +2945,9 @@ static ssize_t cpu_show_common(struct de case X86_BUG_RFDS: return rfds_show_state(buf); =20 + case X86_BUG_OLD_MICROCODE: + return sysfs_emit(buf, "Vulnerable\n"); + default: break; } @@ -3024,6 +3027,11 @@ ssize_t cpu_show_reg_file_data_sampling( { return cpu_show_common(dev, attr, buf, X86_BUG_RFDS); } + +ssize_t cpu_show_old_microcode(struct device *dev, struct device_attribute= *attr, char *buf) +{ + return cpu_show_common(dev, attr, buf, X86_BUG_OLD_MICROCODE); +} #endif =20 void __warn_thunk(void) diff -puN drivers/base/cpu.c~old-ucode-0 drivers/base/cpu.c --- a/drivers/base/cpu.c~old-ucode-0 2024-11-06 08:26:51.505813735 -0800 +++ b/drivers/base/cpu.c 2024-11-06 08:29:56.925911521 -0800 @@ -599,6 +599,7 @@ CPU_SHOW_VULN_FALLBACK(retbleed); CPU_SHOW_VULN_FALLBACK(spec_rstack_overflow); CPU_SHOW_VULN_FALLBACK(gds); CPU_SHOW_VULN_FALLBACK(reg_file_data_sampling); +CPU_SHOW_VULN_FALLBACK(old_microcode); =20 static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL); static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL); @@ -614,6 +615,7 @@ static DEVICE_ATTR(retbleed, 0444, cpu_s static DEVICE_ATTR(spec_rstack_overflow, 0444, cpu_show_spec_rstack_overfl= ow, NULL); static DEVICE_ATTR(gather_data_sampling, 0444, cpu_show_gds, NULL); static DEVICE_ATTR(reg_file_data_sampling, 0444, cpu_show_reg_file_data_sa= mpling, NULL); +static DEVICE_ATTR(old_microcode, 0444, cpu_show_old_microcode, NULL); =20 static struct attribute *cpu_root_vulnerabilities_attrs[] =3D { &dev_attr_meltdown.attr, @@ -630,6 +632,7 @@ static struct attribute *cpu_root_vulner &dev_attr_spec_rstack_overflow.attr, &dev_attr_gather_data_sampling.attr, &dev_attr_reg_file_data_sampling.attr, + &dev_attr_old_microcode.attr, NULL }; =20 diff -puN include/linux/cpu.h~old-ucode-0 include/linux/cpu.h --- a/include/linux/cpu.h~old-ucode-0 2024-11-06 08:32:44.333998355 -0800 +++ b/include/linux/cpu.h 2024-11-06 08:33:02.998007967 -0800 @@ -77,6 +77,8 @@ extern ssize_t cpu_show_gds(struct devic struct device_attribute *attr, char *buf); extern ssize_t cpu_show_reg_file_data_sampling(struct device *dev, struct device_attribute *attr, char *buf); +extern ssize_t cpu_show_old_microcode(struct device *dev, + struct device_attribute *attr, char *buf); =20 extern __printf(4, 5) struct device *cpu_device_create(struct device *parent, void *drvdata, _