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charset="utf-8" Implements tc offload support for rvu representors.=20 Usage example: - Add tc rule to drop packets with vlan id 3 using port representor(Rpf1vf0).=20 # tc filter add dev Rpf1vf0 protocol 802.1Q parent ffff: flower vlan_id 3 vlan_ethtype ipv4 skip_sw action drop - Redirect packets with vlan id 5 and IPv4 packets to eth1, after stripping vlan header. # tc filter add dev Rpf1vf0 ingress protocol 802.1Q flower vlan_id 5 vlan_ethtype ipv4 skip_sw action vlan pop action mirred ingress redirect dev eth1 Signed-off-by: Geetha sowjanya --- .../marvell/octeontx2/af/rvu_npc_fs.c | 14 ++- .../ethernet/marvell/octeontx2/af/rvu_rep.c | 4 + .../marvell/octeontx2/nic/otx2_common.h | 7 ++ .../marvell/octeontx2/nic/otx2_flows.c | 5 - .../ethernet/marvell/octeontx2/nic/otx2_tc.c | 25 ++-- .../net/ethernet/marvell/octeontx2/nic/rep.c | 115 ++++++++++++++++++ .../net/ethernet/marvell/octeontx2/nic/rep.h | 1 + 7 files changed, 154 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drive= rs/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 150635de2bd5..9d08fd466a43 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -1416,6 +1416,7 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, struct npc_install_flow_rsp *rsp) { bool from_vf =3D !!(req->hdr.pcifunc & RVU_PFVF_FUNC_MASK); + bool from_rep_dev =3D !!is_rep_dev(rvu, req->hdr.pcifunc); struct rvu_switch *rswitch =3D &rvu->rswitch; int blkaddr, nixlf, err; struct rvu_pfvf *pfvf; @@ -1472,14 +1473,19 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *r= vu, /* AF installing for a PF/VF */ if (!req->hdr.pcifunc) target =3D req->vf; + /* PF installing for its VF */ - else if (!from_vf && req->vf) { + if (!from_vf && req->vf && !from_rep_dev) { target =3D (req->hdr.pcifunc & ~RVU_PFVF_FUNC_MASK) | req->vf; pf_set_vfs_mac =3D req->default_rule && (req->features & BIT_ULL(NPC_DMAC)); } - /* msg received from PF/VF */ + + /* Representor device installing for a representee */ + if (from_rep_dev && req->vf) + target =3D req->vf; else + /* msg received from PF/VF */ target =3D req->hdr.pcifunc; =20 /* ignore chan_mask in case pf func is not AF, revisit later */ @@ -1492,8 +1498,10 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rv= u, =20 pfvf =3D rvu_get_pfvf(rvu, target); =20 + if (from_rep_dev) + req->channel =3D pfvf->rx_chan_base; /* PF installing for its VF */ - if (req->hdr.pcifunc && !from_vf && req->vf) + if (req->hdr.pcifunc && !from_vf && req->vf && !from_rep_dev) set_bit(PF_SET_VF_CFG, &pfvf->flags); =20 /* update req destination mac addr */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_rep.c index 97b682291e3f..052ae5923e3a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c @@ -427,6 +427,10 @@ int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct e= sw_cfg_req *req, return 0; =20 rvu->rep_mode =3D req->ena; + + if (!rvu->rep_mode) + rvu_npc_free_mcam_entries(rvu, req->hdr.pcifunc, -1); + return 0; } =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/dri= vers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index be28a19ec2d4..566848663fea 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -1142,4 +1142,11 @@ int otx2_get_txq_by_classid(struct otx2_nic *pfvf, u= 16 classid); void otx2_qos_config_txschq(struct otx2_nic *pfvf); void otx2_clean_qos_queues(struct otx2_nic *pfvf); int rvu_event_up_notify(struct otx2_nic *pf, struct rep_event *info); +int otx2_setup_tc_cls_flower(struct otx2_nic *nic, + struct flow_cls_offload *cls_flower); + +static inline int mcam_entry_cmp(const void *a, const void *b) +{ + return *(u16 *)a - *(u16 *)b; +} #endif /* OTX2_COMMON_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/driv= ers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c index 58720a161ee2..47bfd1fb37d4 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c @@ -64,11 +64,6 @@ static int otx2_free_ntuple_mcam_entries(struct otx2_nic= *pfvf) return 0; } =20 -static int mcam_entry_cmp(const void *a, const void *b) -{ - return *(u16 *)a - *(u16 *)b; -} - int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count) { struct otx2_flow_config *flow_cfg =3D pfvf->flow_cfg; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c b/drivers= /net/ethernet/marvell/octeontx2/nic/otx2_tc.c index e63cc1eb6d89..9a226ca74425 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c @@ -443,6 +443,7 @@ static int otx2_tc_parse_actions(struct otx2_nic *nic, struct flow_action_entry *act; struct net_device *target; struct otx2_nic *priv; + struct rep_dev *rdev; u32 burst, mark =3D 0; u8 nr_police =3D 0; u8 num_intf =3D 1; @@ -464,14 +465,18 @@ static int otx2_tc_parse_actions(struct otx2_nic *nic, return 0; case FLOW_ACTION_REDIRECT_INGRESS: target =3D act->dev; - priv =3D netdev_priv(target); - /* npc_install_flow_req doesn't support passing a target pcifunc */ - if (rvu_get_pf(nic->pcifunc) !=3D rvu_get_pf(priv->pcifunc)) { - NL_SET_ERR_MSG_MOD(extack, - "can't redirect to other pf/vf"); - return -EOPNOTSUPP; + if (target->dev.parent) { + priv =3D netdev_priv(target); + if (rvu_get_pf(nic->pcifunc) !=3D rvu_get_pf(priv->pcifunc)) { + NL_SET_ERR_MSG_MOD(extack, + "can't redirect to other pf/vf"); + return -EOPNOTSUPP; + } + req->vf =3D priv->pcifunc & RVU_PFVF_FUNC_MASK; + } else { + rdev =3D netdev_priv(target); + req->vf =3D rdev->pcifunc & RVU_PFVF_FUNC_MASK; } - req->vf =3D priv->pcifunc & RVU_PFVF_FUNC_MASK; =20 /* if op is already set; avoid overwriting the same */ if (!req->op) @@ -1300,6 +1305,7 @@ static int otx2_tc_add_flow(struct otx2_nic *nic, req->channel =3D nic->hw.rx_chan_base; req->entry =3D flow_cfg->flow_ent[mcam_idx]; req->intf =3D NIX_INTF_RX; + req->vf =3D nic->pcifunc; req->set_cntr =3D 1; new_node->entry =3D req->entry; =20 @@ -1400,8 +1406,8 @@ static int otx2_tc_get_flow_stats(struct otx2_nic *ni= c, return 0; } =20 -static int otx2_setup_tc_cls_flower(struct otx2_nic *nic, - struct flow_cls_offload *cls_flower) +int otx2_setup_tc_cls_flower(struct otx2_nic *nic, + struct flow_cls_offload *cls_flower) { switch (cls_flower->command) { case FLOW_CLS_REPLACE: @@ -1414,6 +1420,7 @@ static int otx2_setup_tc_cls_flower(struct otx2_nic *= nic, return -EOPNOTSUPP; } } +EXPORT_SYMBOL(otx2_setup_tc_cls_flower); =20 static int otx2_tc_ingress_matchall_install(struct otx2_nic *nic, struct tc_cls_matchall_offload *cls) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c b/drivers/net= /ethernet/marvell/octeontx2/nic/rep.c index 1806d050c143..ae58d0601b45 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/rep.c @@ -9,6 +9,7 @@ #include #include #include +#include =20 #include "otx2_common.h" #include "cn10k.h" @@ -31,6 +32,117 @@ MODULE_DEVICE_TABLE(pci, rvu_rep_id_table); static int rvu_rep_notify_pfvf(struct otx2_nic *priv, u16 event, struct rep_event *data); =20 +static int rvu_rep_mcam_flow_init(struct rep_dev *rep) +{ + struct npc_mcam_alloc_entry_req *req; + struct npc_mcam_alloc_entry_rsp *rsp; + struct otx2_nic *priv =3D rep->mdev; + int ent, allocated =3D 0; + int count; + + rep->flow_cfg =3D kcalloc(1, sizeof(struct otx2_flow_config), GFP_KERNEL); + + if (!rep->flow_cfg) + return -ENOMEM; + + count =3D OTX2_DEFAULT_FLOWCOUNT; + + rep->flow_cfg->flow_ent =3D kcalloc(count, sizeof(u16), GFP_KERNEL); + if (!rep->flow_cfg->flow_ent) + return -ENOMEM; + + while (allocated < count) { + req =3D otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&priv->mbox); + if (!req) + goto exit; + + req->hdr.pcifunc =3D rep->pcifunc; + req->contig =3D false; + req->ref_entry =3D 0; + req->count =3D (count - allocated) > NPC_MAX_NONCONTIG_ENTRIES ? + NPC_MAX_NONCONTIG_ENTRIES : count - allocated; + + if (otx2_sync_mbox_msg(&priv->mbox)) + goto exit; + + rsp =3D (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp + (&priv->mbox.mbox, 0, &req->hdr); + + for (ent =3D 0; ent < rsp->count; ent++) + rep->flow_cfg->flow_ent[ent + allocated] =3D rsp->entry_list[ent]; + + allocated +=3D rsp->count; + + if (rsp->count !=3D req->count) + break; + } +exit: + /* Multiple MCAM entry alloc requests could result in non-sequential + * MCAM entries in the flow_ent[] array. Sort them in an ascending + * order, otherwise user installed ntuple filter index and MCAM entry + * index will not be in sync. + */ + if (allocated) + sort(&rep->flow_cfg->flow_ent[0], allocated, + sizeof(rep->flow_cfg->flow_ent[0]), mcam_entry_cmp, NULL); + + mutex_unlock(&priv->mbox.lock); + + rep->flow_cfg->max_flows =3D allocated; + + if (allocated) { + rep->flags |=3D OTX2_FLAG_MCAM_ENTRIES_ALLOC; + rep->flags |=3D OTX2_FLAG_NTUPLE_SUPPORT; + rep->flags |=3D OTX2_FLAG_TC_FLOWER_SUPPORT; + } + + INIT_LIST_HEAD(&rep->flow_cfg->flow_list); + INIT_LIST_HEAD(&rep->flow_cfg->flow_list_tc); + return 0; +} + +static int rvu_rep_setup_tc_cb(enum tc_setup_type type, + void *type_data, void *cb_priv) +{ + struct rep_dev *rep =3D cb_priv; + struct otx2_nic *priv =3D rep->mdev; + + if (!(rep->flags & RVU_REP_VF_INITIALIZED)) + return -EINVAL; + + if (!(rep->flags & OTX2_FLAG_TC_FLOWER_SUPPORT)) + rvu_rep_mcam_flow_init(rep); + + priv->netdev =3D rep->netdev; + priv->flags =3D rep->flags; + priv->pcifunc =3D rep->pcifunc; + priv->flow_cfg =3D rep->flow_cfg; + + switch (type) { + case TC_SETUP_CLSFLOWER: + return otx2_setup_tc_cls_flower(priv, type_data); + default: + return -EOPNOTSUPP; + } +} + +static LIST_HEAD(rvu_rep_block_cb_list); +static int rvu_rep_setup_tc(struct net_device *netdev, enum tc_setup_type = type, + void *type_data) +{ + struct rvu_rep *rep =3D netdev_priv(netdev); + + switch (type) { + case TC_SETUP_BLOCK: + return flow_block_cb_setup_simple(type_data, + &rvu_rep_block_cb_list, + rvu_rep_setup_tc_cb, + rep, rep, true); + default: + return -EOPNOTSUPP; + } +} + static int rvu_rep_sp_stats64(const struct net_device *dev, struct rtnl_link_stats64 *stats) @@ -367,6 +479,7 @@ static const struct net_device_ops rvu_rep_netdev_ops = =3D { .ndo_change_mtu =3D rvu_rep_change_mtu, .ndo_has_offload_stats =3D rvu_rep_has_offload_stats, .ndo_get_offload_stats =3D rvu_rep_get_offload_stats, + .ndo_setup_tc =3D rvu_rep_setup_tc, }; =20 static int rvu_rep_napi_init(struct otx2_nic *priv, @@ -512,6 +625,7 @@ void rvu_rep_destroy(struct otx2_nic *priv) unregister_netdev(rep->netdev); rvu_rep_devlink_port_unregister(rep); free_netdev(rep->netdev); + kfree(rep->flow_cfg); } kfree(priv->reps); rvu_rep_rsrc_free(priv); @@ -562,6 +676,7 @@ int rvu_rep_create(struct otx2_nic *priv, struct netlin= k_ext_ack *extack) NETIF_F_IPV6_CSUM | NETIF_F_RXHASH | NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6); =20 + ndev->hw_features |=3D NETIF_F_HW_TC; ndev->features |=3D ndev->hw_features; eth_hw_addr_random(ndev); err =3D rvu_rep_devlink_port_register(rep); diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.h b/drivers/net= /ethernet/marvell/octeontx2/nic/rep.h index 163913c3b30f..38446b3e4f13 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/rep.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/rep.h @@ -35,6 +35,7 @@ struct rep_dev { struct rep_stats stats; struct delayed_work stats_wrk; struct devlink_port dl_port; + struct otx2_flow_config *flow_cfg; #define RVU_REP_VF_INITIALIZED BIT_ULL(0) u64 flags; u16 rep_id; --=20 2.25.1